/openbmc/linux/drivers/soc/ti/ |
H A D | knav_qmss_acc.c | 24 struct knav_acc_channel *acc) in __knav_acc_notify() argument 38 dev_dbg(kdev->dev, "acc-irq: notifying %d\n", in __knav_acc_notify() 44 queue = acc->channel - range->acc_info.start_channel; in __knav_acc_notify() 46 dev_dbg(kdev->dev, "acc-irq: notifying %d\n", in __knav_acc_notify() 68 atomic_inc(&kq->acc->retrigger_count); in knav_acc_set_notify() 69 mask = BIT(kq->acc->channel % 32); in knav_acc_set_notify() 70 offset = ACC_INTD_OFFSET_STATUS(kq->acc->channel); in knav_acc_set_notify() 72 kq->acc->name); in knav_acc_set_notify() 79 struct knav_acc_channel *acc; in knav_acc_int_handler() local 94 acc = range->acc; in knav_acc_int_handler() [all …]
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/openbmc/linux/drivers/md/bcache/ |
H A D | stats.c | 28 * get a cache hit, we increment a single atomic_t in acc->collector, and when 94 int bch_cache_accounting_add_kobjs(struct cache_accounting *acc, in bch_cache_accounting_add_kobjs() argument 97 int ret = kobject_add(&acc->total.kobj, parent, in bch_cache_accounting_add_kobjs() 99 ret = ret ?: kobject_add(&acc->five_minute.kobj, parent, in bch_cache_accounting_add_kobjs() 101 ret = ret ?: kobject_add(&acc->hour.kobj, parent, in bch_cache_accounting_add_kobjs() 103 ret = ret ?: kobject_add(&acc->day.kobj, parent, in bch_cache_accounting_add_kobjs() 108 void bch_cache_accounting_clear(struct cache_accounting *acc) in bch_cache_accounting_clear() argument 110 acc->total.cache_hits = 0; in bch_cache_accounting_clear() 111 acc->total.cache_misses = 0; in bch_cache_accounting_clear() 112 acc->total.cache_bypass_hits = 0; in bch_cache_accounting_clear() [all …]
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H A D | stats.h | 44 void bch_cache_accounting_init(struct cache_accounting *acc, 47 int bch_cache_accounting_add_kobjs(struct cache_accounting *acc, 50 void bch_cache_accounting_clear(struct cache_accounting *acc); 52 void bch_cache_accounting_destroy(struct cache_accounting *acc);
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/openbmc/linux/drivers/staging/media/ipu3/ |
H A D | ipu3-css-params.c | 1216 * DDR address + accelerator's config set index(acc's address). 1728 struct imgu_abi_acc_param *acc) in imgu_css_cfg_acc_stripe() argument 1738 memset(acc, 0, sizeof(*acc)); in imgu_css_cfg_acc_stripe() 1742 if (imgu_css_osys_calc(css, pipe, stripes, &acc->osys, &scaler_luma, in imgu_css_cfg_acc_stripe() 1743 &scaler_chroma, acc->stripe.block_stripes)) in imgu_css_cfg_acc_stripe() 1757 acc->stripe.num_of_stripes = stripes; in imgu_css_cfg_acc_stripe() 1758 acc->stripe.input_frame.width = in imgu_css_cfg_acc_stripe() 1760 acc->stripe.input_frame.height = in imgu_css_cfg_acc_stripe() 1762 acc->stripe.input_frame.bayer_order = in imgu_css_cfg_acc_stripe() 1766 acc->stripe.bds_out_stripes[i].height = in imgu_css_cfg_acc_stripe() [all …]
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/openbmc/u-boot/lib/rsa/ |
H A D | rsa-mod-exp.c | 38 int64_t acc = 0; in subtract_modulus() local 42 acc += (uint64_t)num[i] - key->modulus[i]; in subtract_modulus() 43 num[i] = (uint32_t)acc; in subtract_modulus() 44 acc >>= 32; in subtract_modulus() 187 uint32_t val[key->len], acc[key->len], tmp[key->len]; in pow_mod() local 210 montgomery_mul(key, acc, val, key->rr); /* acc = a * RR / R mod n */ in pow_mod() 212 memcpy(a_scaled, acc, key->len * sizeof(a_scaled[0])); in pow_mod() 215 montgomery_mul(key, tmp, acc, acc); /* tmp = acc^2 / R mod n */ in pow_mod() 218 /* acc = tmp * val / R mod n */ in pow_mod() 219 montgomery_mul(key, acc, tmp, a_scaled); in pow_mod() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | qcom,kpss-acc-v2.yaml | 4 $id: http://devicetree.org/schemas/power/qcom,kpss-acc-v2.yaml# 7 title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v2 13 The KPSS ACC provides clock, power manager, and reset control to a Krait CPU. 14 There is one ACC register region per CPU within the KPSS remapped region as 15 well as an alias register region that remaps accesses to the ACC associated 16 with the CPU accessing the region. ACC v2 is currently used as a 21 const: qcom,kpss-acc-v2 38 compatible = "qcom,kpss-acc-v2";
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/openbmc/qemu/accel/ |
H A D | accel-target.c | 89 ObjectClass *acc; /* AccelCPUClass */ in accel_init_cpu_interfaces() local 95 acc = object_class_by_name(acc_name); in accel_init_cpu_interfaces() 98 if (acc) { in accel_init_cpu_interfaces() 100 CPU_RESOLVING_TYPE, false, acc); in accel_init_cpu_interfaces() 126 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_cpu_common_realize() local 135 if (acc->cpu_common_realize && !acc->cpu_common_realize(cpu, errp)) { in accel_cpu_common_realize() 145 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_cpu_common_unrealize() local 148 if (acc->cpu_common_unrealize) { in accel_cpu_common_unrealize() 149 acc->cpu_common_unrealize(cpu); in accel_cpu_common_unrealize() 156 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_supported_gdbstub_sstep_flags() local [all …]
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H A D | accel-system.c | 35 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_init_machine() local 38 *(acc->allowed) = true; in accel_init_machine() 39 ret = acc->init_machine(ms); in accel_init_machine() 42 *(acc->allowed) = false; in accel_init_machine() 45 object_set_accelerator_compat_props(acc->compat_props); in accel_init_machine() 58 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_setup_post() local 59 if (acc->setup_post) { in accel_setup_post() 60 acc->setup_post(ms, accel); in accel_setup_post()
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | qcom,kpss-acc-v1.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,kpss-acc-v1.yaml# 7 title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v1 13 The KPSS ACC provides clock, power domain, and reset control to a Krait CPU. 14 There is one ACC register region per CPU within the KPSS remapped region as 15 well as an alias register region that remaps accesses to the ACC associated 16 with the CPU accessing the region. ACC v1 is currently used as a 21 const: qcom,kpss-acc-v1 64 compatible = "qcom,kpss-acc-v1";
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H A D | alphascale,acc.txt | 3 The ACC (Alphascale Clock Controller) is responsible for choosing proper 6 Required properties for the ACC node: 8 - reg: must contain the ACC register base and size 103 clocks = <&acc CLKID_SYS_UART4>, <&acc CLKID_AHB_UART4>; 111 clocks = <&acc CLKID_AHB_TIMER0>;
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/openbmc/qemu/target/mips/tcg/ |
H A D | dsp_helper.c | 248 static inline int32_t mipsdsp_sat32_acc_q31(int32_t acc, int32_t a, in mipsdsp_sat32_acc_q31() argument 256 temp = ((uint64_t)env->active_tc.HI[acc] << 32) | in mipsdsp_sat32_acc_q31() 257 (uint64_t)env->active_tc.LO[acc]; in mipsdsp_sat32_acc_q31() 259 temp = (uint64_t)env->active_tc.LO[acc]; in mipsdsp_sat32_acc_q31() 274 set_DSPControl_overflow_flag(1, 16 + acc, env); in mipsdsp_sat32_acc_q31() 508 int64_t acc; in mipsdsp_rndrashift_short_acc() local 510 acc = ((int64_t)env->active_tc.HI[ac] << 32) | in mipsdsp_rndrashift_short_acc() 512 p[0] = (shift == 0) ? (acc << 1) : (acc >> (shift - 1)); in mipsdsp_rndrashift_short_acc() 513 p[1] = (acc >> 63) & 0x01; in mipsdsp_rndrashift_short_acc() 2043 int64_t acc, dotp; \ [all …]
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/openbmc/linux/fs/cachefiles/ |
H A D | key.c | 41 unsigned int acc, i, n, nle, nbe, keylen = object->cookie->key_len; in cachefiles_cook_key() local 116 acc = *key++; in cachefiles_cook_key() 118 acc |= *key++ << 8; in cachefiles_cook_key() 120 acc |= *key++ << 16; in cachefiles_cook_key() 123 name[len++] = cachefiles_charmap[acc & 63]; in cachefiles_cook_key() 124 acc >>= 6; in cachefiles_cook_key() 125 name[len++] = cachefiles_charmap[acc & 63]; in cachefiles_cook_key() 126 acc >>= 6; in cachefiles_cook_key() 127 name[len++] = cachefiles_charmap[acc & 63]; in cachefiles_cook_key() 128 acc >>= 6; in cachefiles_cook_key() [all …]
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/openbmc/linux/drivers/fsi/ |
H A D | fsi-scom.c | 388 static void raw_convert_status(struct scom_access *acc, uint32_t status) in raw_convert_status() argument 390 acc->pib_status = (status & SCOM_STATUS_PIB_RESP_MASK) >> in raw_convert_status() 392 acc->intf_errors = 0; in raw_convert_status() 395 acc->intf_errors |= SCOM_INTF_ERR_PROTECTION; in raw_convert_status() 397 acc->intf_errors |= SCOM_INTF_ERR_PARITY; in raw_convert_status() 399 acc->intf_errors |= SCOM_INTF_ERR_ABORT; in raw_convert_status() 401 acc->intf_errors |= SCOM_INTF_ERR_UNKNOWN; in raw_convert_status() 406 struct scom_access acc; in scom_raw_read() local 410 if (copy_from_user(&acc, argp, sizeof(struct scom_access))) in scom_raw_read() 413 rc = raw_get_scom(scom, &acc.data, acc.addr, &status); in scom_raw_read() [all …]
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/openbmc/linux/drivers/nvme/host/ |
H A D | fc.h | 38 struct fcnvme_ls_acc_hdr *acc = buf; in nvme_fc_format_rsp_hdr() local 40 acc->w0.ls_cmd = ls_cmd; in nvme_fc_format_rsp_hdr() 41 acc->desc_list_len = desc_len; in nvme_fc_format_rsp_hdr() 42 acc->rqst.desc_tag = cpu_to_be32(FCNVME_LSDESC_RQST); in nvme_fc_format_rsp_hdr() 43 acc->rqst.desc_len = in nvme_fc_format_rsp_hdr() 45 acc->rqst.w0.ls_cmd = rqst_ls_cmd; in nvme_fc_format_rsp_hdr() 142 "Bad CR_ASSOC ACC Length", 144 "Bad CR_CONN ACC Length", 146 "Bad Disconnect ACC Length", 154 "ACC (2)",
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/openbmc/linux/arch/arm/mm/ |
H A D | proc-macros.S | 125 * 0xxx 0 0 0 no acc no acc 126 * 100x 1 0 1 r/o no acc 127 * 10x0 1 0 1 r/o no acc 128 * 1011 0 0 1 r/w no acc 198 * 0xxx 0x00 no acc no acc 199 * 100x 0x00 r/o no acc 200 * 10x0 0x00 r/o no acc 201 * 1011 0x55 r/w no acc 241 * 0xxx 00 no acc no acc 242 * 100x 00 r/o no acc [all …]
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/openbmc/linux/drivers/iio/common/inv_sensors/ |
H A D | inv_sensors_timestamp.c | 22 static void inv_update_acc(struct inv_sensors_timestamp_acc *acc, uint32_t val) in inv_update_acc() argument 27 acc->values[acc->idx++] = val; in inv_update_acc() 28 if (acc->idx >= ARRAY_SIZE(acc->values)) in inv_update_acc() 29 acc->idx = 0; in inv_update_acc() 32 for (i = 0; i < ARRAY_SIZE(acc->values); ++i) { in inv_update_acc() 33 if (acc->values[i] == 0) in inv_update_acc() 35 sum += acc->values[i]; in inv_update_acc() 38 acc->val = div_u64(sum, i); in inv_update_acc()
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/openbmc/qemu/target/m68k/ |
H A D | helper.c | 400 uint32_t acc; in HELPER() local 410 acc = regval >> 8; in HELPER() 413 acc = regval; in HELPER() 417 regval = (((uint64_t)acc) << 8) | extlow; in HELPER() 420 regval = acc | (((int64_t)extlow) << 32); in HELPER() 423 regval = acc | (((uint64_t)extlow) << 32); in HELPER() 1138 void HELPER(macsats)(CPUM68KState *env, uint32_t acc) in HELPER() 1142 tmp = env->macc[acc]; in HELPER() 1148 env->macsr |= MACSR_PAV0 << acc; in HELPER() 1158 env->macc[acc] = result; in HELPER() [all …]
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/openbmc/linux/arch/powerpc/kernel/ptrace/ |
H A D | ptrace-spe.c | 14 * u64 acc; 32 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) != in evr_get() 35 return membuf_write(&to, &target->thread.acc, in evr_get() 51 BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) != in evr_set() 56 &target->thread.acc, in evr_set()
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/openbmc/openbmc/poky/meta/recipes-support/lzop/lzop/ |
H A D | acinclude.m4 | 42 AC_MSG_CHECKING([whether your compiler passes the ACC conformance test]) 46 #include "acc/acc.h" 47 #include "acc/acc_incd.h" 50 #include "acc/acc_chk.ch" 54 #include "acc/acc_chk.ch" 61 #include "acc/acc_chk.ch" 82 AC_MSG_NOTICE([Your compiler failed the ACC conformance test - for details see ]) 87 AC_MSG_ERROR([ACC conformance test failed. Stop.]) 104 AC_MSG_CHECKING([whether your compiler passes the ACC conformance test]) 149 AC_MSG_NOTICE([Your compiler failed the ACC conformance test - for details see ]) [all …]
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/openbmc/qemu/target/rx/ |
H A D | op_helper.c | 368 int64_t acc; in helper_racw() local 369 acc = env->acc; in helper_racw() 370 acc <<= (imm + 1); in helper_racw() 371 acc += 0x0000000080000000LL; in helper_racw() 372 if (acc > 0x00007fff00000000LL) { in helper_racw() 373 acc = 0x00007fff00000000LL; in helper_racw() 374 } else if (acc < -0x800000000000LL) { in helper_racw() 375 acc = -0x800000000000LL; in helper_racw() 377 acc &= 0xffffffff00000000LL; in helper_racw() 379 env->acc = acc; in helper_racw()
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/openbmc/qemu/target/ppc/ |
H A D | helper.h | 561 DEF_HELPER_5(XVI4GER8, void, env, vsr, vsr, acc, i32) 562 DEF_HELPER_5(XVI4GER8PP, void, env, vsr, vsr, acc, i32) 563 DEF_HELPER_5(XVI8GER4, void, env, vsr, vsr, acc, i32) 564 DEF_HELPER_5(XVI8GER4PP, void, env, vsr, vsr, acc, i32) 565 DEF_HELPER_5(XVI8GER4SPP, void, env, vsr, vsr, acc, i32) 566 DEF_HELPER_5(XVI16GER2, void, env, vsr, vsr, acc, i32) 567 DEF_HELPER_5(XVI16GER2S, void, env, vsr, vsr, acc, i32) 568 DEF_HELPER_5(XVI16GER2PP, void, env, vsr, vsr, acc, i32) 569 DEF_HELPER_5(XVI16GER2SPP, void, env, vsr, vsr, acc, i32) 570 DEF_HELPER_5(XVF16GER2, void, env, vsr, vsr, acc, i32) [all …]
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/openbmc/webui-vue/src/store/modules/HardwareStatus/ |
H A D | SensorsStore.js | 25 const promises = collection.reduce((acc, id) => { 26 acc.push(dispatch('getSensors', id)); 27 acc.push(dispatch('getThermalSensors', id)); 28 acc.push(dispatch('getPowerSensors', id)); 29 return acc;
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/openbmc/qemu/target/hexagon/imported/ |
H A D | shift.idef | 30 #define RSHIFTTYPES(TAGEND,REGD,REGS,REGSTYPE,ACC,ACCSRC,SAT,SATOPT,ATTRS) \ 31 Q6INSN(S2_asr_r_##TAGEND,#REGD "32" #ACC "=asr(" #REGS "32,Rt32)" #SATOPT,ATTRIBS(ATTRS), \ 35 REGD##V = SAT(ACCSRC ACC fBIDIR_ASHIFTR(REGS##V,shamt,REGSTYPE)); \ 38 Q6INSN(S2_asl_r_##TAGEND,#REGD "32" #ACC "=asl(" #REGS "32,Rt32)" #SATOPT,ATTRIBS(ATTRS), \ 42 REGD##V = SAT(ACCSRC ACC fBIDIR_ASHIFTL(REGS##V,shamt,REGSTYPE)); \ 45 Q6INSN(S2_lsr_r_##TAGEND,#REGD "32" #ACC "=lsr(" #REGS "32,Rt32)" #SATOPT,ATTRIBS(ATTRS), \ 49 REGD##V = SAT(ACCSRC ACC fBIDIR_LSHIFTR(REGS##V,shamt,REGSTYPE)); \ 52 Q6INSN(S2_lsl_r_##TAGEND,#REGD "32" #ACC "=lsl(" #REGS "32,Rt32)" #SATOPT,ATTRIBS(ATTRS), \ 56 REGD##V = SAT(ACCSRC ACC fBIDIR_LSHIFTL(REGS##V,shamt,REGSTYPE)); \ 97 #define ISHIFTTYPES(TAGEND,SIZE,REGD,REGS,REGSTYPE,ACC,ACCSRC,SAT,SATOPT,ATTRS) \ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
H A D | mvebu-devbus.txt | 52 - devbus,acc-first-ps: Defines the time delay from the negation of 57 - devbus,acc-next-ps: Defines the time delay between the cycle that 65 This parameter has no affect on <acc-first-ps> parameter 67 to a value smaller than <acc-first-ps>. 143 devbus,acc-first-ps = <124000>; 144 devbus,acc-next-ps = <248000>;
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/openbmc/linux/arch/arm64/kvm/vgic/ |
H A D | vgic-mmio.h | 67 #define REGISTER_DESC_WITH_BITS_PER_IRQ(off, rd, wr, ur, uw, bpi, acc) \ argument 72 .access_flags = acc, \ 79 #define REGISTER_DESC_WITH_LENGTH(off, rd, wr, length, acc) \ argument 84 .access_flags = acc, \ 89 #define REGISTER_DESC_WITH_LENGTH_UACCESS(off, rd, wr, urd, uwr, length, acc) \ argument 94 .access_flags = acc, \
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