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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,s5pv210-clock.yaml20 - "xusbxti" - external crystal oscillator connected to XUSBXTI and XUSBXTO
35 - description: xusbxti clock
40 - const: xusbxti
66 xusbxti: clock-1 {
69 clock-output-names = "xusbxti";
76 clock-names = "xxti", "xusbxti";
77 clocks = <&xxti>, <&xusbxti>;
H A Dsamsung,s3c64xx-clock.txt32 - "xusbxti" - USB xtal - required,
56 xusbxti: clock-xusbxti {
58 clock-output-names = "xusbxti";
H A Dsamsung,exynos-ext-clock.yaml7 title: Samsung SoC external/osc/XXTI/XusbXTI clock
16 Samsung SoCs require an external clock supplied through XXTI or XusbXTI pins.
22 - samsung,clock-xusbxti
H A Dsamsung,exynos5410-clock.yaml32 oscillator supplied through XXTI or XusbXTI pin. This clock should be
H A Dsamsung,s5pv210-audss-clock.yaml30 specified (i.e. xusbxti is used for PLL reference), it is fixed to a
/openbmc/linux/arch/arm/mach-s3c/
H A Dsetup-usb-phy-s3c64xx.c25 struct clk *xusbxti; in s3c_usb_otgphy_init() local
33 xusbxti = clk_get(&pdev->dev, "xusbxti"); in s3c_usb_otgphy_init()
34 if (!IS_ERR(xusbxti)) { in s3c_usb_otgphy_init()
35 switch (clk_get_rate(xusbxti)) { in s3c_usb_otgphy_init()
47 clk_put(xusbxti); in s3c_usb_otgphy_init()
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Ds3c6410-smdk6410.dts38 xusbxti: oscillator-1 { label
40 clock-output-names = "xusbxti";
H A Dexynos4412-tiny4412.dts71 xusbxti {
72 compatible = "samsung,clock-xusbxti";
H A Dexynos4412-smdk4412.dts40 xusbxti {
41 compatible = "samsung,clock-xusbxti";
H A Ds5pv210.dtsi62 xusbxti: oscillator-1 { label
65 clock-output-names = "xusbxti";
97 clock-names = "xxti", "xusbxti";
98 clocks = <&xxti>, <&xusbxti>;
420 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
H A Ds3c6410-mini6410.dts38 xusbxti: oscillator-1 { label
40 clock-output-names = "xusbxti";
H A Dexynos4210-smdkv310.dts43 xusbxti {
44 compatible = "samsung,clock-xusbxti";
H A Ds5pv210-smdkc110.dts42 &xusbxti {
H A Ds5pv210-torbreck.dts42 &xusbxti {
H A Dexynos4210-origen.dts106 xusbxti {
107 compatible = "samsung,clock-xusbxti";
H A Dexynos3250-artik5.dtsi64 clocks = <&xusbxti>;
430 &xusbxti {
H A Dexynos4412-itop-scp-core.dtsi41 xusbxti {
42 compatible = "samsung,clock-xusbxti";
H A Dexynos4412-odroid-common.dtsi69 xusbxti {
70 compatible = "samsung,clock-xusbxti";
H A Dexynos4412-origen.dts72 xusbxti {
73 compatible = "samsung,clock-xusbxti";
H A Dexynos4210-trats.dts138 xusbxti {
139 compatible = "samsung,clock-xusbxti";
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos4.c303 PNAME(group1_p4210) = { "xxti", "xusbxti", "sclk_hdmi24m",
307 "sclk_usbphy0", "xxti", "xusbxti", "sclk_mpll",
310 "sclk_usbphy0", "xxti", "xusbxti", "sclk_mpll",
313 "sclk_usbphy0", "xxti", "xusbxti", "sclk_mpll",
317 PNAME(mout_pwi_p4210) = { "xxti", "xusbxti", "sclk_hdmi24m", "sclk_usbphy0",
344 PNAME(group1_p4x12) = { "xxti", "xusbxti", "sclk_hdmi24m", "sclk_usbphy0",
348 "sclk_usbphy0", "xxti", "xusbxti",
351 "sclk_usbphy0", "xxti", "xusbxti",
354 "sclk_usbphy0", "xxti", "xusbxti",
360 PNAME(mout_pwi_p4x12) = { "xxti", "xusbxti", "sclk_hdmi24m", "sclk_usbphy0",
[all …]
H A Dclk-s5pv210.c77 xusbxti, enumerator
131 "xusbxti"
168 "xusbxti",
326 "xusbxti",
357 "xusbxti"
H A Dclk-exynos3250.c206 PNAME(group_sclk_p) = { "xxti", "xusbxti",
212 "xxti", "xusbxti",
215 PNAME(group_sclk_cam_blk_p) = { "xxti", "xusbxti",
221 PNAME(group_sclk_fimd0_p) = { "xxti", "xusbxti",
238 /* HACK: fin_pll hardcoded to xusbxti until detection is implemented. */
239 FFACTOR(CLK_FIN_PLL, "fin_pll", "xusbxti", 1, 1, 0),
/openbmc/qemu/hw/misc/
H A Dexynos4210_pmu.c190 #define XUSBXTI_CONFIGURATION 0x3400 /* Configure the pad of XUSBXTI */
191 #define XUSBXTI_STATUS 0x3404 /* Check the pad of XUSBXTI */
192 /* Sets time required for XUSBXTI to be stabilized */
/openbmc/u-boot/board/samsung/goni/
H A Dlowlevel_init.S342 /* XCLKOUT = XUSBXTI 24MHz */
345 orr r1, r1, #(0x3 << 8) @ CLKOUT[9:8] 3 XUSBXTI

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