1cc190b1fSKrzysztof Kozlowski# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2cc190b1fSKrzysztof Kozlowski%YAML 1.2
3cc190b1fSKrzysztof Kozlowski---
4cc190b1fSKrzysztof Kozlowski$id: http://devicetree.org/schemas/clock/samsung,exynos5410-clock.yaml#
5cc190b1fSKrzysztof Kozlowski$schema: http://devicetree.org/meta-schemas/core.yaml#
6cc190b1fSKrzysztof Kozlowski
7cc190b1fSKrzysztof Kozlowskititle: Samsung Exynos5410 SoC clock controller
8cc190b1fSKrzysztof Kozlowski
9cc190b1fSKrzysztof Kozlowskimaintainers:
10cc190b1fSKrzysztof Kozlowski  - Chanwoo Choi <cw00.choi@samsung.com>
11*8a1e6bb3SKrzysztof Kozlowski  - Krzysztof Kozlowski <krzk@kernel.org>
12cc190b1fSKrzysztof Kozlowski  - Sylwester Nawrocki <s.nawrocki@samsung.com>
13cc190b1fSKrzysztof Kozlowski  - Tomasz Figa <tomasz.figa@gmail.com>
14cc190b1fSKrzysztof Kozlowski
15cc190b1fSKrzysztof Kozlowskidescription: |
16cc190b1fSKrzysztof Kozlowski  Expected external clocks, defined in DTS as fixed-rate clocks with a matching
17cc190b1fSKrzysztof Kozlowski  name::
18cc190b1fSKrzysztof Kozlowski    - "fin_pll" - PLL input clock from XXTI
19cc190b1fSKrzysztof Kozlowski
20cc190b1fSKrzysztof Kozlowski  All available clocks are defined as preprocessor macros in
21cc190b1fSKrzysztof Kozlowski  include/dt-bindings/clock/exynos5410.h header.
22cc190b1fSKrzysztof Kozlowski
23cc190b1fSKrzysztof Kozlowskiproperties:
24cc190b1fSKrzysztof Kozlowski  compatible:
25cc190b1fSKrzysztof Kozlowski    oneOf:
26cc190b1fSKrzysztof Kozlowski      - enum:
27cc190b1fSKrzysztof Kozlowski          - samsung,exynos5410-clock
28cc190b1fSKrzysztof Kozlowski
29cc190b1fSKrzysztof Kozlowski  clocks:
30cc190b1fSKrzysztof Kozlowski    description:
31cc190b1fSKrzysztof Kozlowski      Should contain an entry specifying the root clock from external
32cc190b1fSKrzysztof Kozlowski      oscillator supplied through XXTI or XusbXTI pin.  This clock should be
33cc190b1fSKrzysztof Kozlowski      defined using standard clock bindings with "fin_pll" clock-output-name.
34cc190b1fSKrzysztof Kozlowski      That clock is being passed internally to the 9 PLLs.
35cc190b1fSKrzysztof Kozlowski    maxItems: 1
36cc190b1fSKrzysztof Kozlowski
37cc190b1fSKrzysztof Kozlowski  "#clock-cells":
38cc190b1fSKrzysztof Kozlowski    const: 1
39cc190b1fSKrzysztof Kozlowski
40cc190b1fSKrzysztof Kozlowski  reg:
41cc190b1fSKrzysztof Kozlowski    maxItems: 1
42cc190b1fSKrzysztof Kozlowski
43cc190b1fSKrzysztof Kozlowskirequired:
44cc190b1fSKrzysztof Kozlowski  - compatible
45cc190b1fSKrzysztof Kozlowski  - "#clock-cells"
46cc190b1fSKrzysztof Kozlowski  - reg
47cc190b1fSKrzysztof Kozlowski
48cc190b1fSKrzysztof KozlowskiadditionalProperties: false
49cc190b1fSKrzysztof Kozlowski
50cc190b1fSKrzysztof Kozlowskiexamples:
51cc190b1fSKrzysztof Kozlowski  - |
52cc190b1fSKrzysztof Kozlowski    #include <dt-bindings/clock/exynos5410.h>
53cc190b1fSKrzysztof Kozlowski
54cc190b1fSKrzysztof Kozlowski    fin_pll: osc-clock {
55cc190b1fSKrzysztof Kozlowski        compatible = "fixed-clock";
56cc190b1fSKrzysztof Kozlowski        clock-frequency = <24000000>;
57cc190b1fSKrzysztof Kozlowski        clock-output-names = "fin_pll";
58cc190b1fSKrzysztof Kozlowski        #clock-cells = <0>;
59cc190b1fSKrzysztof Kozlowski    };
60cc190b1fSKrzysztof Kozlowski
61cc190b1fSKrzysztof Kozlowski    clock-controller@10010000 {
62cc190b1fSKrzysztof Kozlowski        compatible = "samsung,exynos5410-clock";
63cc190b1fSKrzysztof Kozlowski        reg = <0x10010000 0x30000>;
64cc190b1fSKrzysztof Kozlowski        #clock-cells = <1>;
65cc190b1fSKrzysztof Kozlowski        clocks = <&fin_pll>;
66cc190b1fSKrzysztof Kozlowski    };
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