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/openbmc/linux/arch/sparc/include/asm/
H A Dxor_32.h3 * include/asm/xor.h
31 "xor %%g2, %%o4, %%g2\n\t" in sparc_2()
32 "xor %%g3, %%o5, %%g3\n\t" in sparc_2()
33 "xor %%g4, %%l0, %%g4\n\t" in sparc_2()
34 "xor %%g5, %%l1, %%g5\n\t" in sparc_2()
35 "xor %%o0, %%l2, %%o0\n\t" in sparc_2()
36 "xor %%o1, %%l3, %%o1\n\t" in sparc_2()
37 "xor %%o2, %%l4, %%o2\n\t" in sparc_2()
38 "xor %%o3, %%l5, %%o3\n\t" in sparc_2()
70 "xor %%g2, %%o4, %%g2\n\t" in sparc_3()
[all …]
/openbmc/linux/arch/alpha/include/asm/
H A Dxor.h3 * include/asm-alpha/xor.h
73 xor $0,$1,$0 # 7 cycles from $1 load \n\
76 xor $2,$3,$2 \n\
78 xor $4,$5,$4 \n\
81 xor $6,$7,$6 \n\
83 xor $19,$20,$19 \n\
86 xor $21,$22,$21 \n\
88 xor $23,$24,$23 \n\
91 xor $25,$27,$25 \n\
130 xor $0,$1,$1 # 8 cycles from $0 load \n\
[all …]
/openbmc/linux/arch/powerpc/crypto/
H A Daes-spe-modes.S112 xor r0,r0,r0; \
144 xor d0,d0,t0;
152 xor rD0,d0,rW0; \
153 xor rD1,d1,rW1; \
154 xor rD2,d2,rW2; \
155 xor rD3,d3,rW3;
173 xor rD0,rD0,rW0
175 xor rD1,rD1,rW1
177 xor rD2,rD2,rW2
179 xor rD3,rD3,rW3
[all …]
H A Daes-spe-keys.S29 xor r5,r5,r5; /* clear sensitive data */ \
30 xor r6,r6,r6; \
31 xor r7,r7,r7; \
32 xor r8,r8,r8; \
33 xor r9,r9,r9; \
34 xor r10,r10,r10; \
35 xor r11,r11,r11; \
36 xor r12,r12,r12; \
65 xor out,t1,t2;
91 xor r14,r14,r0
[all …]
H A Dsha256-spe-asm.S76 xor r0,r0,r0; \
106 xor rT0,rT0,rT1; /* 1: S1 = S1 xor S1' */ \
108 xor rT0,rT0,rT2; /* 1: S1 = S1 xor S1" */ \
111 xor rT3,rT3,rT1; /* 1: ch = ch xor ch' */ \
119 xor rT0,rT0,rT1; /* 1: S0 = S0 xor S0' */ \
121 xor rT3,rT0,rT3; /* 1: S0 = S0 xor S0" */ \
133 xor rT0,rT0,rT1; /* 2: S1 = S1 xor S1' */ \
135 xor rT0,rT0,rT2; /* 2: S1 = S1 xor S1" */ \
138 xor rT3,rT3,rT1; /* 2: ch = ch xor ch' */ \
146 xor rT0,rT0,rT1; /* 2: S0 = S0 xor S0' */ \
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dmv-xor.txt1 * Marvell XOR engines
5 - "marvell,orion-xor"
6 - "marvell,armada-380-xor"
7 - "marvell,armada-3700-xor".
10 registers for the XOR engine.
13 The DT node must also contains sub-nodes for each XOR channel that the
14 XOR engine has. Those sub-nodes have the following required
16 - interrupts: interrupt of the XOR channel
20 - dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
21 - dmacap,memset to indicate that the XOR channel is capable of memset operations
[all …]
/openbmc/linux/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf_irq.c41 static inline void pdacf_transfer_mono16(u16 *dst, u16 xor, unsigned int size, unsigned long rdp_po… in pdacf_transfer_mono16() argument
44 *dst++ = inw(rdp_port) ^ xor; in pdacf_transfer_mono16()
49 static inline void pdacf_transfer_mono32(u32 *dst, u32 xor, unsigned int size, unsigned long rdp_po… in pdacf_transfer_mono32() argument
57 *dst++ = ((((u32)val2 & 0xff) << 24) | ((u32)val1 << 8)) ^ xor; in pdacf_transfer_mono32()
61 static inline void pdacf_transfer_stereo16(u16 *dst, u16 xor, unsigned int size, unsigned long rdp_… in pdacf_transfer_stereo16() argument
64 *dst++ = inw(rdp_port) ^ xor; in pdacf_transfer_stereo16()
65 *dst++ = inw(rdp_port) ^ xor; in pdacf_transfer_stereo16()
69 static inline void pdacf_transfer_stereo32(u32 *dst, u32 xor, unsigned int size, unsigned long rdp_… in pdacf_transfer_stereo32() argument
77 *dst++ = ((((u32)val2 & 0xff) << 24) | ((u32)val1 << 8)) ^ xor; in pdacf_transfer_stereo32()
78 *dst++ = (((u32)val3 << 16) | (val2 & 0xff00)) ^ xor; in pdacf_transfer_stereo32()
[all …]
/openbmc/linux/arch/sparc/lib/
H A Dxor.S3 * arch/sparc64/lib/xor.S
377 xor %o0, %i2, %o0
378 xor %o1, %i3, %o1
381 xor %o2, %i4, %o2
382 xor %o3, %i5, %o3
385 xor %o4, %g2, %o4
386 xor %o5, %g3, %o5
389 xor %l2, %l0, %l2
390 xor %l3, %l1, %l3
421 xor %g2, %i2, %g2
[all …]
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dxor_regs.h10 * For controllers that have two XOR units, then chans 2 & 3 will be
19 /* XOR Engine Control Register Map */
26 /* XOR Engine Interrupt Register Map */
32 /* XOR Engine Descriptor Register Map */
40 /* XOR Engine ECC/Mem_init Register Map */
51 /* XOR Engine Debug Register Map */
54 /* XOR register fileds */
56 /* XOR Engine Channel Arbiter Register */
60 /* XOR Engine [0..1] Configuration Registers */
82 /* XOR Engine [0..1] Activation Registers */
[all …]
H A Dxor.c110 * mv_xor_hal_init - Initialize XOR engine
113 * This function initialize XOR unit.
127 /* Abort any XOR activity & set default configuration */ in mv_xor_hal_init()
137 * mv_xor_ctrl_set - Set XOR channel control registers
155 /* update the XOR Engine [0..1] Configuration Registers (XEx_c_r) */ in mv_xor_ctrl_set()
191 * update the start_ptr field in XOR Engine [0..1] Destination Pointer in mv_xor_mem_init()
197 * update the Block_size field in the XOR Engine[0..1] Block Size in mv_xor_mem_init()
204 * update the field Init_val_l in the XOR Engine Initial Value Register in mv_xor_mem_init()
210 * update the field Init_val_h in the XOR Engine Initial Value Register in mv_xor_mem_init()
223 * mv_xor_state_get - Get XOR channel state.
[all …]
/openbmc/linux/arch/x86/crypto/
H A Dtwofish-x86_64-asm_64.S52 xor w+offset(context), src;
56 xor w+16+offset(context), src;
73 xor s2(%r11,%rdi,4),%r8d;\
76 xor s3(%r11,%rdi,4),%r9d;\
78 xor s3(%r11,%rdi,4),%r8d;\
80 xor (%r11,%rdi,4), %r9d;\
83 xor (%r11,%rdi,4), %r8d;\
85 xor s1(%r11,%rdi,4),%r9d;\
89 xor %r9d, c ## D;\
92 xor %r8d, d ## D;
[all …]
H A Dtwofish-i586-asm_32.S54 xor w+offset(context), src;
58 xor w+16+offset(context), src;
75 xor s2(%ebp,%edi,4),d ## D;\
78 xor s3(%ebp,%edi,4),%esi;\
80 xor s3(%ebp,%edi,4),d ## D;\
82 xor (%ebp,%edi,4), %esi;\
85 xor (%ebp,%edi,4), d ## D;\
87 xor s1(%ebp,%edi,4),%esi;\
92 xor %esi, c ## D;\
95 xor %edi, d ## D;
[all …]
H A Dtwofish-x86_64-asm_64-3way.S95 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 0, ab ## 0, x ## 0); \
96 do16bit_ror(48, mov, xor, Ty1, Ty2, RT0, y ## 0, ab ## 0, y ## 0); \
98 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 1, ab ## 1, x ## 1); \
99 do16bit_ror(48, mov, xor, Ty1, Ty2, RT0, y ## 1, ab ## 1, y ## 1); \
101 do16bit_ror(32, mov, xor, Tx0, Tx1, RT0, x ## 2, ab ## 2, x ## 2); \
102 do16bit_ror(48, mov, xor, Ty1, Ty2, RT0, y ## 2, ab ## 2, y ## 2); \
105 do16bit_ror(32, xor, xor, Tx2, Tx3, RT0, RT1, ab ## 0, x ## 0); \
106 do16bit_ror(16, xor, xor, Ty3, Ty0, RT0, RT1, ab ## 0, y ## 0); \
109 do16bit_ror(32, xor, xor, Tx2, Tx3, RT0, RT1, ab ## 1, x ## 1); \
110 do16bit_ror(16, xor, xor, Ty3, Ty0, RT0, RT1, ab ## 1, y ## 1); \
[all …]
H A Dsha256-avx2-asm.S167 xor y1, y0 # y0 = (e>>25) ^ (e>>11) # S1
168 xor g, y2 # y2 = f^g # CH
173 xor y1, y0 # y0 = (e>>25) ^ (e>>11) ^ (e>>6) # S1
179 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0
182 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
184 xor T1, y1 # y1 = (a>>22) ^ (a>>13) ^ (a>>2) # S0
216 xor y1, y0 # y0 = (e>>25) ^ (e>>11) # S1
217 xor g, y2 # y2 = f^g # CH
221 xor y1, y0 # y0 = (e>>25) ^ (e>>11) ^ (e>>6) # S1
228 xor T1, y1 # y1 = (a>>22) ^ (a>>13) # S0
[all …]
H A Dsha512-avx2-asm.S190 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1
191 xor g, y2 # y2 = f^g # CH
195 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1
200 xor T1, y1 # y1 = (a>>39) ^ (a>>34) # S0
203 xor g, y2 # y2 = CH = ((f^g)&e)^g # CH
204 xor T1, y1 # y1 = (a>>39) ^ (a>>34) ^ (a>>28) # S0
225 # XOR the three components
253 xor y1, y0 # y0 = (e>>41) ^ (e>>18) # S1
254 xor g, y2 # y2 = f^g # CH
258 xor y1, y0 # y0 = (e>>41) ^ (e>>18) ^ (e>>14) # S1
[all …]
/openbmc/linux/arch/loongarch/lib/
H A Dxor_simd.c3 * LoongArch SIMD XOR operations
23 #define XOR(dj, k) "vxor.v $vr" #dj ", $vr" #dj ", $vr" #k "\n\t" macro
36 XOR(0, 4) \
37 XOR(1, 5) \
38 XOR(2, 6) \
39 XOR(3, 7)
52 #undef XOR
66 #define XOR(dj, k) "xvxor.v $xr" #dj ", $xr" #dj ", $xr" #k "\n\t" macro
75 XOR(0, 2) \
76 XOR(1, 3)
[all …]
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-ap810-ap0.dtsi73 xor@400000 {
74 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
81 xor@420000 {
82 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
89 xor@440000 {
90 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
97 xor@460000 {
98 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dxor.c13 #include "xor.h"
98 * mv_xor_hal_init - Initialize XOR engine
101 * This function initialize XOR unit.
115 /* Abort any XOR activity & set default configuration */ in mv_xor_hal_init()
125 * mv_xor_ctrl_set - Set XOR channel control registers
144 /* Update the XOR Engine [0..1] Configuration Registers (XExCR) */ in mv_xor_ctrl_set()
177 * Update the start_ptr field in XOR Engine [0..1] Destination Pointer in mv_xor_mem_init()
183 * Update the BlockSize field in the XOR Engine[0..1] Block Size in mv_xor_mem_init()
190 * Update the field InitValL in the XOR Engine Initial Value Register in mv_xor_mem_init()
196 * Update the field InitValH in the XOR Engine Initial Value Register in mv_xor_mem_init()
[all …]
/openbmc/linux/arch/x86/lib/
H A Dgetuser.S62 xor %eax,%eax
72 xor %eax,%eax
82 xor %eax,%eax
97 xor %eax,%eax
108 xor %eax,%eax
118 xor %eax,%eax
128 xor %eax,%eax
143 xor %eax,%eax
153 xor %edx,%edx
162 xor %edx,%edx
[all …]
/openbmc/linux/arch/powerpc/lib/
H A Dxor_vmx.c44 #define XOR(V1, V2) \ macro
63 XOR(v1, v2); in __xor_altivec_2()
85 XOR(v1, v2); in __xor_altivec_3()
86 XOR(v1, v3); in __xor_altivec_3()
112 XOR(v1, v2); in __xor_altivec_4()
113 XOR(v3, v4); in __xor_altivec_4()
114 XOR(v1, v3); in __xor_altivec_4()
144 XOR(v1, v2); in __xor_altivec_5()
145 XOR(v3, v4); in __xor_altivec_5()
146 XOR(v1, v5); in __xor_altivec_5()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-gated-clock.txt45 22 xor0 XOR DMA 0
46 23 xor1 XOR DMA 0
75 22 xor0 XOR 0
78 28 xor1 XOR 1
92 22 xor0 XOR 0
93 28 xor1 XOR 1
115 22 xor0 XOR DMA 0
118 28 xor1 XOR DMA 1
130 22 xor0 XOR DMA 0
150 23 xor0 XOR DMA 0
[all …]
/openbmc/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dppc440spe-adma.txt1 PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator)
4 are specified hereby. These are I2O/DMA, DMA and XOR nodes
60 iii) XOR Accelerator node
64 - compatible : "amcc,xor-accelerator";
66 - interrupts : <interrupt mapping for XOR interrupt source>
70 xor-accel@400200000 {
71 compatible = "amcc,xor-accelerator";
/openbmc/linux/arch/x86/kvm/vmx/
H A Dvmenter.S127 xor %edx, %edx
225 xor %ebx, %ebx
241 xor %eax, %eax
242 xor %ecx, %ecx
243 xor %edx, %edx
244 xor %ebp, %ebp
245 xor %esi, %esi
246 xor %edi, %edi
248 xor %r8d, %r8d
249 xor %r9d, %r9d
[all …]
/openbmc/linux/lib/raid6/
H A Ds390vx.uc5 * $#-way unrolled RAID6 gen/xor functions for s390
52 static inline void XOR(int x, int y, int z)
93 p = dptr[z0 + 1]; /* XOR parity */
103 XOR(8+$$,8+$$,16+$$);
105 XOR(0+$$,0+$$,16+$$);
106 XOR(8+$$,8+$$,16+$$);
123 p = dptr[disks - 2]; /* XOR parity */
137 XOR(8+$$,8+$$,16+$$);
139 XOR(0+$$,0+$$,16+$$);
140 XOR(8+$$,8+$$,16+$$);
[all …]
/openbmc/linux/arch/x86/kvm/svm/
H A Dvmenter.S58 xor %edx, %edx
89 xor %edx, %edx
236 xor %ecx, %ecx
237 xor %edx, %edx
238 xor %ebx, %ebx
239 xor %ebp, %ebp
240 xor %esi, %esi
241 xor %edi, %edi
243 xor %r8d, %r8d
244 xor %r9d, %r9d
[all …]

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