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/openbmc/linux/sound/soc/fsl/
H A Dfsl_xcvr.c98 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_arc_mode_put() local
102 xcvr->arc_mode = snd_soc_enum_item_to_val(e, item[0]); in fsl_xcvr_arc_mode_put()
111 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_arc_mode_get() local
113 ucontrol->value.enumerated.item[0] = xcvr->arc_mode; in fsl_xcvr_arc_mode_get()
143 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_capds_get() local
145 memcpy(ucontrol->value.bytes.data, xcvr->cap_ds, FSL_XCVR_CAPDS_SIZE); in fsl_xcvr_capds_get()
154 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_capds_put() local
156 memcpy(xcvr->cap_ds, ucontrol->value.bytes.data, FSL_XCVR_CAPDS_SIZE); in fsl_xcvr_capds_put()
201 struct fsl_xcvr *xcvr = snd_soc_dai_get_drvdata(dai); in fsl_xcvr_mode_put() local
207 xcvr->mode = snd_soc_enum_item_to_val(e, item[0]); in fsl_xcvr_mode_put()
[all …]
H A DKconfig102 tristate "NXP Audio Transceiver (XCVR) module support"
107 Say Y if you want to add Audio Transceiver (XCVR) support for NXP
108 iMX CPUs. XCVR is a digital module that supports HDMI2.1 eARC,
H A DMakefile28 snd-soc-fsl-xcvr-objs := fsl_xcvr.o
45 obj-$(CONFIG_SND_SOC_FSL_XCVR) += snd-soc-fsl-xcvr.o
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,xcvr.yaml4 $id: http://devicetree.org/schemas/sound/fsl,xcvr.yaml#
7 title: NXP Audio Transceiver (XCVR) Controller
13 NXP XCVR (Audio Transceiver) is a on-chip functional module
19 pattern: "^xcvr@.*"
23 - fsl,imx8mp-xcvr
24 - fsl,imx93-xcvr
89 xcvr: xcvr@30cc0000 {
90 compatible = "fsl,imx8mp-xcvr";
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra20-usb-phy.yaml161 nvidia,xcvr-setup:
165 description: Input of XCVR cell, HS driver output control.
167 nvidia,xcvr-setup-use-fuses:
171 nvidia,xcvr-lsfslew:
177 nvidia,xcvr-lsrslew:
183 nvidia,xcvr-hsslew:
249 - nvidia,xcvr-lsfslew
250 - nvidia,xcvr-lsrslew
253 - required: ["nvidia,xcvr-setup"]
254 - required: ["nvidia,xcvr-setup-use-fuses"]
[all …]
/openbmc/linux/drivers/net/ethernet/pensando/ionic/
H A Dionic_ethtool.c140 switch (le16_to_cpu(idev->port_info->status.xcvr.pid)) { in ionic_get_link_ksettings()
225 dev_info(lif->ionic->dev, "unknown xcvr type pid=%d / 0x%x\n", in ionic_get_link_ksettings()
226 idev->port_info->status.xcvr.pid, in ionic_get_link_ksettings()
227 idev->port_info->status.xcvr.pid); in ionic_get_link_ksettings()
243 if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_COPPER || in ionic_get_link_ksettings()
246 else if (idev->port_info->status.xcvr.phy == IONIC_PHY_TYPE_FIBER) in ionic_get_link_ksettings()
902 struct ionic_xcvr_status *xcvr; in ionic_get_module_info() local
905 xcvr = &idev->port_info->status.xcvr; in ionic_get_module_info()
906 sfp = (struct sfp_eeprom_base *) xcvr->sprom; in ionic_get_module_info()
920 netdev_info(netdev, "unknown xcvr type 0x%02x\n", in ionic_get_module_info()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra30.dtsi825 nvidia,xcvr-setup = <51>;
826 nvidia.xcvr-setup-use-fuses;
827 nvidia,xcvr-lsfslew = <1>;
828 nvidia,xcvr-lsrslew = <1>;
829 nvidia,xcvr-hsslew = <32>;
862 nvidia,xcvr-setup = <51>;
863 nvidia.xcvr-setup-use-fuses;
864 nvidia,xcvr-lsfslew = <2>;
865 nvidia,xcvr-lsrslew = <2>;
866 nvidia,xcvr-hsslew = <32>;
[all …]
H A Dtegra124.dtsi894 nvidia,xcvr-setup = <9>;
895 nvidia,xcvr-lsfslew = <0>;
896 nvidia,xcvr-lsrslew = <3>;
899 nvidia,xcvr-hsslew = <12>;
931 nvidia,xcvr-setup = <9>;
932 nvidia,xcvr-lsfslew = <0>;
933 nvidia,xcvr-lsrslew = <3>;
936 nvidia,xcvr-hsslew = <12>;
967 nvidia,xcvr-setup = <9>;
968 nvidia,xcvr-lsfslew = <0>;
[all …]
H A Dtegra114.dtsi700 nvidia,xcvr-setup = <9>;
701 nvidia,xcvr-lsfslew = <0>;
702 nvidia,xcvr-lsrslew = <3>;
705 nvidia,xcvr-hsslew = <12>;
736 nvidia,xcvr-setup = <9>;
737 nvidia,xcvr-lsfslew = <0>;
738 nvidia,xcvr-lsrslew = <3>;
741 nvidia,xcvr-hsslew = <12>;
H A Dtegra210.dtsi794 nvidia,xcvr-setup = <9>;
795 nvidia,xcvr-lsfslew = <0>;
796 nvidia,xcvr-lsrslew = <3>;
799 nvidia,xcvr-hsslew = <12>;
832 nvidia,xcvr-setup = <9>;
833 nvidia,xcvr-lsfslew = <0>;
834 nvidia,xcvr-lsrslew = <3>;
837 nvidia,xcvr-hsslew = <12>;
H A Dtegra20.dtsi675 nvidia,xcvr-setup = <9>;
676 nvidia,xcvr-lsfslew = <1>;
677 nvidia,xcvr-lsrslew = <1>;
734 nvidia,xcvr-setup = <9>;
735 nvidia,xcvr-lsfslew = <2>;
736 nvidia,xcvr-lsrslew = <2>;
/openbmc/linux/drivers/scsi/isci/
H A Dhost.c1982 struct scu_afe_transceiver __iomem *xcvr = &afe->scu_afe_xcvr[phy_id]; in sci_controller_afe_initialization() local
1993 writel(0x00004512, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
1996 writel(0x0050100F, &xcvr->afe_xcvr_control1); in sci_controller_afe_initialization()
2000 writel(0x00030000, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2004 writel(0x00010202, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2010 writel(0x00014500, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2014 writel(0x00010202, &xcvr->afe_tx_ssc_control); in sci_controller_afe_initialization()
2020 writel(0x0001C500, &xcvr->afe_xcvr_control0); in sci_controller_afe_initialization()
2028 writel(0x000003F0, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
2030 writel(0x000003D7, &xcvr->afe_channel_control); in sci_controller_afe_initialization()
[all …]
H A Dphy.c172 struct scu_afe_transceiver __iomem *xcvr = &afe->scu_afe_xcvr[phy_idx]; in sci_phy_link_layer_initialization() local
203 reg = readl(&xcvr->afe_xcvr_control0); in sci_phy_link_layer_initialization()
205 writel(reg, &xcvr->afe_xcvr_control0); in sci_phy_link_layer_initialization()
207 reg = readl(&xcvr->afe_tx_ssc_control); in sci_phy_link_layer_initialization()
209 writel(reg, &xcvr->afe_tx_ssc_control); in sci_phy_link_layer_initialization()
215 reg = readl(&xcvr->afe_tx_ssc_control); in sci_phy_link_layer_initialization()
217 writel(reg, &xcvr->afe_tx_ssc_control); in sci_phy_link_layer_initialization()
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30.dtsi1142 nvidia,xcvr-setup = <51>;
1143 nvidia,xcvr-setup-use-fuses;
1144 nvidia,xcvr-lsfslew = <1>;
1145 nvidia,xcvr-lsrslew = <1>;
1146 nvidia,xcvr-hsslew = <32>;
1185 nvidia,xcvr-setup = <51>;
1186 nvidia,xcvr-setup-use-fuses;
1187 nvidia,xcvr-lsfslew = <2>;
1188 nvidia,xcvr-lsrslew = <2>;
1189 nvidia,xcvr-hsslew = <32>;
[all …]
H A Dtegra124.dtsi1097 nvidia,xcvr-setup = <9>;
1098 nvidia,xcvr-lsfslew = <0>;
1099 nvidia,xcvr-lsrslew = <3>;
1102 nvidia,xcvr-hsslew = <12>;
1137 nvidia,xcvr-setup = <9>;
1138 nvidia,xcvr-lsfslew = <0>;
1139 nvidia,xcvr-lsrslew = <3>;
1142 nvidia,xcvr-hsslew = <12>;
1176 nvidia,xcvr-setup = <9>;
1177 nvidia,xcvr-lsfslew = <0>;
[all …]
H A Dtegra114.dtsi754 nvidia,xcvr-setup = <9>;
755 nvidia,xcvr-lsfslew = <0>;
756 nvidia,xcvr-lsrslew = <3>;
759 nvidia,xcvr-hsslew = <12>;
794 nvidia,xcvr-setup = <9>;
795 nvidia,xcvr-lsfslew = <0>;
796 nvidia,xcvr-lsrslew = <3>;
799 nvidia,xcvr-hsslew = <12>;
H A Dtegra114-tn7.dts259 nvidia,xcvr-setup = <7>;
260 nvidia,xcvr-lsfslew = <2>;
261 nvidia,xcvr-lsrslew = <2>;
H A Dtegra114-roth.dts989 nvidia,xcvr-setup = <7>;
990 nvidia,xcvr-lsfslew = <2>;
991 nvidia,xcvr-lsrslew = <2>;
1005 nvidia,xcvr-setup = <7>;
1006 nvidia,xcvr-lsfslew = <2>;
1007 nvidia,xcvr-lsrslew = <2>;
H A Dtegra30-asus-tf201.dts590 /delete-property/ nvidia,xcvr-setup-use-fuses;
591 nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */
595 /delete-property/ nvidia,xcvr-setup-use-fuses;
596 nvidia,xcvr-setup = <5>; /* Based on TF201 fuse value - 48 */
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi1026 nvidia,xcvr-setup = <9>;
1027 nvidia,xcvr-lsfslew = <0>;
1028 nvidia,xcvr-lsrslew = <3>;
1031 nvidia,xcvr-hsslew = <12>;
1067 nvidia,xcvr-setup = <9>;
1068 nvidia,xcvr-lsfslew = <0>;
1069 nvidia,xcvr-lsrslew = <3>;
1072 nvidia,xcvr-hsslew = <12>;
1107 nvidia,xcvr-setup = <9>;
1108 nvidia,xcvr-lsfslew = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx53-tx53.dtsi62 reg-can-xcvr = &reg_can_xcvr;
118 reg_can_xcvr: regulator-can-xcvr {
120 regulator-name = "CAN XCVR";
332 fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
H A Dimx6qdl-tx6.dtsi57 reg-can-xcvr = &reg_can_xcvr;
131 reg_can_xcvr: regulator-can-xcvr {
133 regulator-name = "CAN XCVR";
514 MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b0b0 /* Flexcan XCVR enable */
H A Dimx6qdl-nitrogen6x.dtsi45 reg_can_xcvr: regulator-can-xcvr {
47 regulator-name = "CAN XCVR";
373 /* Flexcan XCVR enable */
H A Dimx6qdl-nitrogen6_som2.dtsi171 reg_can_xcvr: regulator-can-xcvr {
173 regulator-name = "CAN XCVR";
359 /* Flexcan XCVR enable */
/openbmc/linux/drivers/net/ethernet/fungible/funeth/
H A Dfuneth_ethtool.c188 static unsigned int fun_port_type(unsigned int xcvr) in fun_port_type() argument
190 if (!xcvr) in fun_port_type()
193 switch (xcvr & 7) { in fun_port_type()
207 unsigned int seq, speed, xcvr; in fun_get_link_ksettings() local
220 xcvr = fp->xcvr_type; in fun_get_link_ksettings()
236 ks->base.port = fun_port_type(xcvr); in fun_get_link_ksettings()

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