| /openbmc/linux/tools/testing/selftests/arm64/abi/ |
| H A D | syscall-abi-asm.S | 85 adrp x2, svcr_in
86 ldr x2, [x2, :lo12:svcr_in]
87 msr S3_3_C4_C2_2, x2
90 tbz x2, #SVCR_ZA_SHIFT, load_gpr
92 ldr x2, =za_in
94 add x2, x2, x1
100 mrs x2, S3_0_C0_C4_5 // ID_AA64SMFR0_EL1
101 ubfx x2, x2, #ID_AA64SMFR0_EL1_SMEver_SHIFT, \
103 cbz x2, load_gpr
104 adrp x2, zt_in
[all …]
|
| /openbmc/linux/arch/x86/crypto/ |
| H A D | serpent-avx2-asm_64.S | 51 #define S0_1(x0, x1, x2, x3, x4) \ argument
54 vpxor x2, x3, x4; \
59 vpxor x0, x2, x2;
60 #define S0_2(x0, x1, x2, x3, x4) \ argument
63 vpxor x2, x0, x0; \
64 vpand x1, x2, x2; \
65 vpxor x2, x3, x3; \
67 vpxor x4, x2, x2; \
68 vpxor x2, x1, x1;
70 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
|
| H A D | serpent-avx-x86_64-asm_64.S | 51 #define S0_1(x0, x1, x2, x3, x4) \ argument
54 vpxor x2, x3, x4; \
59 vpxor x0, x2, x2;
60 #define S0_2(x0, x1, x2, x3, x4) \ argument
63 vpxor x2, x0, x0; \
64 vpand x1, x2, x2; \
65 vpxor x2, x3, x3; \
67 vpxor x4, x2, x2; \
68 vpxor x2, x1, x1;
70 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
|
| H A D | serpent-sse2-i586-asm_32.S | 42 #define K(x0, x1, x2, x3, x4, i) \ argument
48 pxor RT1, x2; \
52 #define LK(x0, x1, x2, x3, x4, i) \ argument
58 movdqa x2, x4; \
59 pslld $3, x2; \
61 por x4, x2; \
62 pxor x2, x1; \
69 pxor x2, x3; \
79 pxor x3, x2; \
80 pxor x4, x2; \
[all …]
|
| H A D | serpent-sse2-x86_64-asm_64.S | 41 #define S0_1(x0, x1, x2, x3, x4) \ argument
45 pxor x2, x4; \
50 pxor x0, x2;
51 #define S0_2(x0, x1, x2, x3, x4) \ argument
54 pxor x2, x0; \
55 pand x1, x2; \
56 pxor x2, x3; \
58 pxor x4, x2; \
59 pxor x2, x1;
61 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
|
| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | mpc8568mds.dts | 29 0x2 0x0 0xf0000000 0x04000000
97 reg = <0x2>;
128 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
129 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
130 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
131 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
132 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */
133 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */
134 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */
135 0x4 0x14 0x1 0x0 0x2 0x0 /* TxD7 */
[all …]
|
| H A D | mpc8569mds.dts | 34 0x2 0x0 0x0 0xf0000000 0x04000000
143 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
144 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */
145 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/
148 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */
149 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
150 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */
151 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */
152 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
153 0x0 0x9 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
[all …]
|
| H A D | p1025twr.dtsi | 98 reg = <0x2 0x0000 0x0004>;
112 reg = <0x2>;
180 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
181 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
182 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
183 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
184 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
185 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
186 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
187 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
[all …]
|
| H A D | p1025rdb.dtsi | 253 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
254 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
255 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
256 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
257 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
258 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
259 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
260 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
261 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
262 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
[all …]
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | imx7ulp-pinfunc.h | 29 #define ULP1_PAD_PTA0_LLWU0_P0__LPSPI0_PCS1 0x0000 0xd104 0x3 0x2
30 #define ULP1_PAD_PTA0_LLWU0_P0__LPUART0_CTS_B 0x0000 0xd1f8 0x4 0x2
31 #define ULP1_PAD_PTA0_LLWU0_P0__LPI2C0_SCL 0x0000 0xd17c 0x5 0x2
32 #define ULP1_PAD_PTA0_LLWU0_P0__TPM0_CLKIN 0x0000 0xd1a8 0x6 0x2
33 #define ULP1_PAD_PTA0_LLWU0_P0__I2S0_RX_BCLK 0x0000 0x01b8 0x7 0x2
107 #define ULP1_PAD_PTA11__I2S0_RX_FS 0x002c 0x01bc 0x7 0x2
114 #define ULP1_PAD_PTA12__I2S0_RXD0 0x0030 0x01dc 0x7 0x2
119 #define ULP1_PAD_PTA13_LLWU0_P2__LPSPI1_SOUT 0x0034 0xd134 0x3 0x2
121 #define ULP1_PAD_PTA13_LLWU0_P2__LPI2C3_SDA 0x0034 0xd1a4 0x5 0x2
123 #define ULP1_PAD_PTA13_LLWU0_P2__I2S0_RXD1 0x0034 0x01e0 0x7 0x2
[all …]
|
| H A D | imx6sll-pinfunc.h | 19 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0
23 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0
30 #define MX6SLL_PAD_REF_CLK_32K__PWM4_OUT 0x001C 0x02E4 0x0000 0x2 0x0
37 #define MX6SLL_PAD_PWM1__AUDIO_CLK_OUT 0x0020 0x02E8 0x0000 0x2 0x0
43 #define MX6SLL_PAD_KEY_COL0__LCD_DATA00 0x0024 0x02EC 0x06D8 0x2 0x0
48 #define MX6SLL_PAD_KEY_ROW0__LCD_DATA01 0x0028 0x02F0 0x06DC 0x2 0x0
53 #define MX6SLL_PAD_KEY_COL1__LCD_DATA02 0x002C 0x02F4 0x06E0 0x2 0x0
58 #define MX6SLL_PAD_KEY_ROW1__LCD_DATA03 0x0030 0x02F8 0x06E4 0x2 0x0
64 #define MX6SLL_PAD_KEY_COL2__LCD_DATA04 0x0034 0x02FC 0x06E8 0x2 0x0
70 #define MX6SLL_PAD_KEY_ROW2__LCD_DATA05 0x0038 0x0300 0x06EC 0x2 0x0
[all …]
|
| H A D | imx6sl-pinfunc.h | 19 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
26 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
27 #define MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x050 0x2a8 0x80c 0x2 0x0
34 #define MX6SL_PAD_AUD_RXD__UART4_RX_DATA 0x054 0x2ac 0x814 0x2 0x0
35 #define MX6SL_PAD_AUD_RXD__UART4_TX_DATA 0x054 0x2ac 0x000 0x2 0x0
41 #define MX6SL_PAD_AUD_RXFS__UART3_RX_DATA 0x058 0x2b0 0x80c 0x2 0x1
42 #define MX6SL_PAD_AUD_RXFS__UART3_TX_DATA 0x058 0x2b0 0x000 0x2 0x0
49 #define MX6SL_PAD_AUD_TXC__UART4_TX_DATA 0x05c 0x2b4 0x000 0x2 0x0
50 #define MX6SL_PAD_AUD_TXC__UART4_RX_DATA 0x05c 0x2b4 0x814 0x2 0x1
56 #define MX6SL_PAD_AUD_TXD__UART4_CTS_B 0x060 0x2b8 0x000 0x2 0x0
[all …]
|
| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8ulp-pinfunc.h | 123 #define MX8ULP_PAD_PTD11__TPM8_CH5 0x002C 0x0B2C 0x6 0x2
176 #define MX8ULP_PAD_PTD16__FXIO1_D31 0x0040 0x08A0 0x2 0x1
189 #define MX8ULP_PAD_PTD17__FXIO1_D30 0x0044 0x089C 0x2 0x1
191 #define MX8ULP_PAD_PTD17__EXT_AUD_MCLK3 0x0044 0x0B14 0x4 0x2
202 #define MX8ULP_PAD_PTD18__FXIO1_D29 0x0048 0x0894 0x2 0x1
206 #define MX8ULP_PAD_PTD18__TPM8_CH0 0x0048 0x0B18 0x6 0x2
215 #define MX8ULP_PAD_PTD19__FXIO1_D28 0x004C 0x0890 0x2 0x1
217 #define MX8ULP_PAD_PTD19__TPM8_CH1 0x004C 0x0B1C 0x6 0x2
226 #define MX8ULP_PAD_PTD20__FXIO1_D27 0x0050 0x088C 0x2 0x1
229 #define MX8ULP_PAD_PTD20__TPM8_CLKIN 0x0050 0x0B30 0x6 0x2
[all …]
|
| /openbmc/linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-serdes.h | 15 #define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2
20 #define J721E_SERDES0_LANE1_USB3_0 0x2
25 #define J721E_SERDES1_LANE0_USB3_1_SWAP 0x2
30 #define J721E_SERDES1_LANE1_USB3_1 0x2
35 #define J721E_SERDES2_LANE0_USB3_1_SWAP 0x2
40 #define J721E_SERDES2_LANE1_USB3_1 0x2
45 #define J721E_SERDES3_LANE0_USB3_0_SWAP 0x2
50 #define J721E_SERDES3_LANE1_USB3_0 0x2
55 #define J721E_SERDES4_LANE0_QSGMII_LANE5 0x2
60 #define J721E_SERDES4_LANE1_QSGMII_LANE6 0x2
[all …]
|
| /openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx7ulp-pinfunc.h | 40 #define IMX7ULP_PAD_PTC4__FXIO1_D0 0x0010 0x0204 0x2 0x1
48 #define IMX7ULP_PAD_PTC5__FXIO1_D1 0x0014 0x0208 0x2 0x1
56 #define IMX7ULP_PAD_PTC6__FXIO1_D2 0x0018 0x020c 0x2 0x1
64 #define IMX7ULP_PAD_PTC7__FXIO1_D3 0x001c 0x0210 0x2 0x1
70 #define IMX7ULP_PAD_PTC8__FXIO1_D4 0x0020 0x0214 0x2 0x1
78 #define IMX7ULP_PAD_PTC9__FXIO1_D5 0x0024 0x0218 0x2 0x1
86 #define IMX7ULP_PAD_PTC10__FXIO1_D6 0x0028 0x021c 0x2 0x1
94 #define IMX7ULP_PAD_PTC11__FXIO1_D7 0x002c 0x0220 0x2 0x1
101 #define IMX7ULP_PAD_PTC12__FXIO1_D8 0x0030 0x0224 0x2 0x1
109 #define IMX7ULP_PAD_PTC13__FXIO1_D9 0x0034 0x0228 0x2 0x1
[all …]
|
| H A D | imx6sll-pinfunc.h | 17 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0
21 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0
28 #define MX6SLL_PAD_REF_CLK_32K__PWM4_OUT 0x001C 0x02E4 0x0000 0x2 0x0
35 #define MX6SLL_PAD_PWM1__AUDIO_CLK_OUT 0x0020 0x02E8 0x0000 0x2 0x0
41 #define MX6SLL_PAD_KEY_COL0__LCD_DATA00 0x0024 0x02EC 0x06D8 0x2 0x0
46 #define MX6SLL_PAD_KEY_ROW0__LCD_DATA01 0x0028 0x02F0 0x06DC 0x2 0x0
51 #define MX6SLL_PAD_KEY_COL1__LCD_DATA02 0x002C 0x02F4 0x06E0 0x2 0x0
56 #define MX6SLL_PAD_KEY_ROW1__LCD_DATA03 0x0030 0x02F8 0x06E4 0x2 0x0
62 #define MX6SLL_PAD_KEY_COL2__LCD_DATA04 0x0034 0x02FC 0x06E8 0x2 0x0
68 #define MX6SLL_PAD_KEY_ROW2__LCD_DATA05 0x0038 0x0300 0x06EC 0x2 0x0
[all …]
|
| H A D | imx6sl-pinfunc.h | 15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
23 #define MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x050 0x2a8 0x80c 0x2 0x0
30 #define MX6SL_PAD_AUD_RXD__UART4_RX_DATA 0x054 0x2ac 0x814 0x2 0x0
31 #define MX6SL_PAD_AUD_RXD__UART4_TX_DATA 0x054 0x2ac 0x000 0x2 0x0
37 #define MX6SL_PAD_AUD_RXFS__UART3_RX_DATA 0x058 0x2b0 0x80c 0x2 0x1
38 #define MX6SL_PAD_AUD_RXFS__UART3_TX_DATA 0x058 0x2b0 0x000 0x2 0x0
45 #define MX6SL_PAD_AUD_TXC__UART4_TX_DATA 0x05c 0x2b4 0x000 0x2 0x0
46 #define MX6SL_PAD_AUD_TXC__UART4_RX_DATA 0x05c 0x2b4 0x814 0x2 0x1
52 #define MX6SL_PAD_AUD_TXD__UART4_CTS_B 0x060 0x2b8 0x000 0x2 0x0
[all …]
|
| /openbmc/linux/arch/arm64/lib/ |
| H A D | tishift.S | 11 cbz x2, 1f
13 sub x3, x3, x2
16 lsl x1, x1, x2
18 lsl x2, x0, x2
20 mov x0, x2
25 mov x2, #0
27 mov x0, x2
33 cbz x2, 1f
35 sub x3, x3, x2
38 lsr x0, x0, x2
[all …]
|
| /openbmc/linux/include/dt-bindings/mux/ |
| H A D | ti-serdes.h | 21 #define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2
26 #define J721E_SERDES0_LANE1_USB3_0 0x2
31 #define J721E_SERDES1_LANE0_USB3_1_SWAP 0x2
36 #define J721E_SERDES1_LANE1_USB3_1 0x2
41 #define J721E_SERDES2_LANE0_USB3_1_SWAP 0x2
46 #define J721E_SERDES2_LANE1_USB3_1 0x2
51 #define J721E_SERDES3_LANE0_USB3_0_SWAP 0x2
56 #define J721E_SERDES3_LANE1_USB3_0 0x2
61 #define J721E_SERDES4_LANE0_QSGMII_LANE5 0x2
66 #define J721E_SERDES4_LANE1_QSGMII_LANE6 0x2
[all …]
|
| /openbmc/qemu/tests/tcg/i386/ |
| H A D | test-i386-fyl2xp1.c | 30 …{ 0x2.a22cf9563bdd84bcp-140L, -0x2.de6fb39cd2988858p-9616L, -0xa.e65ebedd6a09e4cp-9756L, -0xa.e65e…
33 …{ -0x4.69bcd5ccca0e4b7p-4L, -0x5.8808ae941f249bb8p+5056L, 0x2.93432047c7d8a37p+5056L, 0x2.93432047…
35 …{ -0x2.d60110be2e4f812p-4L, 0x9.d61827e646421b3p-11580L, -0x2.c4c3e84b6c7366c8p-11580L, -0x2.c4c3e…
37 …{ -0x2.a675c1a9bd30047cp-4L, 0x7.6eae536d8312ebb8p+364L, -0x1.f116f2eaf6acba9ep+364L, -0x1.f116f2e…
40 …{ 0x3.e104f8db9c02bf08p-4L, -0x9.7b905723db3fe54p+10116L, -0x2.f83eb6c0529e814p+10116L, -0x2.f83eb…
44 …{ 0x3.005497260bfe3efcp-4L, 0x2.70b5fc4ea650b9d4p+13164L, 0x9.af1b9b78be96p+13160L, 0x9.af1b9b78be…
50 …{ 0x2.6770b5d4fbdb93ap-4L, 0x2.d0747a0fc160c9d8p-680L, 0x9.17f6580ba6d8d8fp-684L, 0x9.17f6580ba6d8…
52 { 0x2.810e5178p-16416L, -0x2.449b1281f31c58ccp-8912L, -0x8p-16448L, -0x0p+0L },
53 …{ -0x9.d14aa8cda67cd5p-80L, 0x2.3ff156f07699390cp+1860L, -0x1.fdd7e7674c238f56p+1784L, -0x1.fdd7e7…
54 …{ 0x4.336973fa388adee8p-4L, 0x6.68a249106b0173e8p+1992L, 0x2.27d09f940daa748cp+1992L, 0x2.27d09f94…
[all …]
|
| /openbmc/linux/crypto/ |
| H A D | serpent_generic.c | 27 #define loadkeys(x0, x1, x2, x3, i) \ argument
28 ({ x0 = k[i]; x1 = k[i+1]; x2 = k[i+2]; x3 = k[i+3]; })
30 #define storekeys(x0, x1, x2, x3, i) \ argument
31 ({ k[i] = x0; k[i+1] = x1; k[i+2] = x2; k[i+3] = x3; })
33 #define store_and_load_keys(x0, x1, x2, x3, s, l) \ argument
34 ({ storekeys(x0, x1, x2, x3, s); loadkeys(x0, x1, x2, x3, l); })
36 #define K(x0, x1, x2, x3, i) ({ \ argument
37 x3 ^= k[4*(i)+3]; x2 ^= k[4*(i)+2]; \
41 #define LK(x0, x1, x2, x3, x4, i) ({ \ argument
43 x2 = rol32(x2, 3); x1 ^= x0; x4 = x0 << 3; \
[all …]
|
| /openbmc/linux/drivers/pinctrl/sunxi/ |
| H A D | pinctrl-sun8i-a33.c | 27 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
33 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
39 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
44 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
49 SUNXI_FUNCTION(0x2, "i2s0"), /* SYNC */
55 SUNXI_FUNCTION(0x2, "i2s0"), /* BCLK */
61 SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */
67 SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */
74 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
79 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
[all …]
|
| H A D | pinctrl-sun8i-h3.c | 26 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
32 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
38 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
44 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
50 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
55 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
61 SUNXI_FUNCTION(0x2, "sim"), /* PWREN */
66 SUNXI_FUNCTION(0x2, "sim"), /* CLK */
71 SUNXI_FUNCTION(0x2, "sim"), /* DATA */
76 SUNXI_FUNCTION(0x2, "sim"), /* RST */
[all …]
|
| H A D | pinctrl-sun8i-a23.c | 28 SUNXI_FUNCTION(0x2, "spi1"), /* CS */
34 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
40 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
46 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
52 SUNXI_FUNCTION(0x2, "uart4"), /* TX */
57 SUNXI_FUNCTION(0x2, "uart4"), /* RX */
62 SUNXI_FUNCTION(0x2, "uart4"), /* RTS */
67 SUNXI_FUNCTION(0x2, "uart4"), /* CTS */
73 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
78 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
[all …]
|
| H A D | pinctrl-sun6i-a31.c | 24 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
32 SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */
40 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
48 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
56 SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */
64 SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */
72 SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */
80 SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */
88 SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */
95 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
[all …]
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