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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368-lion.dtsi109 cpu-supply = <&vdd_cpu>;
113 cpu-supply = <&vdd_cpu>;
117 cpu-supply = <&vdd_cpu>;
121 cpu-supply = <&vdd_cpu>;
125 cpu-supply = <&vdd_cpu>;
129 cpu-supply = <&vdd_cpu>;
133 cpu-supply = <&vdd_cpu>;
137 cpu-supply = <&vdd_cpu>;
194 vdd_cpu: DCDC_REG1 { label
195 regulator-name = "vdd_cpu";
H A Drk3568-radxa-cm3i.dtsi96 cpu-supply = <&vdd_cpu>;
100 cpu-supply = <&vdd_cpu>;
104 cpu-supply = <&vdd_cpu>;
108 cpu-supply = <&vdd_cpu>;
123 vdd_cpu: regulator@1c { label
127 regulator-name = "vdd_cpu";
H A Drk3568-fastrhino-r66s.dtsi103 cpu-supply = <&vdd_cpu>;
107 cpu-supply = <&vdd_cpu>;
111 cpu-supply = <&vdd_cpu>;
115 cpu-supply = <&vdd_cpu>;
130 vdd_cpu: regulator@1c { label
134 regulator-name = "vdd_cpu";
H A Drk3566-radxa-cm3.dtsi81 cpu-supply = <&vdd_cpu>;
85 cpu-supply = <&vdd_cpu>;
89 cpu-supply = <&vdd_cpu>;
93 cpu-supply = <&vdd_cpu>;
104 vdd_cpu: regulator@1c { label
108 regulator-name = "vdd_cpu";
H A Drk3566-box-demo.dts191 vdd_cpu: regulator-vdd-cpu { label
194 regulator-name = "vdd_cpu";
225 cpu-supply = <&vdd_cpu>;
229 cpu-supply = <&vdd_cpu>;
233 cpu-supply = <&vdd_cpu>;
237 cpu-supply = <&vdd_cpu>;
H A Drk3568-nanopi-r5s.dtsi148 cpu-supply = <&vdd_cpu>;
152 cpu-supply = <&vdd_cpu>;
156 cpu-supply = <&vdd_cpu>;
160 cpu-supply = <&vdd_cpu>;
193 vdd_cpu: regulator@1c { label
197 regulator-name = "vdd_cpu";
H A Drk3566-lubancat-1.dts129 cpu-supply = <&vdd_cpu>;
133 cpu-supply = <&vdd_cpu>;
137 cpu-supply = <&vdd_cpu>;
141 cpu-supply = <&vdd_cpu>;
174 vdd_cpu: regulator@1c { label
178 regulator-name = "vdd_cpu";
H A Drk3568-evb1-v10.dts172 cpu-supply = <&vdd_cpu>;
176 cpu-supply = <&vdd_cpu>;
180 cpu-supply = <&vdd_cpu>;
184 cpu-supply = <&vdd_cpu>;
249 vdd_cpu: regulator@1c { label
253 regulator-name = "vdd_cpu";
H A Drk3566-soquartz.dtsi110 cpu-supply = <&vdd_cpu>;
114 cpu-supply = <&vdd_cpu>;
118 cpu-supply = <&vdd_cpu>;
122 cpu-supply = <&vdd_cpu>;
191 vdd_cpu: regulator@1c { label
195 regulator-name = "vdd_cpu";
H A Drk3568-odroid-m1.dts182 cpu-supply = <&vdd_cpu>;
186 cpu-supply = <&vdd_cpu>;
190 cpu-supply = <&vdd_cpu>;
194 cpu-supply = <&vdd_cpu>;
247 vdd_cpu: regulator@1c { label
251 regulator-name = "vdd_cpu";
H A Drk3568-lubancat-2.dts152 cpu-supply = <&vdd_cpu>;
156 cpu-supply = <&vdd_cpu>;
160 cpu-supply = <&vdd_cpu>;
164 cpu-supply = <&vdd_cpu>;
197 vdd_cpu: regulator@1c { label
201 regulator-name = "vdd_cpu";
H A Drk3566-roc-pc.dts158 cpu-supply = <&vdd_cpu>;
162 cpu-supply = <&vdd_cpu>;
166 cpu-supply = <&vdd_cpu>;
170 cpu-supply = <&vdd_cpu>;
226 vdd_cpu: regulator@1c { label
230 regulator-name = "vdd_cpu";
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3188-px3-evb.dts52 cpu-supply = <&vdd_cpu>;
56 cpu-supply = <&vdd_cpu>;
60 cpu-supply = <&vdd_cpu>;
64 cpu-supply = <&vdd_cpu>;
111 vdd_cpu: DCDC_REG1 { label
H A Drk3288-r89.dts94 cpu-supply = <&vdd_cpu>;
98 cpu-supply = <&vdd_cpu>;
102 cpu-supply = <&vdd_cpu>;
106 cpu-supply = <&vdd_cpu>;
132 vdd_cpu: pmic@40 { label
136 regulator-name = "VDD_CPU";
H A Drk3288-miqi.dts84 cpu-supply = <&vdd_cpu>;
88 cpu-supply = <&vdd_cpu>;
92 cpu-supply = <&vdd_cpu>;
96 cpu-supply = <&vdd_cpu>;
140 vdd_cpu: syr827@40 { label
144 regulator-name = "vdd_cpu";
H A Drk3288-vyasa.dts128 cpu-supply = <&vdd_cpu>;
132 cpu-supply = <&vdd_cpu>;
136 cpu-supply = <&vdd_cpu>;
140 cpu-supply = <&vdd_cpu>;
208 vdd_cpu: DCDC_REG1 { label
H A Drk3288-popmetal.dts106 cpu-supply = <&vdd_cpu>;
110 cpu-supply = <&vdd_cpu>;
114 cpu-supply = <&vdd_cpu>;
118 cpu-supply = <&vdd_cpu>;
202 vdd_cpu: DCDC_REG1 { label
H A Drk3288-rock2-som.dtsi46 cpu0-supply = <&vdd_cpu>;
184 vdd_cpu: syr827@40 { label
191 regulator-name = "vdd_cpu";
/openbmc/u-boot/drivers/power/
H A Dtps6586x.c183 * if vdd_core < vdd_cpu + rel in tps6586x_adjust_sm0_sm1()
195 * Since vdd_core and vdd_cpu may both stand at either greater or less in tps6586x_adjust_sm0_sm1()
198 * Make sure vdd_core is always higher than vdd_cpu with certain margin. in tps6586x_adjust_sm0_sm1()
210 * Adjust vdd_core and vdd_cpu one step at a time until they reach in tps6586x_adjust_sm0_sm1()
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dcpu.c25 * up of the voltage to the CPU (VDD_CPU from PMU). in enable_cpu_power_rail()
32 /* Enable VDD_CPU */ in start_cpu()
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-nexus7-grouper-ti-pmic.dtsi52 vdd_cpu: vddctrl { label
53 regulator-name = "vdd_cpu,vdd_sys";
133 regulator-coupled-with = <&vdd_cpu>;
H A Dtegra30-asus-nexus7-grouper-maxim-pmic.dtsi65 vdd_cpu: sd0 { label
66 regulator-name = "vdd_cpu";
82 regulator-coupled-with = <&vdd_cpu>;
/openbmc/linux/arch/riscv/boot/dts/starfive/
H A Djh7110-starfive-visionfive-2.dtsi177 vdd_cpu: dcdc2 { label
483 cpu-supply = <&vdd_cpu>;
487 cpu-supply = <&vdd_cpu>;
491 cpu-supply = <&vdd_cpu>;
495 cpu-supply = <&vdd_cpu>;
/openbmc/linux/arch/arm/boot/dts/actions/
H A Dowl-s500-roseapplepi.dts40 cpu0-supply = <&vdd_cpu>;
73 vdd_cpu: dcdc1 { label
74 regulator-name = "VDD_CPU";
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dnvidia,tegra124-dfll.txt8 oscillator connected to the CPU voltage rail (VDD_CPU), and a closed loop
9 control module that will automatically adjust the VDD_CPU voltage by
90 vdd-cpu-supply = <&vdd_cpu>;

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