Home
last modified time | relevance | path

Searched +full:tri +full:- +full:state (Results 1 – 25 of 98) sorted by relevance

1234

/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra.h1 /* SPDX-License-Identifier: GPL-2.0-only */
47 /* argument: Integer, range is HW-dependant */
49 /* argument: Integer, range is HW-dependant */
51 /* argument: Integer, range is HW-dependant */
53 /* argument: Integer, range is HW-dependant */
55 /* argument: Integer, range is HW-dependant */
75 * struct tegra_function - Tegra pinctrl mux function
87 * struct tegra_pingroup - Tegra pin group
97 * @pupd_reg: Pull-up/down register offset.
98 * @pupd_bank: Pull-up/down register bank.
[all …]
/openbmc/linux/scripts/kconfig/
H A Dsymbol.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
46 enum symbol_type type = sym->type; in sym_get_type()
49 if (sym_is_choice_value(sym) && sym->visible == yes) in sym_get_type()
90 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_default_prop()
91 if (prop->visible.tri != no) in sym_get_default_prop()
102 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_range_prop()
103 if (prop->visible.tri != no) in sym_get_range_prop()
112 switch (sym->type) { in sym_get_range_val()
122 return strtoll(sym->curr.val, NULL, base); in sym_get_range_val()
[all …]
H A Dconfdata.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
99 tmp[sizeof(tmp) - 1] = 0; in make_parent_dir()
117 return -1; in make_parent_dir()
137 return -1; in conf_touch_dep()
142 if (fd == -1) in conf_touch_dep()
143 return -1; in conf_touch_dep()
230 switch (sym->type) { in conf_set_sym_val()
233 sym->def[def].tri = mod; in conf_set_sym_val()
234 sym->flags |= def_flags; in conf_set_sym_val()
[all …]
H A Dexpr.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
49 #define EXPR_NOT(dep) (2-(dep))
52 for (e = (l); e && (s = e->right.sym); e = e->left.expr)
56 tristate tri; member
61 tristate tri; member
134 …bols(i, sym) for (i = 0; i < SYMBOL_HASHSIZE; i++) for (sym = symbol_hash[i]; sym; sym = sym->next)
141 #define SYMBOL_OPTIONAL 0x0100 /* choice is optional - values can be 'n' */
144 #define SYMBOL_WRITTEN 0x0800 /* track info to avoid double-write to .config */
190 struct property *next; /* next property - null if last */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
21 for client device device tree nodes to map those state names to the pin
25 For example, a pin controller may set up its own "active" state when the
35 For each client device individually, every pin state is assigned an integer
36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique
37 property exists to define the pin configuration. Each state may also be
42 defined in its device tree node, and whether to define the set of state
43 IDs that must be provided, or whether to define the set of state names that
47 pinctrl-0: List of phandles, each pointing at a pin configuration
[all …]
H A Dnvidia,tegra20-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra20-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra20-pinmux
19 - description: tri-state registers
20 - description: mux register
21 - description: pull-up/down registers
[all …]
/openbmc/u-boot/scripts/kconfig/
H A Dconfdata.c2 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
94 strncat(res_value, in, src - in); in conf_expand_value()
130 switch (sym->type) { in conf_set_sym_val()
133 sym->def[def].tri = mod; in conf_set_sym_val()
134 sym->flags |= def_flags; in conf_set_sym_val()
140 sym->def[def].tri = yes; in conf_set_sym_val()
141 sym->flags |= def_flags; in conf_set_sym_val()
145 sym->def[def].tri = no; in conf_set_sym_val()
146 sym->flags |= def_flags; in conf_set_sym_val()
151 p, sym->name); in conf_set_sym_val()
[all …]
H A Dsymbol.c2 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
42 prop->expr = expr_alloc_symbol(sym_lookup(def, SYMBOL_CONST)); in sym_add_default()
58 sym->type = S_STRING; in sym_init()
59 sym->flags |= SYMBOL_AUTO; in sym_init()
65 enum symbol_type type = sym->type; in sym_get_type()
68 if (sym_is_choice_value(sym) && sym->visible == yes) in sym_get_type()
120 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_default_prop()
121 if (prop->visible.tri != no) in sym_get_default_prop()
132 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_range_prop()
133 if (prop->visible.tri != no) in sym_get_range_prop()
[all …]
H A Dexpr.h2 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
49 #define EXPR_NOT(dep) (2-(dep))
52 for (e = (l); e && (s = e->right.sym); e = e->left.expr)
56 tristate tri; member
61 tristate tri; member
134 … i < SYMBOL_HASHSIZE; i++) for (sym = symbol_hash[i]; sym; sym = sym->next) if (sym->type != S_OTH…
141 #define SYMBOL_OPTIONAL 0x0100 /* choice is optional - values can be 'n' */
190 struct property *next; /* next property - null if last */
193 const char *text; /* the prompt value - P_PROMPT, P_MENU, P_COMMENT */
204 for (st = sym->prop; st; st = st->next) \
[all …]
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dpinctrl-bindings.txt4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
21 for client device device tree nodes to map those state names to the pin
25 For example, a pin controller may set up its own "active" state when the
35 For each client device individually, every pin state is assigned an integer
36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique
37 property exists to define the pin configuration. Each state may also be
42 defined in its device tree node, and whether to define the set of state
43 IDs that must be provided, or whether to define the set of state names that
47 pinctrl-0: List of phandles, each pointing at a pin configuration
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dfuncmux.c1 // SPDX-License-Identifier: GPL-2.0+
6 /* Tegra20 high-level function multiplexing */
15 #define PINMUX(grp, mux, pupd, tri) \ argument
16 {PMUX_PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
69 * Tegra appears to boot with function UARTA pre- in funcmux_select()
75 * function on SDB to avoid the conflict. Also, tri- in funcmux_select()
76 * state the group to avoid driving any signal onto it in funcmux_select()
287 return -1; in funcmux_select()
293 return -1; in funcmux_select()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_gpio.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
35 gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask
38 gpio->base.ctx
40 (gpio->regs->reg)
45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
46 REG_GET(A_reg, A, &gpio->store.a); in store_registers()
47 REG_GET(EN_reg, EN, &gpio->store.en); in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
55 REG_UPDATE(A_reg, A, gpio->store.a); in restore_registers()
56 REG_UPDATE(EN_reg, EN, gpio->store.en); in restore_registers()
[all …]
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dvsc7326_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Straight off the data sheet, VMDS-10038 Rev 2.0 and
9 * PD0011-01-14-Meigs-II 2002-12-12
61 #define BIST_ERROR_STATE 0x07 /* BIST engine internal state */
69 * fn = FIFO number, 0-9
84 * bn = bucket number 0-10 (yes, 11 buckets)
114 #define REG_SPI4_DBG_CNT(n) CRA(0x5,0x0,0x10+n) /* Debug counters 0-9 */
133 * tri-speed are only defined with the version that needs a port number.
140 /* 10GbE specific, and different from tri-speed */
147 #define REG_MAX_RXHIGH CRA(0x1,0xa,0x0a) /* XGMII lane 0-3 debug */
[all …]
/openbmc/qemu/include/hw/gpio/
H A Dnrf51_gpio.h2 * nRF51 System-on-Chip general purpose input/output register definition
6 * + Unnamed GPIO inputs 0-31: Set tri-state input level for GPIO pin.
7 * Level -1: Externally Disconnected/Floating; Pull-up/down will be regarded
10 * + Unnamed GPIO outputs 0-31:
11 * Level -1: Disconnected/Floating
16 * + The nRF51 GPIO output driver supports two modes, standard and high-current
20 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
23 * the COPYING file in the top-level directory.
/openbmc/linux/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
H A Dfifo_monitor_local.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (c) 2010-2015, Intel Corporation.
88 /* The switch is tri-state */
/openbmc/linux/drivers/media/dvb-frontends/
H A Ddib0070.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
5 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
31 u8 osc_buffer_state; /* 0= normal, 1= tri-state */
35 u8 invert_iq; /* invert Q - in case I or Q is inverted on the board */
37 u8 force_crystal_mode; /* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
/openbmc/linux/arch/powerpc/platforms/pasemi/
H A Dgpio_mdio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
9 * Based on drivers/net/fs_enet/mii-bitbang.c.
34 #define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
35 #define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
124 /* tri-state our MDIO I/O pin so we can read */ in gpio_mdio_read()
190 * Tri-state the MDIO line. in gpio_mdio_write()
202 /*nothing here - dunno how to reset it*/ in gpio_mdio_reset()
209 struct device *dev = &ofdev->dev; in gpio_mdio_probe()
210 struct device_node *np = ofdev->dev.of_node; in gpio_mdio_probe()
[all …]
/openbmc/linux/drivers/atm/
H A Dsuni.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * drivers/atm/suni.h - S/UNI PHY driver
6 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
26 /* 0x08-0x0F reserved */
29 #define SUNI_RSOP_SBL 0x12 /* RSOP Section BIP-8 LSB */
30 #define SUNI_RSOP_SBM 0x13 /* RSOP Section BIP-8 MSB */
33 /* 0x16-0x17 reserved */
36 #define SUNI_RLOP_LBL 0x1A /* RLOP Line BIP-8/24 LSB */
37 #define SUNI_RLOP_LB 0x1B /* RLOP Line BIP-8/24 */
38 #define SUNI_RLOP_LBM 0x1C /* RLOP Line BIP-8/24 MSB */
[all …]
/openbmc/linux/drivers/pcmcia/
H A Dvg468.h72 #define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */
78 #define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */
89 #define VG468_MISC_GPIO 0x04 /* General-purpose IO */
90 #define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
38 /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */
[all …]
/openbmc/u-boot/board/zyxel/nsa310s/
H A Dnsa310s.c1 // SPDX-License-Identifier: GPL-2.0+
29 /* Multi-Purpose Pins Functionality configuration */ in board_early_init_f()
76 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; in board_init()
117 /* clear 4, set 5 - LED2 low, tri-state */ in reset_phy()
125 /* set PHY back to auto-negotiation mode */ in reset_phy()
/openbmc/linux/drivers/parport/
H A Dparport_gsc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Low-level parallel-support for PC-style hardware integrated in the
4 * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
6 * (C) 1999-2001 by Helge Deller <deller@gmx.de>
36 #include <asm/parisc-device.h>
42 MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
78 s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0); in parport_gsc_init_state()
83 s->u.pc.ctr = parport_readb (CONTROL (p)); in parport_gsc_save_state()
88 parport_writeb (s->u.pc.ctr, CONTROL (p)); in parport_gsc_restore_state()
128 /* --- Mode detection ------------------------------------- */
[all …]
/openbmc/u-boot/drivers/net/phy/
H A Dmiiphybb.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
11 * This provides a bit-banged interface to the ethernet MII management
115 BB_MII_RELOCATE(bb_miiphy_buses[i].init, gd->reloc_off); in bb_miiphy_init()
116 BB_MII_RELOCATE(bb_miiphy_buses[i].mdio_active, gd->reloc_off); in bb_miiphy_init()
117 BB_MII_RELOCATE(bb_miiphy_buses[i].mdio_tristate, gd->reloc_off); in bb_miiphy_init()
118 BB_MII_RELOCATE(bb_miiphy_buses[i].set_mdio, gd->reloc_off); in bb_miiphy_init()
119 BB_MII_RELOCATE(bb_miiphy_buses[i].get_mdio, gd->reloc_off); in bb_miiphy_init()
120 BB_MII_RELOCATE(bb_miiphy_buses[i].set_mdc, gd->reloc_off); in bb_miiphy_init()
121 BB_MII_RELOCATE(bb_miiphy_buses[i].delay, gd->reloc_off); in bb_miiphy_init()
[all …]
/openbmc/linux/Documentation/riscv/
H A Dvector.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Vector Extension Support for RISC-V Linux
8 order to support the use of the RISC-V Vector Extension.
11 ---------------------
19 are not portable to non-Linux, nor non-RISC-V environments, so it is discourage
27 argument consists of two 2-bit enablement statuses and a bit for inheritance
30 Enablement status is a tri-state value each occupying 2-bit of space in
33 * :c:macro:`PR_RISCV_V_VSTATE_CTRL_DEFAULT`: Use the system-wide default
34 enablement status on execve(). The system-wide default setting can be
43 arg: The control argument is a 5-bit value consisting of 3 parts, and
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dov772x.c1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
26 #include <linux/v4l2-mediabus.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
41 #define GAIN 0x00 /* AGC - Gain control gain setting */
[all …]

1234