1762c2812SJacopo Mondi // SPDX-License-Identifier: GPL-2.0
21112babdSJacopo Mondi /*
31112babdSJacopo Mondi * ov772x Camera Driver
41112babdSJacopo Mondi *
5762c2812SJacopo Mondi * Copyright (C) 2017 Jacopo Mondi <jacopo+renesas@jmondi.org>
6762c2812SJacopo Mondi *
71112babdSJacopo Mondi * Copyright (C) 2008 Renesas Solutions Corp.
81112babdSJacopo Mondi * Kuninori Morimoto <morimoto.kuninori@renesas.com>
91112babdSJacopo Mondi *
101112babdSJacopo Mondi * Based on ov7670 and soc_camera_platform driver,
111112babdSJacopo Mondi *
121112babdSJacopo Mondi * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
131112babdSJacopo Mondi * Copyright (C) 2008 Magnus Damm
141112babdSJacopo Mondi * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
151112babdSJacopo Mondi */
161112babdSJacopo Mondi
17762c2812SJacopo Mondi #include <linux/clk.h>
18762c2812SJacopo Mondi #include <linux/delay.h>
19762c2812SJacopo Mondi #include <linux/gpio/consumer.h>
20762c2812SJacopo Mondi #include <linux/i2c.h>
211112babdSJacopo Mondi #include <linux/init.h>
221112babdSJacopo Mondi #include <linux/kernel.h>
231112babdSJacopo Mondi #include <linux/module.h>
245bbf3221SAkinobu Mita #include <linux/regmap.h>
251112babdSJacopo Mondi #include <linux/slab.h>
261112babdSJacopo Mondi #include <linux/v4l2-mediabus.h>
271112babdSJacopo Mondi #include <linux/videodev2.h>
281112babdSJacopo Mondi
291112babdSJacopo Mondi #include <media/i2c/ov772x.h>
30762c2812SJacopo Mondi
311112babdSJacopo Mondi #include <media/v4l2-ctrls.h>
32762c2812SJacopo Mondi #include <media/v4l2-device.h>
33bedfcd46SAkinobu Mita #include <media/v4l2-event.h>
348a10b4e3SLad Prabhakar #include <media/v4l2-fwnode.h>
351112babdSJacopo Mondi #include <media/v4l2-image-sizes.h>
36762c2812SJacopo Mondi #include <media/v4l2-subdev.h>
371112babdSJacopo Mondi
381112babdSJacopo Mondi /*
391112babdSJacopo Mondi * register offset
401112babdSJacopo Mondi */
411112babdSJacopo Mondi #define GAIN 0x00 /* AGC - Gain control gain setting */
421112babdSJacopo Mondi #define BLUE 0x01 /* AWB - Blue channel gain setting */
431112babdSJacopo Mondi #define RED 0x02 /* AWB - Red channel gain setting */
441112babdSJacopo Mondi #define GREEN 0x03 /* AWB - Green channel gain setting */
451112babdSJacopo Mondi #define COM1 0x04 /* Common control 1 */
461112babdSJacopo Mondi #define BAVG 0x05 /* U/B Average Level */
471112babdSJacopo Mondi #define GAVG 0x06 /* Y/Gb Average Level */
481112babdSJacopo Mondi #define RAVG 0x07 /* V/R Average Level */
491112babdSJacopo Mondi #define AECH 0x08 /* Exposure Value - AEC MSBs */
501112babdSJacopo Mondi #define COM2 0x09 /* Common control 2 */
511112babdSJacopo Mondi #define PID 0x0A /* Product ID Number MSB */
521112babdSJacopo Mondi #define VER 0x0B /* Product ID Number LSB */
531112babdSJacopo Mondi #define COM3 0x0C /* Common control 3 */
541112babdSJacopo Mondi #define COM4 0x0D /* Common control 4 */
551112babdSJacopo Mondi #define COM5 0x0E /* Common control 5 */
561112babdSJacopo Mondi #define COM6 0x0F /* Common control 6 */
571112babdSJacopo Mondi #define AEC 0x10 /* Exposure Value */
581112babdSJacopo Mondi #define CLKRC 0x11 /* Internal clock */
591112babdSJacopo Mondi #define COM7 0x12 /* Common control 7 */
601112babdSJacopo Mondi #define COM8 0x13 /* Common control 8 */
611112babdSJacopo Mondi #define COM9 0x14 /* Common control 9 */
621112babdSJacopo Mondi #define COM10 0x15 /* Common control 10 */
631112babdSJacopo Mondi #define REG16 0x16 /* Register 16 */
641112babdSJacopo Mondi #define HSTART 0x17 /* Horizontal sensor size */
651112babdSJacopo Mondi #define HSIZE 0x18 /* Horizontal frame (HREF column) end high 8-bit */
661112babdSJacopo Mondi #define VSTART 0x19 /* Vertical frame (row) start high 8-bit */
671112babdSJacopo Mondi #define VSIZE 0x1A /* Vertical sensor size */
681112babdSJacopo Mondi #define PSHFT 0x1B /* Data format - pixel delay select */
691112babdSJacopo Mondi #define MIDH 0x1C /* Manufacturer ID byte - high */
701112babdSJacopo Mondi #define MIDL 0x1D /* Manufacturer ID byte - low */
711112babdSJacopo Mondi #define LAEC 0x1F /* Fine AEC value */
721112babdSJacopo Mondi #define COM11 0x20 /* Common control 11 */
731112babdSJacopo Mondi #define BDBASE 0x22 /* Banding filter Minimum AEC value */
741112babdSJacopo Mondi #define DBSTEP 0x23 /* Banding filter Maximum Setp */
751112babdSJacopo Mondi #define AEW 0x24 /* AGC/AEC - Stable operating region (upper limit) */
761112babdSJacopo Mondi #define AEB 0x25 /* AGC/AEC - Stable operating region (lower limit) */
771112babdSJacopo Mondi #define VPT 0x26 /* AGC/AEC Fast mode operating region */
781112babdSJacopo Mondi #define REG28 0x28 /* Register 28 */
791112babdSJacopo Mondi #define HOUTSIZE 0x29 /* Horizontal data output size MSBs */
801112babdSJacopo Mondi #define EXHCH 0x2A /* Dummy pixel insert MSB */
811112babdSJacopo Mondi #define EXHCL 0x2B /* Dummy pixel insert LSB */
821112babdSJacopo Mondi #define VOUTSIZE 0x2C /* Vertical data output size MSBs */
831112babdSJacopo Mondi #define ADVFL 0x2D /* LSB of insert dummy lines in Vertical direction */
841112babdSJacopo Mondi #define ADVFH 0x2E /* MSG of insert dummy lines in Vertical direction */
851112babdSJacopo Mondi #define YAVE 0x2F /* Y/G Channel Average value */
861112babdSJacopo Mondi #define LUMHTH 0x30 /* Histogram AEC/AGC Luminance high level threshold */
871112babdSJacopo Mondi #define LUMLTH 0x31 /* Histogram AEC/AGC Luminance low level threshold */
881112babdSJacopo Mondi #define HREF 0x32 /* Image start and size control */
891112babdSJacopo Mondi #define DM_LNL 0x33 /* Dummy line low 8 bits */
901112babdSJacopo Mondi #define DM_LNH 0x34 /* Dummy line high 8 bits */
911112babdSJacopo Mondi #define ADOFF_B 0x35 /* AD offset compensation value for B channel */
921112babdSJacopo Mondi #define ADOFF_R 0x36 /* AD offset compensation value for R channel */
931112babdSJacopo Mondi #define ADOFF_GB 0x37 /* AD offset compensation value for Gb channel */
941112babdSJacopo Mondi #define ADOFF_GR 0x38 /* AD offset compensation value for Gr channel */
951112babdSJacopo Mondi #define OFF_B 0x39 /* Analog process B channel offset value */
961112babdSJacopo Mondi #define OFF_R 0x3A /* Analog process R channel offset value */
971112babdSJacopo Mondi #define OFF_GB 0x3B /* Analog process Gb channel offset value */
981112babdSJacopo Mondi #define OFF_GR 0x3C /* Analog process Gr channel offset value */
991112babdSJacopo Mondi #define COM12 0x3D /* Common control 12 */
1001112babdSJacopo Mondi #define COM13 0x3E /* Common control 13 */
1011112babdSJacopo Mondi #define COM14 0x3F /* Common control 14 */
1021112babdSJacopo Mondi #define COM15 0x40 /* Common control 15*/
1031112babdSJacopo Mondi #define COM16 0x41 /* Common control 16 */
1041112babdSJacopo Mondi #define TGT_B 0x42 /* BLC blue channel target value */
1051112babdSJacopo Mondi #define TGT_R 0x43 /* BLC red channel target value */
1061112babdSJacopo Mondi #define TGT_GB 0x44 /* BLC Gb channel target value */
1071112babdSJacopo Mondi #define TGT_GR 0x45 /* BLC Gr channel target value */
1081112babdSJacopo Mondi /* for ov7720 */
1091112babdSJacopo Mondi #define LCC0 0x46 /* Lens correction control 0 */
1101112babdSJacopo Mondi #define LCC1 0x47 /* Lens correction option 1 - X coordinate */
1111112babdSJacopo Mondi #define LCC2 0x48 /* Lens correction option 2 - Y coordinate */
1121112babdSJacopo Mondi #define LCC3 0x49 /* Lens correction option 3 */
1131112babdSJacopo Mondi #define LCC4 0x4A /* Lens correction option 4 - radius of the circular */
1141112babdSJacopo Mondi #define LCC5 0x4B /* Lens correction option 5 */
1151112babdSJacopo Mondi #define LCC6 0x4C /* Lens correction option 6 */
1161112babdSJacopo Mondi /* for ov7725 */
1171112babdSJacopo Mondi #define LC_CTR 0x46 /* Lens correction control */
1181112babdSJacopo Mondi #define LC_XC 0x47 /* X coordinate of lens correction center relative */
1191112babdSJacopo Mondi #define LC_YC 0x48 /* Y coordinate of lens correction center relative */
1201112babdSJacopo Mondi #define LC_COEF 0x49 /* Lens correction coefficient */
1211112babdSJacopo Mondi #define LC_RADI 0x4A /* Lens correction radius */
1221112babdSJacopo Mondi #define LC_COEFB 0x4B /* Lens B channel compensation coefficient */
1231112babdSJacopo Mondi #define LC_COEFR 0x4C /* Lens R channel compensation coefficient */
1241112babdSJacopo Mondi
1251112babdSJacopo Mondi #define FIXGAIN 0x4D /* Analog fix gain amplifer */
1261112babdSJacopo Mondi #define AREF0 0x4E /* Sensor reference control */
1271112babdSJacopo Mondi #define AREF1 0x4F /* Sensor reference current control */
1281112babdSJacopo Mondi #define AREF2 0x50 /* Analog reference control */
1291112babdSJacopo Mondi #define AREF3 0x51 /* ADC reference control */
1301112babdSJacopo Mondi #define AREF4 0x52 /* ADC reference control */
1311112babdSJacopo Mondi #define AREF5 0x53 /* ADC reference control */
1321112babdSJacopo Mondi #define AREF6 0x54 /* Analog reference control */
1331112babdSJacopo Mondi #define AREF7 0x55 /* Analog reference control */
1341112babdSJacopo Mondi #define UFIX 0x60 /* U channel fixed value output */
1351112babdSJacopo Mondi #define VFIX 0x61 /* V channel fixed value output */
1361112babdSJacopo Mondi #define AWBB_BLK 0x62 /* AWB option for advanced AWB */
1371112babdSJacopo Mondi #define AWB_CTRL0 0x63 /* AWB control byte 0 */
1381112babdSJacopo Mondi #define DSP_CTRL1 0x64 /* DSP control byte 1 */
1391112babdSJacopo Mondi #define DSP_CTRL2 0x65 /* DSP control byte 2 */
1401112babdSJacopo Mondi #define DSP_CTRL3 0x66 /* DSP control byte 3 */
1411112babdSJacopo Mondi #define DSP_CTRL4 0x67 /* DSP control byte 4 */
1421112babdSJacopo Mondi #define AWB_BIAS 0x68 /* AWB BLC level clip */
1431112babdSJacopo Mondi #define AWB_CTRL1 0x69 /* AWB control 1 */
1441112babdSJacopo Mondi #define AWB_CTRL2 0x6A /* AWB control 2 */
1451112babdSJacopo Mondi #define AWB_CTRL3 0x6B /* AWB control 3 */
1461112babdSJacopo Mondi #define AWB_CTRL4 0x6C /* AWB control 4 */
1471112babdSJacopo Mondi #define AWB_CTRL5 0x6D /* AWB control 5 */
1481112babdSJacopo Mondi #define AWB_CTRL6 0x6E /* AWB control 6 */
1491112babdSJacopo Mondi #define AWB_CTRL7 0x6F /* AWB control 7 */
1501112babdSJacopo Mondi #define AWB_CTRL8 0x70 /* AWB control 8 */
1511112babdSJacopo Mondi #define AWB_CTRL9 0x71 /* AWB control 9 */
1521112babdSJacopo Mondi #define AWB_CTRL10 0x72 /* AWB control 10 */
1531112babdSJacopo Mondi #define AWB_CTRL11 0x73 /* AWB control 11 */
1541112babdSJacopo Mondi #define AWB_CTRL12 0x74 /* AWB control 12 */
1551112babdSJacopo Mondi #define AWB_CTRL13 0x75 /* AWB control 13 */
1561112babdSJacopo Mondi #define AWB_CTRL14 0x76 /* AWB control 14 */
1571112babdSJacopo Mondi #define AWB_CTRL15 0x77 /* AWB control 15 */
1581112babdSJacopo Mondi #define AWB_CTRL16 0x78 /* AWB control 16 */
1591112babdSJacopo Mondi #define AWB_CTRL17 0x79 /* AWB control 17 */
1601112babdSJacopo Mondi #define AWB_CTRL18 0x7A /* AWB control 18 */
1611112babdSJacopo Mondi #define AWB_CTRL19 0x7B /* AWB control 19 */
1621112babdSJacopo Mondi #define AWB_CTRL20 0x7C /* AWB control 20 */
1631112babdSJacopo Mondi #define AWB_CTRL21 0x7D /* AWB control 21 */
1641112babdSJacopo Mondi #define GAM1 0x7E /* Gamma Curve 1st segment input end point */
1651112babdSJacopo Mondi #define GAM2 0x7F /* Gamma Curve 2nd segment input end point */
1661112babdSJacopo Mondi #define GAM3 0x80 /* Gamma Curve 3rd segment input end point */
1671112babdSJacopo Mondi #define GAM4 0x81 /* Gamma Curve 4th segment input end point */
1681112babdSJacopo Mondi #define GAM5 0x82 /* Gamma Curve 5th segment input end point */
1691112babdSJacopo Mondi #define GAM6 0x83 /* Gamma Curve 6th segment input end point */
1701112babdSJacopo Mondi #define GAM7 0x84 /* Gamma Curve 7th segment input end point */
1711112babdSJacopo Mondi #define GAM8 0x85 /* Gamma Curve 8th segment input end point */
1721112babdSJacopo Mondi #define GAM9 0x86 /* Gamma Curve 9th segment input end point */
1731112babdSJacopo Mondi #define GAM10 0x87 /* Gamma Curve 10th segment input end point */
1741112babdSJacopo Mondi #define GAM11 0x88 /* Gamma Curve 11th segment input end point */
1751112babdSJacopo Mondi #define GAM12 0x89 /* Gamma Curve 12th segment input end point */
1761112babdSJacopo Mondi #define GAM13 0x8A /* Gamma Curve 13th segment input end point */
1771112babdSJacopo Mondi #define GAM14 0x8B /* Gamma Curve 14th segment input end point */
1781112babdSJacopo Mondi #define GAM15 0x8C /* Gamma Curve 15th segment input end point */
1791112babdSJacopo Mondi #define SLOP 0x8D /* Gamma curve highest segment slope */
1801112babdSJacopo Mondi #define DNSTH 0x8E /* De-noise threshold */
1811112babdSJacopo Mondi #define EDGE_STRNGT 0x8F /* Edge strength control when manual mode */
1821112babdSJacopo Mondi #define EDGE_TRSHLD 0x90 /* Edge threshold control when manual mode */
1831112babdSJacopo Mondi #define DNSOFF 0x91 /* Auto De-noise threshold control */
1841112babdSJacopo Mondi #define EDGE_UPPER 0x92 /* Edge strength upper limit when Auto mode */
1851112babdSJacopo Mondi #define EDGE_LOWER 0x93 /* Edge strength lower limit when Auto mode */
1861112babdSJacopo Mondi #define MTX1 0x94 /* Matrix coefficient 1 */
1871112babdSJacopo Mondi #define MTX2 0x95 /* Matrix coefficient 2 */
1881112babdSJacopo Mondi #define MTX3 0x96 /* Matrix coefficient 3 */
1891112babdSJacopo Mondi #define MTX4 0x97 /* Matrix coefficient 4 */
1901112babdSJacopo Mondi #define MTX5 0x98 /* Matrix coefficient 5 */
1911112babdSJacopo Mondi #define MTX6 0x99 /* Matrix coefficient 6 */
1921112babdSJacopo Mondi #define MTX_CTRL 0x9A /* Matrix control */
1931112babdSJacopo Mondi #define BRIGHT 0x9B /* Brightness control */
1941112babdSJacopo Mondi #define CNTRST 0x9C /* Contrast contrast */
1951112babdSJacopo Mondi #define CNTRST_CTRL 0x9D /* Contrast contrast center */
1961112babdSJacopo Mondi #define UVAD_J0 0x9E /* Auto UV adjust contrast 0 */
1971112babdSJacopo Mondi #define UVAD_J1 0x9F /* Auto UV adjust contrast 1 */
1981112babdSJacopo Mondi #define SCAL0 0xA0 /* Scaling control 0 */
1991112babdSJacopo Mondi #define SCAL1 0xA1 /* Scaling control 1 */
2001112babdSJacopo Mondi #define SCAL2 0xA2 /* Scaling control 2 */
2011112babdSJacopo Mondi #define FIFODLYM 0xA3 /* FIFO manual mode delay control */
2021112babdSJacopo Mondi #define FIFODLYA 0xA4 /* FIFO auto mode delay control */
2031112babdSJacopo Mondi #define SDE 0xA6 /* Special digital effect control */
2041112babdSJacopo Mondi #define USAT 0xA7 /* U component saturation control */
2051112babdSJacopo Mondi #define VSAT 0xA8 /* V component saturation control */
2061112babdSJacopo Mondi /* for ov7720 */
2071112babdSJacopo Mondi #define HUE0 0xA9 /* Hue control 0 */
2081112babdSJacopo Mondi #define HUE1 0xAA /* Hue control 1 */
2091112babdSJacopo Mondi /* for ov7725 */
2101112babdSJacopo Mondi #define HUECOS 0xA9 /* Cosine value */
2111112babdSJacopo Mondi #define HUESIN 0xAA /* Sine value */
2121112babdSJacopo Mondi
2131112babdSJacopo Mondi #define SIGN 0xAB /* Sign bit for Hue and contrast */
2141112babdSJacopo Mondi #define DSPAUTO 0xAC /* DSP auto function ON/OFF control */
2151112babdSJacopo Mondi
2161112babdSJacopo Mondi /*
2171112babdSJacopo Mondi * register detail
2181112babdSJacopo Mondi */
2191112babdSJacopo Mondi
2201112babdSJacopo Mondi /* COM2 */
2211112babdSJacopo Mondi #define SOFT_SLEEP_MODE 0x10 /* Soft sleep mode */
2221112babdSJacopo Mondi /* Output drive capability */
2231112babdSJacopo Mondi #define OCAP_1x 0x00 /* 1x */
2241112babdSJacopo Mondi #define OCAP_2x 0x01 /* 2x */
2251112babdSJacopo Mondi #define OCAP_3x 0x02 /* 3x */
2261112babdSJacopo Mondi #define OCAP_4x 0x03 /* 4x */
2271112babdSJacopo Mondi
2281112babdSJacopo Mondi /* COM3 */
2291112babdSJacopo Mondi #define SWAP_MASK (SWAP_RGB | SWAP_YUV | SWAP_ML)
230f5c24ca7SLad Prabhakar #define IMG_MASK (VFLIP_IMG | HFLIP_IMG | SCOLOR_TEST)
2311112babdSJacopo Mondi
2321112babdSJacopo Mondi #define VFLIP_IMG 0x80 /* Vertical flip image ON/OFF selection */
2331112babdSJacopo Mondi #define HFLIP_IMG 0x40 /* Horizontal mirror image ON/OFF selection */
2341112babdSJacopo Mondi #define SWAP_RGB 0x20 /* Swap B/R output sequence in RGB mode */
2351112babdSJacopo Mondi #define SWAP_YUV 0x10 /* Swap Y/UV output sequence in YUV mode */
2361112babdSJacopo Mondi #define SWAP_ML 0x08 /* Swap output MSB/LSB */
2371112babdSJacopo Mondi /* Tri-state option for output clock */
2381112babdSJacopo Mondi #define NOTRI_CLOCK 0x04 /* 0: Tri-state at this period */
2391112babdSJacopo Mondi /* 1: No tri-state at this period */
2401112babdSJacopo Mondi /* Tri-state option for output data */
2411112babdSJacopo Mondi #define NOTRI_DATA 0x02 /* 0: Tri-state at this period */
2421112babdSJacopo Mondi /* 1: No tri-state at this period */
2431112babdSJacopo Mondi #define SCOLOR_TEST 0x01 /* Sensor color bar test pattern */
2441112babdSJacopo Mondi
2451112babdSJacopo Mondi /* COM4 */
2461112babdSJacopo Mondi /* PLL frequency control */
2471112babdSJacopo Mondi #define PLL_BYPASS 0x00 /* 00: Bypass PLL */
2481112babdSJacopo Mondi #define PLL_4x 0x40 /* 01: PLL 4x */
2491112babdSJacopo Mondi #define PLL_6x 0x80 /* 10: PLL 6x */
2501112babdSJacopo Mondi #define PLL_8x 0xc0 /* 11: PLL 8x */
2511112babdSJacopo Mondi /* AEC evaluate window */
2521112babdSJacopo Mondi #define AEC_FULL 0x00 /* 00: Full window */
2531112babdSJacopo Mondi #define AEC_1p2 0x10 /* 01: 1/2 window */
2541112babdSJacopo Mondi #define AEC_1p4 0x20 /* 10: 1/4 window */
2551112babdSJacopo Mondi #define AEC_2p3 0x30 /* 11: Low 2/3 window */
25635089491SJacopo Mondi #define COM4_RESERVED 0x01 /* Reserved bit */
2571112babdSJacopo Mondi
2581112babdSJacopo Mondi /* COM5 */
2591112babdSJacopo Mondi #define AFR_ON_OFF 0x80 /* Auto frame rate control ON/OFF selection */
2601112babdSJacopo Mondi #define AFR_SPPED 0x40 /* Auto frame rate control speed selection */
2611112babdSJacopo Mondi /* Auto frame rate max rate control */
2621112babdSJacopo Mondi #define AFR_NO_RATE 0x00 /* No reduction of frame rate */
2631112babdSJacopo Mondi #define AFR_1p2 0x10 /* Max reduction to 1/2 frame rate */
2641112babdSJacopo Mondi #define AFR_1p4 0x20 /* Max reduction to 1/4 frame rate */
2651112babdSJacopo Mondi #define AFR_1p8 0x30 /* Max reduction to 1/8 frame rate */
2661112babdSJacopo Mondi /* Auto frame rate active point control */
2671112babdSJacopo Mondi #define AF_2x 0x00 /* Add frame when AGC reaches 2x gain */
2681112babdSJacopo Mondi #define AF_4x 0x04 /* Add frame when AGC reaches 4x gain */
2691112babdSJacopo Mondi #define AF_8x 0x08 /* Add frame when AGC reaches 8x gain */
2701112babdSJacopo Mondi #define AF_16x 0x0c /* Add frame when AGC reaches 16x gain */
2711112babdSJacopo Mondi /* AEC max step control */
2721112babdSJacopo Mondi #define AEC_NO_LIMIT 0x01 /* 0 : AEC incease step has limit */
2731112babdSJacopo Mondi /* 1 : No limit to AEC increase step */
27435089491SJacopo Mondi /* CLKRC */
27535089491SJacopo Mondi /* Input clock divider register */
27635089491SJacopo Mondi #define CLKRC_RESERVED 0x80 /* Reserved bit */
27735089491SJacopo Mondi #define CLKRC_DIV(n) ((n) - 1)
2781112babdSJacopo Mondi
2791112babdSJacopo Mondi /* COM7 */
2801112babdSJacopo Mondi /* SCCB Register Reset */
2811112babdSJacopo Mondi #define SCCB_RESET 0x80 /* 0 : No change */
2821112babdSJacopo Mondi /* 1 : Resets all registers to default */
2831112babdSJacopo Mondi /* Resolution selection */
2841112babdSJacopo Mondi #define SLCT_MASK 0x40 /* Mask of VGA or QVGA */
2851112babdSJacopo Mondi #define SLCT_VGA 0x00 /* 0 : VGA */
2861112babdSJacopo Mondi #define SLCT_QVGA 0x40 /* 1 : QVGA */
2871112babdSJacopo Mondi #define ITU656_ON_OFF 0x20 /* ITU656 protocol ON/OFF selection */
2881112babdSJacopo Mondi #define SENSOR_RAW 0x10 /* Sensor RAW */
2891112babdSJacopo Mondi /* RGB output format control */
2901112babdSJacopo Mondi #define FMT_MASK 0x0c /* Mask of color format */
2911112babdSJacopo Mondi #define FMT_GBR422 0x00 /* 00 : GBR 4:2:2 */
2921112babdSJacopo Mondi #define FMT_RGB565 0x04 /* 01 : RGB 565 */
2931112babdSJacopo Mondi #define FMT_RGB555 0x08 /* 10 : RGB 555 */
2941112babdSJacopo Mondi #define FMT_RGB444 0x0c /* 11 : RGB 444 */
2951112babdSJacopo Mondi /* Output format control */
2961112babdSJacopo Mondi #define OFMT_MASK 0x03 /* Mask of output format */
2971112babdSJacopo Mondi #define OFMT_YUV 0x00 /* 00 : YUV */
2981112babdSJacopo Mondi #define OFMT_P_BRAW 0x01 /* 01 : Processed Bayer RAW */
2991112babdSJacopo Mondi #define OFMT_RGB 0x02 /* 10 : RGB */
3001112babdSJacopo Mondi #define OFMT_BRAW 0x03 /* 11 : Bayer RAW */
3011112babdSJacopo Mondi
3021112babdSJacopo Mondi /* COM8 */
3031112babdSJacopo Mondi #define FAST_ALGO 0x80 /* Enable fast AGC/AEC algorithm */
3041112babdSJacopo Mondi /* AEC Setp size limit */
3051112babdSJacopo Mondi #define UNLMT_STEP 0x40 /* 0 : Step size is limited */
3061112babdSJacopo Mondi /* 1 : Unlimited step size */
3071112babdSJacopo Mondi #define BNDF_ON_OFF 0x20 /* Banding filter ON/OFF */
3081112babdSJacopo Mondi #define AEC_BND 0x10 /* Enable AEC below banding value */
3091112babdSJacopo Mondi #define AEC_ON_OFF 0x08 /* Fine AEC ON/OFF control */
3101112babdSJacopo Mondi #define AGC_ON 0x04 /* AGC Enable */
3111112babdSJacopo Mondi #define AWB_ON 0x02 /* AWB Enable */
3121112babdSJacopo Mondi #define AEC_ON 0x01 /* AEC Enable */
3131112babdSJacopo Mondi
3141112babdSJacopo Mondi /* COM9 */
3151112babdSJacopo Mondi #define BASE_AECAGC 0x80 /* Histogram or average based AEC/AGC */
3161112babdSJacopo Mondi /* Automatic gain ceiling - maximum AGC value */
3171112babdSJacopo Mondi #define GAIN_2x 0x00 /* 000 : 2x */
3181112babdSJacopo Mondi #define GAIN_4x 0x10 /* 001 : 4x */
3191112babdSJacopo Mondi #define GAIN_8x 0x20 /* 010 : 8x */
3201112babdSJacopo Mondi #define GAIN_16x 0x30 /* 011 : 16x */
3211112babdSJacopo Mondi #define GAIN_32x 0x40 /* 100 : 32x */
3221112babdSJacopo Mondi #define GAIN_64x 0x50 /* 101 : 64x */
3231112babdSJacopo Mondi #define GAIN_128x 0x60 /* 110 : 128x */
3241112babdSJacopo Mondi #define DROP_VSYNC 0x04 /* Drop VSYNC output of corrupt frame */
3251112babdSJacopo Mondi #define DROP_HREF 0x02 /* Drop HREF output of corrupt frame */
3261112babdSJacopo Mondi
3271112babdSJacopo Mondi /* COM11 */
3281112babdSJacopo Mondi #define SGLF_ON_OFF 0x02 /* Single frame ON/OFF selection */
3291112babdSJacopo Mondi #define SGLF_TRIG 0x01 /* Single frame transfer trigger */
3301112babdSJacopo Mondi
3311112babdSJacopo Mondi /* HREF */
3321112babdSJacopo Mondi #define HREF_VSTART_SHIFT 6 /* VSTART LSB */
3331112babdSJacopo Mondi #define HREF_HSTART_SHIFT 4 /* HSTART 2 LSBs */
3341112babdSJacopo Mondi #define HREF_VSIZE_SHIFT 2 /* VSIZE LSB */
3351112babdSJacopo Mondi #define HREF_HSIZE_SHIFT 0 /* HSIZE 2 LSBs */
3361112babdSJacopo Mondi
3371112babdSJacopo Mondi /* EXHCH */
3381112babdSJacopo Mondi #define EXHCH_VSIZE_SHIFT 2 /* VOUTSIZE LSB */
3391112babdSJacopo Mondi #define EXHCH_HSIZE_SHIFT 0 /* HOUTSIZE 2 LSBs */
3401112babdSJacopo Mondi
3411112babdSJacopo Mondi /* DSP_CTRL1 */
3421112babdSJacopo Mondi #define FIFO_ON 0x80 /* FIFO enable/disable selection */
3431112babdSJacopo Mondi #define UV_ON_OFF 0x40 /* UV adjust function ON/OFF selection */
3441112babdSJacopo Mondi #define YUV444_2_422 0x20 /* YUV444 to 422 UV channel option selection */
3451112babdSJacopo Mondi #define CLR_MTRX_ON_OFF 0x10 /* Color matrix ON/OFF selection */
3461112babdSJacopo Mondi #define INTPLT_ON_OFF 0x08 /* Interpolation ON/OFF selection */
3471112babdSJacopo Mondi #define GMM_ON_OFF 0x04 /* Gamma function ON/OFF selection */
3481112babdSJacopo Mondi #define AUTO_BLK_ON_OFF 0x02 /* Black defect auto correction ON/OFF */
3491112babdSJacopo Mondi #define AUTO_WHT_ON_OFF 0x01 /* White define auto correction ON/OFF */
3501112babdSJacopo Mondi
3511112babdSJacopo Mondi /* DSP_CTRL3 */
3521112babdSJacopo Mondi #define UV_MASK 0x80 /* UV output sequence option */
3531112babdSJacopo Mondi #define UV_ON 0x80 /* ON */
3541112babdSJacopo Mondi #define UV_OFF 0x00 /* OFF */
3551112babdSJacopo Mondi #define CBAR_MASK 0x20 /* DSP Color bar mask */
3561112babdSJacopo Mondi #define CBAR_ON 0x20 /* ON */
3571112babdSJacopo Mondi #define CBAR_OFF 0x00 /* OFF */
3581112babdSJacopo Mondi
3591112babdSJacopo Mondi /* DSP_CTRL4 */
3601112babdSJacopo Mondi #define DSP_OFMT_YUV 0x00
3611112babdSJacopo Mondi #define DSP_OFMT_RGB 0x00
3621112babdSJacopo Mondi #define DSP_OFMT_RAW8 0x02
3631112babdSJacopo Mondi #define DSP_OFMT_RAW10 0x03
3641112babdSJacopo Mondi
3651112babdSJacopo Mondi /* DSPAUTO (DSP Auto Function ON/OFF Control) */
3661112babdSJacopo Mondi #define AWB_ACTRL 0x80 /* AWB auto threshold control */
3671112babdSJacopo Mondi #define DENOISE_ACTRL 0x40 /* De-noise auto threshold control */
3681112babdSJacopo Mondi #define EDGE_ACTRL 0x20 /* Edge enhancement auto strength control */
3691112babdSJacopo Mondi #define UV_ACTRL 0x10 /* UV adjust auto slope control */
3701112babdSJacopo Mondi #define SCAL0_ACTRL 0x08 /* Auto scaling factor control */
3711112babdSJacopo Mondi #define SCAL1_2_ACTRL 0x04 /* Auto scaling factor control */
3721112babdSJacopo Mondi
3731112babdSJacopo Mondi #define OV772X_MAX_WIDTH VGA_WIDTH
3741112babdSJacopo Mondi #define OV772X_MAX_HEIGHT VGA_HEIGHT
3751112babdSJacopo Mondi
3761112babdSJacopo Mondi /*
3771112babdSJacopo Mondi * ID
3781112babdSJacopo Mondi */
3791112babdSJacopo Mondi #define OV7720 0x7720
3801112babdSJacopo Mondi #define OV7725 0x7721
3811112babdSJacopo Mondi #define VERSION(pid, ver) ((pid << 8) | (ver & 0xFF))
3821112babdSJacopo Mondi
3831112babdSJacopo Mondi /*
38435089491SJacopo Mondi * PLL multipliers
38535089491SJacopo Mondi */
38635089491SJacopo Mondi static struct {
38735089491SJacopo Mondi unsigned int mult;
38835089491SJacopo Mondi u8 com4;
38935089491SJacopo Mondi } ov772x_pll[] = {
39035089491SJacopo Mondi { 1, PLL_BYPASS, },
39135089491SJacopo Mondi { 4, PLL_4x, },
39235089491SJacopo Mondi { 6, PLL_6x, },
39335089491SJacopo Mondi { 8, PLL_8x, },
39435089491SJacopo Mondi };
39535089491SJacopo Mondi
39635089491SJacopo Mondi /*
3971112babdSJacopo Mondi * struct
3981112babdSJacopo Mondi */
3991112babdSJacopo Mondi
4001112babdSJacopo Mondi struct ov772x_color_format {
4011112babdSJacopo Mondi u32 code;
4021112babdSJacopo Mondi enum v4l2_colorspace colorspace;
4031112babdSJacopo Mondi u8 dsp3;
4041112babdSJacopo Mondi u8 dsp4;
4051112babdSJacopo Mondi u8 com3;
4061112babdSJacopo Mondi u8 com7;
4071112babdSJacopo Mondi };
4081112babdSJacopo Mondi
4091112babdSJacopo Mondi struct ov772x_win_size {
4101112babdSJacopo Mondi char *name;
4111112babdSJacopo Mondi unsigned char com7_bit;
41235089491SJacopo Mondi unsigned int sizeimage;
4131112babdSJacopo Mondi struct v4l2_rect rect;
4141112babdSJacopo Mondi };
4151112babdSJacopo Mondi
4161112babdSJacopo Mondi struct ov772x_priv {
4171112babdSJacopo Mondi struct v4l2_subdev subdev;
4181112babdSJacopo Mondi struct v4l2_ctrl_handler hdl;
419762c2812SJacopo Mondi struct clk *clk;
4205bbf3221SAkinobu Mita struct regmap *regmap;
4211112babdSJacopo Mondi struct ov772x_camera_info *info;
422762c2812SJacopo Mondi struct gpio_desc *pwdn_gpio;
423762c2812SJacopo Mondi struct gpio_desc *rstb_gpio;
4241112babdSJacopo Mondi const struct ov772x_color_format *cfmt;
4251112babdSJacopo Mondi const struct ov772x_win_size *win;
42609e620c6SAkinobu Mita struct v4l2_ctrl *vflip_ctrl;
42709e620c6SAkinobu Mita struct v4l2_ctrl *hflip_ctrl;
428f5c24ca7SLad Prabhakar unsigned int test_pattern;
4291112babdSJacopo Mondi /* band_filter = COM8[5] ? 256 - BDBASE : 0 */
43009e620c6SAkinobu Mita struct v4l2_ctrl *band_filter_ctrl;
43135089491SJacopo Mondi unsigned int fps;
4327b9998c9SAkinobu Mita /* lock to protect power_count and streaming */
43334af7d92SAkinobu Mita struct mutex lock;
43434af7d92SAkinobu Mita int power_count;
4357b9998c9SAkinobu Mita int streaming;
4364b610d6dSAkinobu Mita #ifdef CONFIG_MEDIA_CONTROLLER
4374b610d6dSAkinobu Mita struct media_pad pad;
4384b610d6dSAkinobu Mita #endif
4398a10b4e3SLad Prabhakar enum v4l2_mbus_type bus_type;
4401112babdSJacopo Mondi };
4411112babdSJacopo Mondi
4421112babdSJacopo Mondi /*
4431112babdSJacopo Mondi * supported color format list
4441112babdSJacopo Mondi */
4451112babdSJacopo Mondi static const struct ov772x_color_format ov772x_cfmts[] = {
4461112babdSJacopo Mondi {
4471112babdSJacopo Mondi .code = MEDIA_BUS_FMT_YUYV8_2X8,
448762c2812SJacopo Mondi .colorspace = V4L2_COLORSPACE_SRGB,
4491112babdSJacopo Mondi .dsp3 = 0x0,
4501112babdSJacopo Mondi .dsp4 = DSP_OFMT_YUV,
4511112babdSJacopo Mondi .com3 = SWAP_YUV,
4521112babdSJacopo Mondi .com7 = OFMT_YUV,
4531112babdSJacopo Mondi },
4541112babdSJacopo Mondi {
4551112babdSJacopo Mondi .code = MEDIA_BUS_FMT_YVYU8_2X8,
456762c2812SJacopo Mondi .colorspace = V4L2_COLORSPACE_SRGB,
4571112babdSJacopo Mondi .dsp3 = UV_ON,
4581112babdSJacopo Mondi .dsp4 = DSP_OFMT_YUV,
4591112babdSJacopo Mondi .com3 = SWAP_YUV,
4601112babdSJacopo Mondi .com7 = OFMT_YUV,
4611112babdSJacopo Mondi },
4621112babdSJacopo Mondi {
4631112babdSJacopo Mondi .code = MEDIA_BUS_FMT_UYVY8_2X8,
464762c2812SJacopo Mondi .colorspace = V4L2_COLORSPACE_SRGB,
4651112babdSJacopo Mondi .dsp3 = 0x0,
4661112babdSJacopo Mondi .dsp4 = DSP_OFMT_YUV,
4671112babdSJacopo Mondi .com3 = 0x0,
4681112babdSJacopo Mondi .com7 = OFMT_YUV,
4691112babdSJacopo Mondi },
4701112babdSJacopo Mondi {
4711112babdSJacopo Mondi .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_LE,
4721112babdSJacopo Mondi .colorspace = V4L2_COLORSPACE_SRGB,
4731112babdSJacopo Mondi .dsp3 = 0x0,
4741112babdSJacopo Mondi .dsp4 = DSP_OFMT_YUV,
4751112babdSJacopo Mondi .com3 = SWAP_RGB,
4761112babdSJacopo Mondi .com7 = FMT_RGB555 | OFMT_RGB,
4771112babdSJacopo Mondi },
4781112babdSJacopo Mondi {
4791112babdSJacopo Mondi .code = MEDIA_BUS_FMT_RGB555_2X8_PADHI_BE,
4801112babdSJacopo Mondi .colorspace = V4L2_COLORSPACE_SRGB,
4811112babdSJacopo Mondi .dsp3 = 0x0,
4821112babdSJacopo Mondi .dsp4 = DSP_OFMT_YUV,
4831112babdSJacopo Mondi .com3 = 0x0,
4841112babdSJacopo Mondi .com7 = FMT_RGB555 | OFMT_RGB,
4851112babdSJacopo Mondi },
4861112babdSJacopo Mondi {
4871112babdSJacopo Mondi .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
4881112babdSJacopo Mondi .colorspace = V4L2_COLORSPACE_SRGB,
4891112babdSJacopo Mondi .dsp3 = 0x0,
4901112babdSJacopo Mondi .dsp4 = DSP_OFMT_YUV,
4911112babdSJacopo Mondi .com3 = SWAP_RGB,
4921112babdSJacopo Mondi .com7 = FMT_RGB565 | OFMT_RGB,
4931112babdSJacopo Mondi },
4941112babdSJacopo Mondi {
4951112babdSJacopo Mondi .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
4961112babdSJacopo Mondi .colorspace = V4L2_COLORSPACE_SRGB,
4971112babdSJacopo Mondi .dsp3 = 0x0,
4981112babdSJacopo Mondi .dsp4 = DSP_OFMT_YUV,
4991112babdSJacopo Mondi .com3 = 0x0,
5001112babdSJacopo Mondi .com7 = FMT_RGB565 | OFMT_RGB,
5011112babdSJacopo Mondi },
5021112babdSJacopo Mondi {
5031112babdSJacopo Mondi /* Setting DSP4 to DSP_OFMT_RAW8 still gives 10-bit output,
5041112babdSJacopo Mondi * regardless of the COM7 value. We can thus only support 10-bit
5051112babdSJacopo Mondi * Bayer until someone figures it out.
5061112babdSJacopo Mondi */
5071112babdSJacopo Mondi .code = MEDIA_BUS_FMT_SBGGR10_1X10,
5081112babdSJacopo Mondi .colorspace = V4L2_COLORSPACE_SRGB,
5091112babdSJacopo Mondi .dsp3 = 0x0,
5101112babdSJacopo Mondi .dsp4 = DSP_OFMT_RAW10,
5111112babdSJacopo Mondi .com3 = 0x0,
5121112babdSJacopo Mondi .com7 = SENSOR_RAW | OFMT_BRAW,
5131112babdSJacopo Mondi },
5141112babdSJacopo Mondi };
5151112babdSJacopo Mondi
5161112babdSJacopo Mondi /*
5171112babdSJacopo Mondi * window size list
5181112babdSJacopo Mondi */
5191112babdSJacopo Mondi
5201112babdSJacopo Mondi static const struct ov772x_win_size ov772x_win_sizes[] = {
5211112babdSJacopo Mondi {
5221112babdSJacopo Mondi .name = "VGA",
5231112babdSJacopo Mondi .com7_bit = SLCT_VGA,
52435089491SJacopo Mondi .sizeimage = 510 * 748,
5251112babdSJacopo Mondi .rect = {
5261112babdSJacopo Mondi .left = 140,
5271112babdSJacopo Mondi .top = 14,
5281112babdSJacopo Mondi .width = VGA_WIDTH,
5291112babdSJacopo Mondi .height = VGA_HEIGHT,
5301112babdSJacopo Mondi },
5311112babdSJacopo Mondi }, {
5321112babdSJacopo Mondi .name = "QVGA",
5331112babdSJacopo Mondi .com7_bit = SLCT_QVGA,
53435089491SJacopo Mondi .sizeimage = 278 * 576,
5351112babdSJacopo Mondi .rect = {
5361112babdSJacopo Mondi .left = 252,
5371112babdSJacopo Mondi .top = 6,
5381112babdSJacopo Mondi .width = QVGA_WIDTH,
5391112babdSJacopo Mondi .height = QVGA_HEIGHT,
5401112babdSJacopo Mondi },
5411112babdSJacopo Mondi },
5421112babdSJacopo Mondi };
5431112babdSJacopo Mondi
544f5c24ca7SLad Prabhakar static const char * const ov772x_test_pattern_menu[] = {
545f5c24ca7SLad Prabhakar "Disabled",
546f5c24ca7SLad Prabhakar "Vertical Color Bar Type 1",
547f5c24ca7SLad Prabhakar };
548f5c24ca7SLad Prabhakar
5491112babdSJacopo Mondi /*
55035089491SJacopo Mondi * frame rate settings lists
55135089491SJacopo Mondi */
5527b69f2cbSMauro Carvalho Chehab static const unsigned int ov772x_frame_intervals[] = { 5, 10, 15, 20, 30, 60 };
55335089491SJacopo Mondi
55435089491SJacopo Mondi /*
5551112babdSJacopo Mondi * general function
5561112babdSJacopo Mondi */
5571112babdSJacopo Mondi
to_ov772x(struct v4l2_subdev * sd)5581112babdSJacopo Mondi static struct ov772x_priv *to_ov772x(struct v4l2_subdev *sd)
5591112babdSJacopo Mondi {
5601112babdSJacopo Mondi return container_of(sd, struct ov772x_priv, subdev);
5611112babdSJacopo Mondi }
5621112babdSJacopo Mondi
ov772x_reset(struct ov772x_priv * priv)5635bbf3221SAkinobu Mita static int ov772x_reset(struct ov772x_priv *priv)
5641112babdSJacopo Mondi {
5651112babdSJacopo Mondi int ret;
5661112babdSJacopo Mondi
5675bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, COM7, SCCB_RESET);
5681112babdSJacopo Mondi if (ret < 0)
5691112babdSJacopo Mondi return ret;
5701112babdSJacopo Mondi
571d9c70bbdSJacopo Mondi usleep_range(1000, 5000);
5721112babdSJacopo Mondi
5735bbf3221SAkinobu Mita return regmap_update_bits(priv->regmap, COM2, SOFT_SLEEP_MODE,
5745bbf3221SAkinobu Mita SOFT_SLEEP_MODE);
5751112babdSJacopo Mondi }
5761112babdSJacopo Mondi
5771112babdSJacopo Mondi /*
578762c2812SJacopo Mondi * subdev ops
5791112babdSJacopo Mondi */
5801112babdSJacopo Mondi
ov772x_s_stream(struct v4l2_subdev * sd,int enable)5811112babdSJacopo Mondi static int ov772x_s_stream(struct v4l2_subdev *sd, int enable)
5821112babdSJacopo Mondi {
5831112babdSJacopo Mondi struct i2c_client *client = v4l2_get_subdevdata(sd);
5841112babdSJacopo Mondi struct ov772x_priv *priv = to_ov772x(sd);
5857b9998c9SAkinobu Mita int ret = 0;
5861112babdSJacopo Mondi
5877b9998c9SAkinobu Mita mutex_lock(&priv->lock);
5881112babdSJacopo Mondi
5897b9998c9SAkinobu Mita if (priv->streaming == enable)
5907b9998c9SAkinobu Mita goto done;
5911112babdSJacopo Mondi
592efcb7ddaSLad Prabhakar if (priv->bus_type == V4L2_MBUS_BT656) {
593efcb7ddaSLad Prabhakar ret = regmap_update_bits(priv->regmap, COM7, ITU656_ON_OFF,
594efcb7ddaSLad Prabhakar enable ?
595efcb7ddaSLad Prabhakar ITU656_ON_OFF : ~ITU656_ON_OFF);
596efcb7ddaSLad Prabhakar if (ret)
597efcb7ddaSLad Prabhakar goto done;
598efcb7ddaSLad Prabhakar }
599efcb7ddaSLad Prabhakar
6005bbf3221SAkinobu Mita ret = regmap_update_bits(priv->regmap, COM2, SOFT_SLEEP_MODE,
6017b9998c9SAkinobu Mita enable ? 0 : SOFT_SLEEP_MODE);
6027b9998c9SAkinobu Mita if (ret)
6037b9998c9SAkinobu Mita goto done;
6047b9998c9SAkinobu Mita
6057b9998c9SAkinobu Mita if (enable) {
6061112babdSJacopo Mondi dev_dbg(&client->dev, "format %d, win %s\n",
6071112babdSJacopo Mondi priv->cfmt->code, priv->win->name);
6087b9998c9SAkinobu Mita }
6097b9998c9SAkinobu Mita priv->streaming = enable;
6101112babdSJacopo Mondi
6117b9998c9SAkinobu Mita done:
6127b9998c9SAkinobu Mita mutex_unlock(&priv->lock);
6137b9998c9SAkinobu Mita
6147b9998c9SAkinobu Mita return ret;
6151112babdSJacopo Mondi }
6161112babdSJacopo Mondi
ov772x_select_fps(struct ov772x_priv * priv,struct v4l2_fract * tpf)61780dc2a49SAkinobu Mita static unsigned int ov772x_select_fps(struct ov772x_priv *priv,
61880dc2a49SAkinobu Mita struct v4l2_fract *tpf)
61935089491SJacopo Mondi {
62035089491SJacopo Mondi unsigned int fps = tpf->numerator ?
62135089491SJacopo Mondi tpf->denominator / tpf->numerator :
62235089491SJacopo Mondi tpf->denominator;
62335089491SJacopo Mondi unsigned int best_diff;
62435089491SJacopo Mondi unsigned int diff;
62535089491SJacopo Mondi unsigned int idx;
62635089491SJacopo Mondi unsigned int i;
62735089491SJacopo Mondi
62835089491SJacopo Mondi /* Approximate to the closest supported frame interval. */
62935089491SJacopo Mondi best_diff = ~0L;
63035089491SJacopo Mondi for (i = 0, idx = 0; i < ARRAY_SIZE(ov772x_frame_intervals); i++) {
63135089491SJacopo Mondi diff = abs(fps - ov772x_frame_intervals[i]);
63235089491SJacopo Mondi if (diff < best_diff) {
63335089491SJacopo Mondi idx = i;
63435089491SJacopo Mondi best_diff = diff;
63535089491SJacopo Mondi }
63635089491SJacopo Mondi }
63780dc2a49SAkinobu Mita
63880dc2a49SAkinobu Mita return ov772x_frame_intervals[idx];
63980dc2a49SAkinobu Mita }
64080dc2a49SAkinobu Mita
ov772x_set_frame_rate(struct ov772x_priv * priv,unsigned int fps,const struct ov772x_color_format * cfmt,const struct ov772x_win_size * win)64180dc2a49SAkinobu Mita static int ov772x_set_frame_rate(struct ov772x_priv *priv,
64280dc2a49SAkinobu Mita unsigned int fps,
64380dc2a49SAkinobu Mita const struct ov772x_color_format *cfmt,
64480dc2a49SAkinobu Mita const struct ov772x_win_size *win)
64580dc2a49SAkinobu Mita {
64680dc2a49SAkinobu Mita unsigned long fin = clk_get_rate(priv->clk);
64780dc2a49SAkinobu Mita unsigned int best_diff;
64880dc2a49SAkinobu Mita unsigned int fsize;
64980dc2a49SAkinobu Mita unsigned int pclk;
65080dc2a49SAkinobu Mita unsigned int diff;
65180dc2a49SAkinobu Mita unsigned int i;
65280dc2a49SAkinobu Mita u8 clkrc = 0;
65380dc2a49SAkinobu Mita u8 com4 = 0;
65480dc2a49SAkinobu Mita int ret;
65535089491SJacopo Mondi
65635089491SJacopo Mondi /* Use image size (with blankings) to calculate desired pixel clock. */
65735089491SJacopo Mondi switch (cfmt->com7 & OFMT_MASK) {
65835089491SJacopo Mondi case OFMT_BRAW:
65935089491SJacopo Mondi fsize = win->sizeimage;
66035089491SJacopo Mondi break;
66135089491SJacopo Mondi case OFMT_RGB:
66235089491SJacopo Mondi case OFMT_YUV:
66335089491SJacopo Mondi default:
66435089491SJacopo Mondi fsize = win->sizeimage * 2;
66535089491SJacopo Mondi break;
66635089491SJacopo Mondi }
66735089491SJacopo Mondi
66835089491SJacopo Mondi pclk = fps * fsize;
66935089491SJacopo Mondi
67035089491SJacopo Mondi /*
67135089491SJacopo Mondi * Pixel clock generation circuit is pretty simple:
67235089491SJacopo Mondi *
67335089491SJacopo Mondi * Fin -> [ / CLKRC_div] -> [ * PLL_mult] -> pclk
67435089491SJacopo Mondi *
67535089491SJacopo Mondi * Try to approximate the desired pixel clock testing all available
67635089491SJacopo Mondi * PLL multipliers (1x, 4x, 6x, 8x) and calculate corresponding
67735089491SJacopo Mondi * divisor with:
67835089491SJacopo Mondi *
67935089491SJacopo Mondi * div = PLL_mult * Fin / pclk
68035089491SJacopo Mondi *
68135089491SJacopo Mondi * and re-calculate the pixel clock using it:
68235089491SJacopo Mondi *
68335089491SJacopo Mondi * pclk = Fin * PLL_mult / CLKRC_div
68435089491SJacopo Mondi *
68535089491SJacopo Mondi * Choose the PLL_mult and CLKRC_div pair that gives a pixel clock
68635089491SJacopo Mondi * closer to the desired one.
68735089491SJacopo Mondi *
68835089491SJacopo Mondi * The desired pixel clock is calculated using a known frame size
68935089491SJacopo Mondi * (blanking included) and FPS.
69035089491SJacopo Mondi */
69135089491SJacopo Mondi best_diff = ~0L;
69235089491SJacopo Mondi for (i = 0; i < ARRAY_SIZE(ov772x_pll); i++) {
69335089491SJacopo Mondi unsigned int pll_mult = ov772x_pll[i].mult;
69435089491SJacopo Mondi unsigned int pll_out = pll_mult * fin;
69535089491SJacopo Mondi unsigned int t_pclk;
69635089491SJacopo Mondi unsigned int div;
69735089491SJacopo Mondi
69835089491SJacopo Mondi if (pll_out < pclk)
69935089491SJacopo Mondi continue;
70035089491SJacopo Mondi
70135089491SJacopo Mondi div = DIV_ROUND_CLOSEST(pll_out, pclk);
70235089491SJacopo Mondi t_pclk = DIV_ROUND_CLOSEST(fin * pll_mult, div);
70335089491SJacopo Mondi diff = abs(pclk - t_pclk);
70435089491SJacopo Mondi if (diff < best_diff) {
70535089491SJacopo Mondi best_diff = diff;
70635089491SJacopo Mondi clkrc = CLKRC_DIV(div);
70735089491SJacopo Mondi com4 = ov772x_pll[i].com4;
70835089491SJacopo Mondi }
70935089491SJacopo Mondi }
71035089491SJacopo Mondi
7115bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, COM4, com4 | COM4_RESERVED);
71235089491SJacopo Mondi if (ret < 0)
71335089491SJacopo Mondi return ret;
71435089491SJacopo Mondi
7155bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, CLKRC, clkrc | CLKRC_RESERVED);
71635089491SJacopo Mondi if (ret < 0)
71735089491SJacopo Mondi return ret;
71835089491SJacopo Mondi
71935089491SJacopo Mondi return 0;
72035089491SJacopo Mondi }
72135089491SJacopo Mondi
ov772x_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * ival)72235089491SJacopo Mondi static int ov772x_g_frame_interval(struct v4l2_subdev *sd,
72335089491SJacopo Mondi struct v4l2_subdev_frame_interval *ival)
72435089491SJacopo Mondi {
72535089491SJacopo Mondi struct ov772x_priv *priv = to_ov772x(sd);
72635089491SJacopo Mondi struct v4l2_fract *tpf = &ival->interval;
72735089491SJacopo Mondi
72835089491SJacopo Mondi tpf->numerator = 1;
72935089491SJacopo Mondi tpf->denominator = priv->fps;
73035089491SJacopo Mondi
73135089491SJacopo Mondi return 0;
73235089491SJacopo Mondi }
73335089491SJacopo Mondi
ov772x_s_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * ival)73435089491SJacopo Mondi static int ov772x_s_frame_interval(struct v4l2_subdev *sd,
73535089491SJacopo Mondi struct v4l2_subdev_frame_interval *ival)
73635089491SJacopo Mondi {
73735089491SJacopo Mondi struct ov772x_priv *priv = to_ov772x(sd);
73835089491SJacopo Mondi struct v4l2_fract *tpf = &ival->interval;
73980dc2a49SAkinobu Mita unsigned int fps;
74095f5a45aSAkinobu Mita int ret = 0;
74135089491SJacopo Mondi
7427b9998c9SAkinobu Mita mutex_lock(&priv->lock);
7437b9998c9SAkinobu Mita
7447b9998c9SAkinobu Mita if (priv->streaming) {
7457b9998c9SAkinobu Mita ret = -EBUSY;
7467b9998c9SAkinobu Mita goto error;
7477b9998c9SAkinobu Mita }
7487b9998c9SAkinobu Mita
74980dc2a49SAkinobu Mita fps = ov772x_select_fps(priv, tpf);
75080dc2a49SAkinobu Mita
75195f5a45aSAkinobu Mita /*
75295f5a45aSAkinobu Mita * If the device is not powered up by the host driver do
75395f5a45aSAkinobu Mita * not apply any changes to H/W at this time. Instead
75495f5a45aSAkinobu Mita * the frame rate will be restored right after power-up.
75595f5a45aSAkinobu Mita */
75695f5a45aSAkinobu Mita if (priv->power_count > 0) {
75780dc2a49SAkinobu Mita ret = ov772x_set_frame_rate(priv, fps, priv->cfmt, priv->win);
75880dc2a49SAkinobu Mita if (ret)
75995f5a45aSAkinobu Mita goto error;
76095f5a45aSAkinobu Mita }
76180dc2a49SAkinobu Mita
76280dc2a49SAkinobu Mita tpf->numerator = 1;
76380dc2a49SAkinobu Mita tpf->denominator = fps;
76480dc2a49SAkinobu Mita priv->fps = fps;
76580dc2a49SAkinobu Mita
76695f5a45aSAkinobu Mita error:
76795f5a45aSAkinobu Mita mutex_unlock(&priv->lock);
76895f5a45aSAkinobu Mita
76995f5a45aSAkinobu Mita return ret;
77035089491SJacopo Mondi }
77135089491SJacopo Mondi
ov772x_s_ctrl(struct v4l2_ctrl * ctrl)7721112babdSJacopo Mondi static int ov772x_s_ctrl(struct v4l2_ctrl *ctrl)
7731112babdSJacopo Mondi {
7741112babdSJacopo Mondi struct ov772x_priv *priv = container_of(ctrl->handler,
7751112babdSJacopo Mondi struct ov772x_priv, hdl);
7765bbf3221SAkinobu Mita struct regmap *regmap = priv->regmap;
7771112babdSJacopo Mondi int ret = 0;
7781112babdSJacopo Mondi u8 val;
7791112babdSJacopo Mondi
78095f5a45aSAkinobu Mita /* v4l2_ctrl_lock() locks our own mutex */
78195f5a45aSAkinobu Mita
78295f5a45aSAkinobu Mita /*
78395f5a45aSAkinobu Mita * If the device is not powered up by the host driver do
78495f5a45aSAkinobu Mita * not apply any controls to H/W at this time. Instead
78595f5a45aSAkinobu Mita * the controls will be restored right after power-up.
78695f5a45aSAkinobu Mita */
78795f5a45aSAkinobu Mita if (priv->power_count == 0)
78895f5a45aSAkinobu Mita return 0;
78995f5a45aSAkinobu Mita
7901112babdSJacopo Mondi switch (ctrl->id) {
7911112babdSJacopo Mondi case V4L2_CID_VFLIP:
7921112babdSJacopo Mondi val = ctrl->val ? VFLIP_IMG : 0x00;
793c2cae895SAkinobu Mita if (priv->info && (priv->info->flags & OV772X_FLAG_VFLIP))
7941112babdSJacopo Mondi val ^= VFLIP_IMG;
7955bbf3221SAkinobu Mita return regmap_update_bits(regmap, COM3, VFLIP_IMG, val);
7961112babdSJacopo Mondi case V4L2_CID_HFLIP:
7971112babdSJacopo Mondi val = ctrl->val ? HFLIP_IMG : 0x00;
798c2cae895SAkinobu Mita if (priv->info && (priv->info->flags & OV772X_FLAG_HFLIP))
7991112babdSJacopo Mondi val ^= HFLIP_IMG;
8005bbf3221SAkinobu Mita return regmap_update_bits(regmap, COM3, HFLIP_IMG, val);
8011112babdSJacopo Mondi case V4L2_CID_BAND_STOP_FILTER:
8021112babdSJacopo Mondi if (!ctrl->val) {
8031112babdSJacopo Mondi /* Switch the filter off, it is on now */
8045bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, BDBASE, 0xff, 0xff);
8051112babdSJacopo Mondi if (!ret)
8065bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, COM8,
8071112babdSJacopo Mondi BNDF_ON_OFF, 0);
8081112babdSJacopo Mondi } else {
8091112babdSJacopo Mondi /* Switch the filter on, set AEC low limit */
8101112babdSJacopo Mondi val = 256 - ctrl->val;
8115bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, COM8,
8121112babdSJacopo Mondi BNDF_ON_OFF, BNDF_ON_OFF);
8131112babdSJacopo Mondi if (!ret)
8145bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, BDBASE,
8151112babdSJacopo Mondi 0xff, val);
8161112babdSJacopo Mondi }
81709e620c6SAkinobu Mita
8181112babdSJacopo Mondi return ret;
819f5c24ca7SLad Prabhakar case V4L2_CID_TEST_PATTERN:
820f5c24ca7SLad Prabhakar priv->test_pattern = ctrl->val;
821f5c24ca7SLad Prabhakar return 0;
8221112babdSJacopo Mondi }
8231112babdSJacopo Mondi
8241112babdSJacopo Mondi return -EINVAL;
8251112babdSJacopo Mondi }
8261112babdSJacopo Mondi
8271112babdSJacopo Mondi #ifdef CONFIG_VIDEO_ADV_DEBUG
ov772x_g_register(struct v4l2_subdev * sd,struct v4l2_dbg_register * reg)8281112babdSJacopo Mondi static int ov772x_g_register(struct v4l2_subdev *sd,
8291112babdSJacopo Mondi struct v4l2_dbg_register *reg)
8301112babdSJacopo Mondi {
8315bbf3221SAkinobu Mita struct ov772x_priv *priv = to_ov772x(sd);
8321112babdSJacopo Mondi int ret;
8335bbf3221SAkinobu Mita unsigned int val;
8341112babdSJacopo Mondi
8351112babdSJacopo Mondi reg->size = 1;
8361112babdSJacopo Mondi if (reg->reg > 0xff)
8371112babdSJacopo Mondi return -EINVAL;
8381112babdSJacopo Mondi
8395bbf3221SAkinobu Mita ret = regmap_read(priv->regmap, reg->reg, &val);
8401112babdSJacopo Mondi if (ret < 0)
8411112babdSJacopo Mondi return ret;
8421112babdSJacopo Mondi
8435bbf3221SAkinobu Mita reg->val = (__u64)val;
8441112babdSJacopo Mondi
8451112babdSJacopo Mondi return 0;
8461112babdSJacopo Mondi }
8471112babdSJacopo Mondi
ov772x_s_register(struct v4l2_subdev * sd,const struct v4l2_dbg_register * reg)8481112babdSJacopo Mondi static int ov772x_s_register(struct v4l2_subdev *sd,
8491112babdSJacopo Mondi const struct v4l2_dbg_register *reg)
8501112babdSJacopo Mondi {
8515bbf3221SAkinobu Mita struct ov772x_priv *priv = to_ov772x(sd);
8521112babdSJacopo Mondi
8531112babdSJacopo Mondi if (reg->reg > 0xff ||
8541112babdSJacopo Mondi reg->val > 0xff)
8551112babdSJacopo Mondi return -EINVAL;
8561112babdSJacopo Mondi
8575bbf3221SAkinobu Mita return regmap_write(priv->regmap, reg->reg, reg->val);
8581112babdSJacopo Mondi }
8591112babdSJacopo Mondi #endif
8601112babdSJacopo Mondi
ov772x_power_on(struct ov772x_priv * priv)861762c2812SJacopo Mondi static int ov772x_power_on(struct ov772x_priv *priv)
862762c2812SJacopo Mondi {
863762c2812SJacopo Mondi struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev);
864762c2812SJacopo Mondi int ret;
865762c2812SJacopo Mondi
866762c2812SJacopo Mondi if (priv->clk) {
867762c2812SJacopo Mondi ret = clk_prepare_enable(priv->clk);
868762c2812SJacopo Mondi if (ret)
869762c2812SJacopo Mondi return ret;
870762c2812SJacopo Mondi }
871762c2812SJacopo Mondi
872762c2812SJacopo Mondi if (priv->pwdn_gpio) {
873762c2812SJacopo Mondi gpiod_set_value(priv->pwdn_gpio, 1);
874762c2812SJacopo Mondi usleep_range(500, 1000);
875762c2812SJacopo Mondi }
876762c2812SJacopo Mondi
877762c2812SJacopo Mondi /*
878762c2812SJacopo Mondi * FIXME: The reset signal is connected to a shared GPIO on some
879762c2812SJacopo Mondi * platforms (namely the SuperH Migo-R). Until a framework becomes
880762c2812SJacopo Mondi * available to handle this cleanly, request the GPIO temporarily
881762c2812SJacopo Mondi * to avoid conflicts.
882762c2812SJacopo Mondi */
88340519d54SAkinobu Mita priv->rstb_gpio = gpiod_get_optional(&client->dev, "reset",
884762c2812SJacopo Mondi GPIOD_OUT_LOW);
885762c2812SJacopo Mondi if (IS_ERR(priv->rstb_gpio)) {
88640519d54SAkinobu Mita dev_info(&client->dev, "Unable to get GPIO \"reset\"");
8871d18c2cdSAlexey Khoroshilov clk_disable_unprepare(priv->clk);
888762c2812SJacopo Mondi return PTR_ERR(priv->rstb_gpio);
889762c2812SJacopo Mondi }
890762c2812SJacopo Mondi
891762c2812SJacopo Mondi if (priv->rstb_gpio) {
892762c2812SJacopo Mondi gpiod_set_value(priv->rstb_gpio, 1);
893762c2812SJacopo Mondi usleep_range(500, 1000);
894762c2812SJacopo Mondi gpiod_set_value(priv->rstb_gpio, 0);
895762c2812SJacopo Mondi usleep_range(500, 1000);
896762c2812SJacopo Mondi
897762c2812SJacopo Mondi gpiod_put(priv->rstb_gpio);
898762c2812SJacopo Mondi }
899762c2812SJacopo Mondi
900762c2812SJacopo Mondi return 0;
901762c2812SJacopo Mondi }
902762c2812SJacopo Mondi
ov772x_power_off(struct ov772x_priv * priv)903762c2812SJacopo Mondi static int ov772x_power_off(struct ov772x_priv *priv)
904762c2812SJacopo Mondi {
905762c2812SJacopo Mondi clk_disable_unprepare(priv->clk);
906762c2812SJacopo Mondi
907762c2812SJacopo Mondi if (priv->pwdn_gpio) {
908762c2812SJacopo Mondi gpiod_set_value(priv->pwdn_gpio, 0);
909762c2812SJacopo Mondi usleep_range(500, 1000);
910762c2812SJacopo Mondi }
911762c2812SJacopo Mondi
912762c2812SJacopo Mondi return 0;
913762c2812SJacopo Mondi }
914762c2812SJacopo Mondi
91595f5a45aSAkinobu Mita static int ov772x_set_params(struct ov772x_priv *priv,
91695f5a45aSAkinobu Mita const struct ov772x_color_format *cfmt,
91795f5a45aSAkinobu Mita const struct ov772x_win_size *win);
91895f5a45aSAkinobu Mita
ov772x_s_power(struct v4l2_subdev * sd,int on)9191112babdSJacopo Mondi static int ov772x_s_power(struct v4l2_subdev *sd, int on)
9201112babdSJacopo Mondi {
9211112babdSJacopo Mondi struct ov772x_priv *priv = to_ov772x(sd);
92234af7d92SAkinobu Mita int ret = 0;
9231112babdSJacopo Mondi
92434af7d92SAkinobu Mita mutex_lock(&priv->lock);
92534af7d92SAkinobu Mita
92634af7d92SAkinobu Mita /* If the power count is modified from 0 to != 0 or from != 0 to 0,
92734af7d92SAkinobu Mita * update the power state.
92834af7d92SAkinobu Mita */
92995f5a45aSAkinobu Mita if (priv->power_count == !on) {
93095f5a45aSAkinobu Mita if (on) {
93195f5a45aSAkinobu Mita ret = ov772x_power_on(priv);
93295f5a45aSAkinobu Mita /*
93395f5a45aSAkinobu Mita * Restore the format, the frame rate, and
93495f5a45aSAkinobu Mita * the controls
93595f5a45aSAkinobu Mita */
93695f5a45aSAkinobu Mita if (!ret)
93795f5a45aSAkinobu Mita ret = ov772x_set_params(priv, priv->cfmt,
93895f5a45aSAkinobu Mita priv->win);
93995f5a45aSAkinobu Mita } else {
94095f5a45aSAkinobu Mita ret = ov772x_power_off(priv);
94195f5a45aSAkinobu Mita }
94295f5a45aSAkinobu Mita }
94334af7d92SAkinobu Mita
94434af7d92SAkinobu Mita if (!ret) {
94534af7d92SAkinobu Mita /* Update the power count. */
94634af7d92SAkinobu Mita priv->power_count += on ? 1 : -1;
94734af7d92SAkinobu Mita WARN(priv->power_count < 0, "Unbalanced power count\n");
94834af7d92SAkinobu Mita WARN(priv->power_count > 1, "Duplicated s_power call\n");
94934af7d92SAkinobu Mita }
95034af7d92SAkinobu Mita
95134af7d92SAkinobu Mita mutex_unlock(&priv->lock);
95234af7d92SAkinobu Mita
95334af7d92SAkinobu Mita return ret;
9541112babdSJacopo Mondi }
9551112babdSJacopo Mondi
ov772x_select_win(u32 width,u32 height)9561112babdSJacopo Mondi static const struct ov772x_win_size *ov772x_select_win(u32 width, u32 height)
9571112babdSJacopo Mondi {
9581112babdSJacopo Mondi const struct ov772x_win_size *win = &ov772x_win_sizes[0];
9591112babdSJacopo Mondi u32 best_diff = UINT_MAX;
9601112babdSJacopo Mondi unsigned int i;
9611112babdSJacopo Mondi
9621112babdSJacopo Mondi for (i = 0; i < ARRAY_SIZE(ov772x_win_sizes); ++i) {
9631112babdSJacopo Mondi u32 diff = abs(width - ov772x_win_sizes[i].rect.width)
9641112babdSJacopo Mondi + abs(height - ov772x_win_sizes[i].rect.height);
9651112babdSJacopo Mondi if (diff < best_diff) {
9661112babdSJacopo Mondi best_diff = diff;
9671112babdSJacopo Mondi win = &ov772x_win_sizes[i];
9681112babdSJacopo Mondi }
9691112babdSJacopo Mondi }
9701112babdSJacopo Mondi
9711112babdSJacopo Mondi return win;
9721112babdSJacopo Mondi }
9731112babdSJacopo Mondi
ov772x_select_params(const struct v4l2_mbus_framefmt * mf,const struct ov772x_color_format ** cfmt,const struct ov772x_win_size ** win)9741112babdSJacopo Mondi static void ov772x_select_params(const struct v4l2_mbus_framefmt *mf,
9751112babdSJacopo Mondi const struct ov772x_color_format **cfmt,
9761112babdSJacopo Mondi const struct ov772x_win_size **win)
9771112babdSJacopo Mondi {
9781112babdSJacopo Mondi unsigned int i;
9791112babdSJacopo Mondi
9801112babdSJacopo Mondi /* Select a format. */
9811112babdSJacopo Mondi *cfmt = &ov772x_cfmts[0];
9821112babdSJacopo Mondi
9831112babdSJacopo Mondi for (i = 0; i < ARRAY_SIZE(ov772x_cfmts); i++) {
9841112babdSJacopo Mondi if (mf->code == ov772x_cfmts[i].code) {
9851112babdSJacopo Mondi *cfmt = &ov772x_cfmts[i];
9861112babdSJacopo Mondi break;
9871112babdSJacopo Mondi }
9881112babdSJacopo Mondi }
9891112babdSJacopo Mondi
9901112babdSJacopo Mondi /* Select a window size. */
9911112babdSJacopo Mondi *win = ov772x_select_win(mf->width, mf->height);
9921112babdSJacopo Mondi }
9931112babdSJacopo Mondi
ov772x_edgectrl(struct ov772x_priv * priv)994c2cae895SAkinobu Mita static int ov772x_edgectrl(struct ov772x_priv *priv)
995c2cae895SAkinobu Mita {
9965bbf3221SAkinobu Mita struct regmap *regmap = priv->regmap;
997c2cae895SAkinobu Mita int ret;
998c2cae895SAkinobu Mita
999c2cae895SAkinobu Mita if (!priv->info)
1000c2cae895SAkinobu Mita return 0;
1001c2cae895SAkinobu Mita
1002c2cae895SAkinobu Mita if (priv->info->edgectrl.strength & OV772X_MANUAL_EDGE_CTRL) {
1003c2cae895SAkinobu Mita /*
1004c2cae895SAkinobu Mita * Manual Edge Control Mode.
1005c2cae895SAkinobu Mita *
1006c2cae895SAkinobu Mita * Edge auto strength bit is set by default.
1007c2cae895SAkinobu Mita * Remove it when manual mode.
1008c2cae895SAkinobu Mita */
1009c2cae895SAkinobu Mita
10105bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, DSPAUTO, EDGE_ACTRL, 0x00);
1011c2cae895SAkinobu Mita if (ret < 0)
1012c2cae895SAkinobu Mita return ret;
1013c2cae895SAkinobu Mita
10145bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, EDGE_TRSHLD,
10155bbf3221SAkinobu Mita OV772X_EDGE_THRESHOLD_MASK,
1016c2cae895SAkinobu Mita priv->info->edgectrl.threshold);
1017c2cae895SAkinobu Mita if (ret < 0)
1018c2cae895SAkinobu Mita return ret;
1019c2cae895SAkinobu Mita
10205bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, EDGE_STRNGT,
10215bbf3221SAkinobu Mita OV772X_EDGE_STRENGTH_MASK,
1022c2cae895SAkinobu Mita priv->info->edgectrl.strength);
1023c2cae895SAkinobu Mita if (ret < 0)
1024c2cae895SAkinobu Mita return ret;
1025c2cae895SAkinobu Mita
1026c2cae895SAkinobu Mita } else if (priv->info->edgectrl.upper > priv->info->edgectrl.lower) {
1027c2cae895SAkinobu Mita /*
1028c2cae895SAkinobu Mita * Auto Edge Control Mode.
1029c2cae895SAkinobu Mita *
1030c2cae895SAkinobu Mita * Set upper and lower limit.
1031c2cae895SAkinobu Mita */
10325bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, EDGE_UPPER,
10335bbf3221SAkinobu Mita OV772X_EDGE_UPPER_MASK,
1034c2cae895SAkinobu Mita priv->info->edgectrl.upper);
1035c2cae895SAkinobu Mita if (ret < 0)
1036c2cae895SAkinobu Mita return ret;
1037c2cae895SAkinobu Mita
10385bbf3221SAkinobu Mita ret = regmap_update_bits(regmap, EDGE_LOWER,
10395bbf3221SAkinobu Mita OV772X_EDGE_LOWER_MASK,
1040c2cae895SAkinobu Mita priv->info->edgectrl.lower);
1041c2cae895SAkinobu Mita if (ret < 0)
1042c2cae895SAkinobu Mita return ret;
1043c2cae895SAkinobu Mita }
1044c2cae895SAkinobu Mita
1045c2cae895SAkinobu Mita return 0;
1046c2cae895SAkinobu Mita }
1047c2cae895SAkinobu Mita
ov772x_set_params(struct ov772x_priv * priv,const struct ov772x_color_format * cfmt,const struct ov772x_win_size * win)10481112babdSJacopo Mondi static int ov772x_set_params(struct ov772x_priv *priv,
10491112babdSJacopo Mondi const struct ov772x_color_format *cfmt,
10501112babdSJacopo Mondi const struct ov772x_win_size *win)
10511112babdSJacopo Mondi {
10521112babdSJacopo Mondi int ret;
10531112babdSJacopo Mondi u8 val;
10541112babdSJacopo Mondi
10552a2f21e3SJacopo Mondi /* Reset hardware. */
10565bbf3221SAkinobu Mita ov772x_reset(priv);
10571112babdSJacopo Mondi
10582a2f21e3SJacopo Mondi /* Edge Ctrl. */
1059c2cae895SAkinobu Mita ret = ov772x_edgectrl(priv);
10601112babdSJacopo Mondi if (ret < 0)
1061c2cae895SAkinobu Mita return ret;
10621112babdSJacopo Mondi
10632a2f21e3SJacopo Mondi /* Format and window size. */
10645bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, HSTART, win->rect.left >> 2);
10651112babdSJacopo Mondi if (ret < 0)
10661112babdSJacopo Mondi goto ov772x_set_fmt_error;
10675bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, HSIZE, win->rect.width >> 2);
10681112babdSJacopo Mondi if (ret < 0)
10691112babdSJacopo Mondi goto ov772x_set_fmt_error;
10705bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, VSTART, win->rect.top >> 1);
10711112babdSJacopo Mondi if (ret < 0)
10721112babdSJacopo Mondi goto ov772x_set_fmt_error;
10735bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, VSIZE, win->rect.height >> 1);
10741112babdSJacopo Mondi if (ret < 0)
10751112babdSJacopo Mondi goto ov772x_set_fmt_error;
10765bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, HOUTSIZE, win->rect.width >> 2);
10771112babdSJacopo Mondi if (ret < 0)
10781112babdSJacopo Mondi goto ov772x_set_fmt_error;
10795bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, VOUTSIZE, win->rect.height >> 1);
10801112babdSJacopo Mondi if (ret < 0)
10811112babdSJacopo Mondi goto ov772x_set_fmt_error;
10825bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, HREF,
10831112babdSJacopo Mondi ((win->rect.top & 1) << HREF_VSTART_SHIFT) |
10841112babdSJacopo Mondi ((win->rect.left & 3) << HREF_HSTART_SHIFT) |
10851112babdSJacopo Mondi ((win->rect.height & 1) << HREF_VSIZE_SHIFT) |
10861112babdSJacopo Mondi ((win->rect.width & 3) << HREF_HSIZE_SHIFT));
10871112babdSJacopo Mondi if (ret < 0)
10881112babdSJacopo Mondi goto ov772x_set_fmt_error;
10895bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, EXHCH,
10901112babdSJacopo Mondi ((win->rect.height & 1) << EXHCH_VSIZE_SHIFT) |
10911112babdSJacopo Mondi ((win->rect.width & 3) << EXHCH_HSIZE_SHIFT));
10921112babdSJacopo Mondi if (ret < 0)
10931112babdSJacopo Mondi goto ov772x_set_fmt_error;
10941112babdSJacopo Mondi
10952a2f21e3SJacopo Mondi /* Set DSP_CTRL3. */
10961112babdSJacopo Mondi val = cfmt->dsp3;
10971112babdSJacopo Mondi if (val) {
10985bbf3221SAkinobu Mita ret = regmap_update_bits(priv->regmap, DSP_CTRL3, UV_MASK, val);
10991112babdSJacopo Mondi if (ret < 0)
11001112babdSJacopo Mondi goto ov772x_set_fmt_error;
11011112babdSJacopo Mondi }
11021112babdSJacopo Mondi
11031112babdSJacopo Mondi /* DSP_CTRL4: AEC reference point and DSP output format. */
11041112babdSJacopo Mondi if (cfmt->dsp4) {
11055bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, DSP_CTRL4, cfmt->dsp4);
11061112babdSJacopo Mondi if (ret < 0)
11071112babdSJacopo Mondi goto ov772x_set_fmt_error;
11081112babdSJacopo Mondi }
11091112babdSJacopo Mondi
11102a2f21e3SJacopo Mondi /* Set COM3. */
11111112babdSJacopo Mondi val = cfmt->com3;
1112c2cae895SAkinobu Mita if (priv->info && (priv->info->flags & OV772X_FLAG_VFLIP))
11131112babdSJacopo Mondi val |= VFLIP_IMG;
1114c2cae895SAkinobu Mita if (priv->info && (priv->info->flags & OV772X_FLAG_HFLIP))
11151112babdSJacopo Mondi val |= HFLIP_IMG;
111609e620c6SAkinobu Mita if (priv->vflip_ctrl->val)
11171112babdSJacopo Mondi val ^= VFLIP_IMG;
111809e620c6SAkinobu Mita if (priv->hflip_ctrl->val)
11191112babdSJacopo Mondi val ^= HFLIP_IMG;
1120f5c24ca7SLad Prabhakar if (priv->test_pattern)
1121f5c24ca7SLad Prabhakar val |= SCOLOR_TEST;
11221112babdSJacopo Mondi
11235bbf3221SAkinobu Mita ret = regmap_update_bits(priv->regmap, COM3, SWAP_MASK | IMG_MASK, val);
11241112babdSJacopo Mondi if (ret < 0)
11251112babdSJacopo Mondi goto ov772x_set_fmt_error;
11261112babdSJacopo Mondi
11271112babdSJacopo Mondi /* COM7: Sensor resolution and output format control. */
11285bbf3221SAkinobu Mita ret = regmap_write(priv->regmap, COM7, win->com7_bit | cfmt->com7);
11291112babdSJacopo Mondi if (ret < 0)
11301112babdSJacopo Mondi goto ov772x_set_fmt_error;
11311112babdSJacopo Mondi
113235089491SJacopo Mondi /* COM4, CLKRC: Set pixel clock and framerate. */
113380dc2a49SAkinobu Mita ret = ov772x_set_frame_rate(priv, priv->fps, cfmt, win);
113435089491SJacopo Mondi if (ret < 0)
113535089491SJacopo Mondi goto ov772x_set_fmt_error;
113635089491SJacopo Mondi
11372a2f21e3SJacopo Mondi /* Set COM8. */
113809e620c6SAkinobu Mita if (priv->band_filter_ctrl->val) {
113909e620c6SAkinobu Mita unsigned short band_filter = priv->band_filter_ctrl->val;
114009e620c6SAkinobu Mita
11415bbf3221SAkinobu Mita ret = regmap_update_bits(priv->regmap, COM8,
11425bbf3221SAkinobu Mita BNDF_ON_OFF, BNDF_ON_OFF);
11431112babdSJacopo Mondi if (!ret)
11445bbf3221SAkinobu Mita ret = regmap_update_bits(priv->regmap, BDBASE,
114509e620c6SAkinobu Mita 0xff, 256 - band_filter);
11461112babdSJacopo Mondi if (ret < 0)
11471112babdSJacopo Mondi goto ov772x_set_fmt_error;
11481112babdSJacopo Mondi }
11491112babdSJacopo Mondi
11501112babdSJacopo Mondi return ret;
11511112babdSJacopo Mondi
11521112babdSJacopo Mondi ov772x_set_fmt_error:
11531112babdSJacopo Mondi
11545bbf3221SAkinobu Mita ov772x_reset(priv);
11551112babdSJacopo Mondi
11561112babdSJacopo Mondi return ret;
11571112babdSJacopo Mondi }
11581112babdSJacopo Mondi
ov772x_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)11591112babdSJacopo Mondi static int ov772x_get_selection(struct v4l2_subdev *sd,
11600d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
11611112babdSJacopo Mondi struct v4l2_subdev_selection *sel)
11621112babdSJacopo Mondi {
1163762c2812SJacopo Mondi struct ov772x_priv *priv = to_ov772x(sd);
1164762c2812SJacopo Mondi
11651112babdSJacopo Mondi if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
11661112babdSJacopo Mondi return -EINVAL;
11671112babdSJacopo Mondi
11681112babdSJacopo Mondi sel->r.left = 0;
11691112babdSJacopo Mondi sel->r.top = 0;
11701112babdSJacopo Mondi switch (sel->target) {
11711112babdSJacopo Mondi case V4L2_SEL_TGT_CROP_BOUNDS:
11721112babdSJacopo Mondi case V4L2_SEL_TGT_CROP:
1173762c2812SJacopo Mondi sel->r.width = priv->win->rect.width;
1174762c2812SJacopo Mondi sel->r.height = priv->win->rect.height;
11751112babdSJacopo Mondi return 0;
11761112babdSJacopo Mondi default:
11771112babdSJacopo Mondi return -EINVAL;
11781112babdSJacopo Mondi }
11791112babdSJacopo Mondi }
11801112babdSJacopo Mondi
ov772x_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)11811112babdSJacopo Mondi static int ov772x_get_fmt(struct v4l2_subdev *sd,
11820d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
11831112babdSJacopo Mondi struct v4l2_subdev_format *format)
11841112babdSJacopo Mondi {
11851112babdSJacopo Mondi struct v4l2_mbus_framefmt *mf = &format->format;
11861112babdSJacopo Mondi struct ov772x_priv *priv = to_ov772x(sd);
11871112babdSJacopo Mondi
11881112babdSJacopo Mondi if (format->pad)
11891112babdSJacopo Mondi return -EINVAL;
11901112babdSJacopo Mondi
11911112babdSJacopo Mondi mf->width = priv->win->rect.width;
11921112babdSJacopo Mondi mf->height = priv->win->rect.height;
11931112babdSJacopo Mondi mf->code = priv->cfmt->code;
11941112babdSJacopo Mondi mf->colorspace = priv->cfmt->colorspace;
11951112babdSJacopo Mondi mf->field = V4L2_FIELD_NONE;
11961112babdSJacopo Mondi
11971112babdSJacopo Mondi return 0;
11981112babdSJacopo Mondi }
11991112babdSJacopo Mondi
ov772x_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)12001112babdSJacopo Mondi static int ov772x_set_fmt(struct v4l2_subdev *sd,
12010d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
12021112babdSJacopo Mondi struct v4l2_subdev_format *format)
12031112babdSJacopo Mondi {
12041112babdSJacopo Mondi struct ov772x_priv *priv = to_ov772x(sd);
12051112babdSJacopo Mondi struct v4l2_mbus_framefmt *mf = &format->format;
12061112babdSJacopo Mondi const struct ov772x_color_format *cfmt;
12071112babdSJacopo Mondi const struct ov772x_win_size *win;
120895f5a45aSAkinobu Mita int ret = 0;
12091112babdSJacopo Mondi
12101112babdSJacopo Mondi if (format->pad)
12111112babdSJacopo Mondi return -EINVAL;
12121112babdSJacopo Mondi
12131112babdSJacopo Mondi ov772x_select_params(mf, &cfmt, &win);
12141112babdSJacopo Mondi
12151112babdSJacopo Mondi mf->code = cfmt->code;
12161112babdSJacopo Mondi mf->width = win->rect.width;
12171112babdSJacopo Mondi mf->height = win->rect.height;
12181112babdSJacopo Mondi mf->field = V4L2_FIELD_NONE;
12191112babdSJacopo Mondi mf->colorspace = cfmt->colorspace;
1220762c2812SJacopo Mondi mf->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
1221762c2812SJacopo Mondi mf->quantization = V4L2_QUANTIZATION_DEFAULT;
1222762c2812SJacopo Mondi mf->xfer_func = V4L2_XFER_FUNC_DEFAULT;
12231112babdSJacopo Mondi
12241112babdSJacopo Mondi if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
12250d346d2aSTomi Valkeinen sd_state->pads->try_fmt = *mf;
12261112babdSJacopo Mondi return 0;
12271112babdSJacopo Mondi }
12281112babdSJacopo Mondi
122995f5a45aSAkinobu Mita mutex_lock(&priv->lock);
12307b9998c9SAkinobu Mita
12317b9998c9SAkinobu Mita if (priv->streaming) {
12327b9998c9SAkinobu Mita ret = -EBUSY;
12337b9998c9SAkinobu Mita goto error;
12347b9998c9SAkinobu Mita }
12357b9998c9SAkinobu Mita
123695f5a45aSAkinobu Mita /*
123795f5a45aSAkinobu Mita * If the device is not powered up by the host driver do
123895f5a45aSAkinobu Mita * not apply any changes to H/W at this time. Instead
123995f5a45aSAkinobu Mita * the format will be restored right after power-up.
124095f5a45aSAkinobu Mita */
124195f5a45aSAkinobu Mita if (priv->power_count > 0) {
12421112babdSJacopo Mondi ret = ov772x_set_params(priv, cfmt, win);
12431112babdSJacopo Mondi if (ret < 0)
124495f5a45aSAkinobu Mita goto error;
124595f5a45aSAkinobu Mita }
12461112babdSJacopo Mondi priv->win = win;
12471112babdSJacopo Mondi priv->cfmt = cfmt;
1248e0853a43SJacopo Mondi
124995f5a45aSAkinobu Mita error:
125095f5a45aSAkinobu Mita mutex_unlock(&priv->lock);
125195f5a45aSAkinobu Mita
125295f5a45aSAkinobu Mita return ret;
12531112babdSJacopo Mondi }
12541112babdSJacopo Mondi
ov772x_video_probe(struct ov772x_priv * priv)12551112babdSJacopo Mondi static int ov772x_video_probe(struct ov772x_priv *priv)
12561112babdSJacopo Mondi {
12571112babdSJacopo Mondi struct i2c_client *client = v4l2_get_subdevdata(&priv->subdev);
125830f3b17eSAkinobu Mita int pid, ver, midh, midl;
12591112babdSJacopo Mondi const char *devname;
12601112babdSJacopo Mondi int ret;
12611112babdSJacopo Mondi
126295f5a45aSAkinobu Mita ret = ov772x_power_on(priv);
12631112babdSJacopo Mondi if (ret < 0)
12641112babdSJacopo Mondi return ret;
12651112babdSJacopo Mondi
12662a2f21e3SJacopo Mondi /* Check and show product ID and manufacturer ID. */
12675bbf3221SAkinobu Mita ret = regmap_read(priv->regmap, PID, &pid);
12685bbf3221SAkinobu Mita if (ret < 0)
12695bbf3221SAkinobu Mita return ret;
12705bbf3221SAkinobu Mita ret = regmap_read(priv->regmap, VER, &ver);
12715bbf3221SAkinobu Mita if (ret < 0)
12725bbf3221SAkinobu Mita return ret;
12731112babdSJacopo Mondi
12741112babdSJacopo Mondi switch (VERSION(pid, ver)) {
12751112babdSJacopo Mondi case OV7720:
12761112babdSJacopo Mondi devname = "ov7720";
12771112babdSJacopo Mondi break;
12781112babdSJacopo Mondi case OV7725:
12791112babdSJacopo Mondi devname = "ov7725";
12801112babdSJacopo Mondi break;
12811112babdSJacopo Mondi default:
12821112babdSJacopo Mondi dev_err(&client->dev,
12831112babdSJacopo Mondi "Product ID error %x:%x\n", pid, ver);
12841112babdSJacopo Mondi ret = -ENODEV;
12851112babdSJacopo Mondi goto done;
12861112babdSJacopo Mondi }
12871112babdSJacopo Mondi
12885bbf3221SAkinobu Mita ret = regmap_read(priv->regmap, MIDH, &midh);
12895bbf3221SAkinobu Mita if (ret < 0)
12905bbf3221SAkinobu Mita return ret;
12915bbf3221SAkinobu Mita ret = regmap_read(priv->regmap, MIDL, &midl);
12925bbf3221SAkinobu Mita if (ret < 0)
12935bbf3221SAkinobu Mita return ret;
129430f3b17eSAkinobu Mita
12951112babdSJacopo Mondi dev_info(&client->dev,
12961112babdSJacopo Mondi "%s Product ID %0x:%0x Manufacturer ID %x:%x\n",
129730f3b17eSAkinobu Mita devname, pid, ver, midh, midl);
129830f3b17eSAkinobu Mita
12991112babdSJacopo Mondi ret = v4l2_ctrl_handler_setup(&priv->hdl);
13001112babdSJacopo Mondi
13011112babdSJacopo Mondi done:
130295f5a45aSAkinobu Mita ov772x_power_off(priv);
1303e0853a43SJacopo Mondi
13041112babdSJacopo Mondi return ret;
13051112babdSJacopo Mondi }
13061112babdSJacopo Mondi
13071112babdSJacopo Mondi static const struct v4l2_ctrl_ops ov772x_ctrl_ops = {
13081112babdSJacopo Mondi .s_ctrl = ov772x_s_ctrl,
13091112babdSJacopo Mondi };
13101112babdSJacopo Mondi
13111112babdSJacopo Mondi static const struct v4l2_subdev_core_ops ov772x_subdev_core_ops = {
1312bedfcd46SAkinobu Mita .log_status = v4l2_ctrl_subdev_log_status,
1313bedfcd46SAkinobu Mita .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
1314bedfcd46SAkinobu Mita .unsubscribe_event = v4l2_event_subdev_unsubscribe,
13151112babdSJacopo Mondi #ifdef CONFIG_VIDEO_ADV_DEBUG
13161112babdSJacopo Mondi .g_register = ov772x_g_register,
13171112babdSJacopo Mondi .s_register = ov772x_s_register,
13181112babdSJacopo Mondi #endif
13191112babdSJacopo Mondi .s_power = ov772x_s_power,
13201112babdSJacopo Mondi };
13211112babdSJacopo Mondi
ov772x_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_interval_enum * fie)132235089491SJacopo Mondi static int ov772x_enum_frame_interval(struct v4l2_subdev *sd,
13230d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
132435089491SJacopo Mondi struct v4l2_subdev_frame_interval_enum *fie)
132535089491SJacopo Mondi {
132635089491SJacopo Mondi if (fie->pad || fie->index >= ARRAY_SIZE(ov772x_frame_intervals))
132735089491SJacopo Mondi return -EINVAL;
132835089491SJacopo Mondi
132935089491SJacopo Mondi if (fie->width != VGA_WIDTH && fie->width != QVGA_WIDTH)
133035089491SJacopo Mondi return -EINVAL;
133135089491SJacopo Mondi if (fie->height != VGA_HEIGHT && fie->height != QVGA_HEIGHT)
133235089491SJacopo Mondi return -EINVAL;
133335089491SJacopo Mondi
133435089491SJacopo Mondi fie->interval.numerator = 1;
133535089491SJacopo Mondi fie->interval.denominator = ov772x_frame_intervals[fie->index];
133635089491SJacopo Mondi
133735089491SJacopo Mondi return 0;
133835089491SJacopo Mondi }
133935089491SJacopo Mondi
ov772x_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)13401112babdSJacopo Mondi static int ov772x_enum_mbus_code(struct v4l2_subdev *sd,
13410d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state,
13421112babdSJacopo Mondi struct v4l2_subdev_mbus_code_enum *code)
13431112babdSJacopo Mondi {
13441112babdSJacopo Mondi if (code->pad || code->index >= ARRAY_SIZE(ov772x_cfmts))
13451112babdSJacopo Mondi return -EINVAL;
13461112babdSJacopo Mondi
13471112babdSJacopo Mondi code->code = ov772x_cfmts[code->index].code;
1348e0853a43SJacopo Mondi
13491112babdSJacopo Mondi return 0;
13501112babdSJacopo Mondi }
13511112babdSJacopo Mondi
13521112babdSJacopo Mondi static const struct v4l2_subdev_video_ops ov772x_subdev_video_ops = {
13531112babdSJacopo Mondi .s_stream = ov772x_s_stream,
135435089491SJacopo Mondi .s_frame_interval = ov772x_s_frame_interval,
135535089491SJacopo Mondi .g_frame_interval = ov772x_g_frame_interval,
13561112babdSJacopo Mondi };
13571112babdSJacopo Mondi
13581112babdSJacopo Mondi static const struct v4l2_subdev_pad_ops ov772x_subdev_pad_ops = {
135935089491SJacopo Mondi .enum_frame_interval = ov772x_enum_frame_interval,
13601112babdSJacopo Mondi .enum_mbus_code = ov772x_enum_mbus_code,
13611112babdSJacopo Mondi .get_selection = ov772x_get_selection,
13621112babdSJacopo Mondi .get_fmt = ov772x_get_fmt,
13631112babdSJacopo Mondi .set_fmt = ov772x_set_fmt,
13641112babdSJacopo Mondi };
13651112babdSJacopo Mondi
13661112babdSJacopo Mondi static const struct v4l2_subdev_ops ov772x_subdev_ops = {
13671112babdSJacopo Mondi .core = &ov772x_subdev_core_ops,
13681112babdSJacopo Mondi .video = &ov772x_subdev_video_ops,
13691112babdSJacopo Mondi .pad = &ov772x_subdev_pad_ops,
13701112babdSJacopo Mondi };
13711112babdSJacopo Mondi
ov772x_parse_dt(struct i2c_client * client,struct ov772x_priv * priv)13728a10b4e3SLad Prabhakar static int ov772x_parse_dt(struct i2c_client *client,
13738a10b4e3SLad Prabhakar struct ov772x_priv *priv)
13748a10b4e3SLad Prabhakar {
13758a10b4e3SLad Prabhakar struct v4l2_fwnode_endpoint bus_cfg = {
13768a10b4e3SLad Prabhakar .bus_type = V4L2_MBUS_PARALLEL
13778a10b4e3SLad Prabhakar };
13788a10b4e3SLad Prabhakar struct fwnode_handle *ep;
13798a10b4e3SLad Prabhakar int ret;
13808a10b4e3SLad Prabhakar
13818a10b4e3SLad Prabhakar ep = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
13828a10b4e3SLad Prabhakar if (!ep) {
13838a10b4e3SLad Prabhakar dev_err(&client->dev, "Endpoint node not found\n");
13848a10b4e3SLad Prabhakar return -EINVAL;
13858a10b4e3SLad Prabhakar }
13868a10b4e3SLad Prabhakar
1387efcb7ddaSLad Prabhakar /*
1388efcb7ddaSLad Prabhakar * For backward compatibility with older DTS where the
1389efcb7ddaSLad Prabhakar * bus-type property was not mandatory, assume
1390efcb7ddaSLad Prabhakar * V4L2_MBUS_PARALLEL as it was the only supported bus at the
1391efcb7ddaSLad Prabhakar * time. v4l2_fwnode_endpoint_alloc_parse() will not fail if
1392efcb7ddaSLad Prabhakar * 'bus-type' is not specified.
1393efcb7ddaSLad Prabhakar */
1394efcb7ddaSLad Prabhakar ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1395efcb7ddaSLad Prabhakar if (ret) {
1396efcb7ddaSLad Prabhakar bus_cfg = (struct v4l2_fwnode_endpoint)
1397efcb7ddaSLad Prabhakar { .bus_type = V4L2_MBUS_BT656 };
13988a10b4e3SLad Prabhakar ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
13998a10b4e3SLad Prabhakar if (ret)
14008a10b4e3SLad Prabhakar goto error_fwnode_put;
1401efcb7ddaSLad Prabhakar }
14028a10b4e3SLad Prabhakar
14038a10b4e3SLad Prabhakar priv->bus_type = bus_cfg.bus_type;
14048a10b4e3SLad Prabhakar v4l2_fwnode_endpoint_free(&bus_cfg);
14058a10b4e3SLad Prabhakar
14068a10b4e3SLad Prabhakar error_fwnode_put:
14078a10b4e3SLad Prabhakar fwnode_handle_put(ep);
14088a10b4e3SLad Prabhakar
14098a10b4e3SLad Prabhakar return ret;
14108a10b4e3SLad Prabhakar }
14118a10b4e3SLad Prabhakar
14121112babdSJacopo Mondi /*
14131112babdSJacopo Mondi * i2c_driver function
14141112babdSJacopo Mondi */
14151112babdSJacopo Mondi
ov772x_probe(struct i2c_client * client)1416e6714993SKieran Bingham static int ov772x_probe(struct i2c_client *client)
14171112babdSJacopo Mondi {
14181112babdSJacopo Mondi struct ov772x_priv *priv;
14191112babdSJacopo Mondi int ret;
14205bbf3221SAkinobu Mita static const struct regmap_config ov772x_regmap_config = {
14215bbf3221SAkinobu Mita .reg_bits = 8,
14225bbf3221SAkinobu Mita .val_bits = 8,
14235bbf3221SAkinobu Mita .max_register = DSPAUTO,
14245bbf3221SAkinobu Mita };
14251112babdSJacopo Mondi
1426c2cae895SAkinobu Mita if (!client->dev.of_node && !client->dev.platform_data) {
1427c2cae895SAkinobu Mita dev_err(&client->dev,
1428c2cae895SAkinobu Mita "Missing ov772x platform data for non-DT device\n");
14291112babdSJacopo Mondi return -EINVAL;
14301112babdSJacopo Mondi }
14311112babdSJacopo Mondi
14321112babdSJacopo Mondi priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
14331112babdSJacopo Mondi if (!priv)
14341112babdSJacopo Mondi return -ENOMEM;
14351112babdSJacopo Mondi
14365bbf3221SAkinobu Mita priv->regmap = devm_regmap_init_sccb(client, &ov772x_regmap_config);
14375bbf3221SAkinobu Mita if (IS_ERR(priv->regmap)) {
14385bbf3221SAkinobu Mita dev_err(&client->dev, "Failed to allocate register map\n");
14395bbf3221SAkinobu Mita return PTR_ERR(priv->regmap);
14405bbf3221SAkinobu Mita }
14415bbf3221SAkinobu Mita
1442762c2812SJacopo Mondi priv->info = client->dev.platform_data;
144334af7d92SAkinobu Mita mutex_init(&priv->lock);
14441112babdSJacopo Mondi
14451112babdSJacopo Mondi v4l2_i2c_subdev_init(&priv->subdev, client, &ov772x_subdev_ops);
1446bedfcd46SAkinobu Mita priv->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1447bedfcd46SAkinobu Mita V4L2_SUBDEV_FL_HAS_EVENTS;
14481112babdSJacopo Mondi v4l2_ctrl_handler_init(&priv->hdl, 3);
144995f5a45aSAkinobu Mita /* Use our mutex for the controls */
145095f5a45aSAkinobu Mita priv->hdl.lock = &priv->lock;
145109e620c6SAkinobu Mita priv->vflip_ctrl = v4l2_ctrl_new_std(&priv->hdl, &ov772x_ctrl_ops,
14521112babdSJacopo Mondi V4L2_CID_VFLIP, 0, 1, 1, 0);
145309e620c6SAkinobu Mita priv->hflip_ctrl = v4l2_ctrl_new_std(&priv->hdl, &ov772x_ctrl_ops,
14541112babdSJacopo Mondi V4L2_CID_HFLIP, 0, 1, 1, 0);
145509e620c6SAkinobu Mita priv->band_filter_ctrl = v4l2_ctrl_new_std(&priv->hdl, &ov772x_ctrl_ops,
145609e620c6SAkinobu Mita V4L2_CID_BAND_STOP_FILTER,
145709e620c6SAkinobu Mita 0, 256, 1, 0);
1458f5c24ca7SLad Prabhakar v4l2_ctrl_new_std_menu_items(&priv->hdl, &ov772x_ctrl_ops,
1459f5c24ca7SLad Prabhakar V4L2_CID_TEST_PATTERN,
1460f5c24ca7SLad Prabhakar ARRAY_SIZE(ov772x_test_pattern_menu) - 1,
1461f5c24ca7SLad Prabhakar 0, 0, ov772x_test_pattern_menu);
14621112babdSJacopo Mondi priv->subdev.ctrl_handler = &priv->hdl;
146334af7d92SAkinobu Mita if (priv->hdl.error) {
146434af7d92SAkinobu Mita ret = priv->hdl.error;
14657485edb2SYuan Can goto error_ctrl_free;
146634af7d92SAkinobu Mita }
14671112babdSJacopo Mondi
146889ce93fdSAkinobu Mita priv->clk = clk_get(&client->dev, NULL);
14691112babdSJacopo Mondi if (IS_ERR(priv->clk)) {
1470762c2812SJacopo Mondi dev_err(&client->dev, "Unable to get xclk clock\n");
14711112babdSJacopo Mondi ret = PTR_ERR(priv->clk);
1472762c2812SJacopo Mondi goto error_ctrl_free;
1473762c2812SJacopo Mondi }
1474762c2812SJacopo Mondi
147540519d54SAkinobu Mita priv->pwdn_gpio = gpiod_get_optional(&client->dev, "powerdown",
1476762c2812SJacopo Mondi GPIOD_OUT_LOW);
1477762c2812SJacopo Mondi if (IS_ERR(priv->pwdn_gpio)) {
147840519d54SAkinobu Mita dev_info(&client->dev, "Unable to get GPIO \"powerdown\"");
1479762c2812SJacopo Mondi ret = PTR_ERR(priv->pwdn_gpio);
1480762c2812SJacopo Mondi goto error_clk_put;
14811112babdSJacopo Mondi }
14821112babdSJacopo Mondi
14838a10b4e3SLad Prabhakar ret = ov772x_parse_dt(client, priv);
14848a10b4e3SLad Prabhakar if (ret)
14858a10b4e3SLad Prabhakar goto error_clk_put;
14868a10b4e3SLad Prabhakar
14871112babdSJacopo Mondi ret = ov772x_video_probe(priv);
1488762c2812SJacopo Mondi if (ret < 0)
1489762c2812SJacopo Mondi goto error_gpio_put;
1490762c2812SJacopo Mondi
14914b610d6dSAkinobu Mita #ifdef CONFIG_MEDIA_CONTROLLER
14924b610d6dSAkinobu Mita priv->pad.flags = MEDIA_PAD_FL_SOURCE;
14934b610d6dSAkinobu Mita priv->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR;
14944b610d6dSAkinobu Mita ret = media_entity_pads_init(&priv->subdev.entity, 1, &priv->pad);
14954b610d6dSAkinobu Mita if (ret < 0)
14964b610d6dSAkinobu Mita goto error_gpio_put;
14974b610d6dSAkinobu Mita #endif
14984b610d6dSAkinobu Mita
14991112babdSJacopo Mondi priv->cfmt = &ov772x_cfmts[0];
15001112babdSJacopo Mondi priv->win = &ov772x_win_sizes[0];
150135089491SJacopo Mondi priv->fps = 15;
1502762c2812SJacopo Mondi
1503762c2812SJacopo Mondi ret = v4l2_async_register_subdev(&priv->subdev);
1504762c2812SJacopo Mondi if (ret)
15054b610d6dSAkinobu Mita goto error_entity_cleanup;
1506762c2812SJacopo Mondi
1507762c2812SJacopo Mondi return 0;
1508762c2812SJacopo Mondi
15094b610d6dSAkinobu Mita error_entity_cleanup:
15104b610d6dSAkinobu Mita media_entity_cleanup(&priv->subdev.entity);
1511762c2812SJacopo Mondi error_gpio_put:
1512762c2812SJacopo Mondi if (priv->pwdn_gpio)
1513762c2812SJacopo Mondi gpiod_put(priv->pwdn_gpio);
1514762c2812SJacopo Mondi error_clk_put:
1515762c2812SJacopo Mondi clk_put(priv->clk);
1516762c2812SJacopo Mondi error_ctrl_free:
1517762c2812SJacopo Mondi v4l2_ctrl_handler_free(&priv->hdl);
151834af7d92SAkinobu Mita mutex_destroy(&priv->lock);
15191112babdSJacopo Mondi
15201112babdSJacopo Mondi return ret;
15211112babdSJacopo Mondi }
15221112babdSJacopo Mondi
ov772x_remove(struct i2c_client * client)1523ed5c2f5fSUwe Kleine-König static void ov772x_remove(struct i2c_client *client)
15241112babdSJacopo Mondi {
15251112babdSJacopo Mondi struct ov772x_priv *priv = to_ov772x(i2c_get_clientdata(client));
15261112babdSJacopo Mondi
15274b610d6dSAkinobu Mita media_entity_cleanup(&priv->subdev.entity);
1528762c2812SJacopo Mondi clk_put(priv->clk);
1529762c2812SJacopo Mondi if (priv->pwdn_gpio)
1530762c2812SJacopo Mondi gpiod_put(priv->pwdn_gpio);
153127a48feaSJacopo Mondi v4l2_async_unregister_subdev(&priv->subdev);
15321112babdSJacopo Mondi v4l2_ctrl_handler_free(&priv->hdl);
153334af7d92SAkinobu Mita mutex_destroy(&priv->lock);
15341112babdSJacopo Mondi }
15351112babdSJacopo Mondi
15361112babdSJacopo Mondi static const struct i2c_device_id ov772x_id[] = {
15371112babdSJacopo Mondi { "ov772x", 0 },
15381112babdSJacopo Mondi { }
15391112babdSJacopo Mondi };
15401112babdSJacopo Mondi MODULE_DEVICE_TABLE(i2c, ov772x_id);
15411112babdSJacopo Mondi
1542c2cae895SAkinobu Mita static const struct of_device_id ov772x_of_match[] = {
1543c2cae895SAkinobu Mita { .compatible = "ovti,ov7725", },
1544c2cae895SAkinobu Mita { .compatible = "ovti,ov7720", },
1545c2cae895SAkinobu Mita { /* sentinel */ },
1546c2cae895SAkinobu Mita };
1547c2cae895SAkinobu Mita MODULE_DEVICE_TABLE(of, ov772x_of_match);
1548c2cae895SAkinobu Mita
15491112babdSJacopo Mondi static struct i2c_driver ov772x_i2c_driver = {
15501112babdSJacopo Mondi .driver = {
15511112babdSJacopo Mondi .name = "ov772x",
1552c2cae895SAkinobu Mita .of_match_table = ov772x_of_match,
15531112babdSJacopo Mondi },
1554*aaeb31c0SUwe Kleine-König .probe = ov772x_probe,
15551112babdSJacopo Mondi .remove = ov772x_remove,
15561112babdSJacopo Mondi .id_table = ov772x_id,
15571112babdSJacopo Mondi };
15581112babdSJacopo Mondi
15591112babdSJacopo Mondi module_i2c_driver(ov772x_i2c_driver);
15601112babdSJacopo Mondi
1561762c2812SJacopo Mondi MODULE_DESCRIPTION("V4L2 driver for OV772x image sensor");
15621112babdSJacopo Mondi MODULE_AUTHOR("Kuninori Morimoto");
15631112babdSJacopo Mondi MODULE_LICENSE("GPL v2");
1564