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/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
H A D	pipeline.json	9 …rontend, cache miss.This event counts every cycle the DPU IQ is empty and there is an instruction … 12 …rontend, cache miss.This event counts every cycle the DPU IQ is empty and there is an instruction … 15 … frontend, TLB miss.This event counts every cycle the DPU IQ is empty and there is an instruction … 18 … frontend, TLB miss.This event counts every cycle the DPU IQ is empty and there is an instruction … 21 …d, pre-decode error.This event counts every cycle the DPU IQ is empty and there is a pre-decode er… 24 …d, pre-decode error.This event counts every cycle the DPU IQ is empty and there is a pre-decode er… 27 …backend interlock.This event counts every cycle that issue is stalled and there is an interlock. S… 30 …backend interlock.This event counts every cycle that issue is stalled and there is an interlock. S… 33 …d, interlock, AGU.This event counts every cycle that issue is stalled and there is an interlock th… 36 …d, interlock, AGU.This event counts every cycle that issue is stalled and there is an interlock th… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
H A D	pipeline.json	21 … cycle that the Data Processing Unit (DPU) instruction queue is empty and there is an instruction … 24 … cycle that the Data Processing Unit (DPU) instruction queue is empty and there is an instruction … 27 …This event counts every cycle that the DPU instruction queue is empty and there is an instruction … 30 …This event counts every cycle that the DPU instruction queue is empty and there is an instruction … 39 …s event counts every cycle where the issue of an operation is stalled and there is an interlock. S… 42 …s event counts every cycle where the issue of an operation is stalled and there is an interlock. S… 45 …s event counts every cycle where the issue of an operation is stalled and there is an interlock on… 48 …s event counts every cycle where the issue of an operation is stalled and there is an interlock on… 51 … or the Vector Processing Unit (VPU). This event counts every cycle where there is a stall or an i… 54 … or the Vector Processing Unit (VPU). This event counts every cycle where there is a stall or an i… [all …]
/openbmc/linux/include/linux/atomic/
H A D	atomic-instrumented.h	25 * Unsafe to use in noinstr code; use raw_atomic_read() there. 42 * Unsafe to use in noinstr code; use raw_atomic_read_acquire() there. 60 * Unsafe to use in noinstr code; use raw_atomic_set() there. 78 * Unsafe to use in noinstr code; use raw_atomic_set_release() there. 97 * Unsafe to use in noinstr code; use raw_atomic_add() there. 115 * Unsafe to use in noinstr code; use raw_atomic_add_return() there. 134 * Unsafe to use in noinstr code; use raw_atomic_add_return_acquire() there. 152 * Unsafe to use in noinstr code; use raw_atomic_add_return_release() there. 171 * Unsafe to use in noinstr code; use raw_atomic_add_return_relaxed() there. 189 * Unsafe to use in noinstr code; use raw_atomic_fetch_add() there. [all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/
H A D	pipeline.json	15 …"BriefDescription": "Cycles the DPU IQ is empty and there is an instruction cache miss being proce… 20 …"BriefDescription": "Cycles the DPU IQ is empty and there is an instruction micro-TLB miss being p… 25 "BriefDescription": "Cycles the DPU IQ is empty and there is a pre-decode error being processed" 30 …"BriefDescription": "Cycles there is an interlock other than Advanced SIMD/Floating-point instruc… 35 …"BriefDescription": "Cycles there is an interlock for a load/store instruction waiting for data to… 40 … "BriefDescription": "Cycles there is an interlock for an Advanced SIMD/Floating-point operation." 45 "BriefDescription": "Cycles there is a stall in the Wr stage because of a load miss" 50 "BriefDescription": "Cycles there is a stall in the Wr stage because of a store"
/openbmc/linux/Documentation/locking/
H A D	robust-futexes.rst	18 that says "there's a waiter pending", and the sys_futex(FUTEX_WAIT) 23 value) that there were waiter(s) pending, and does the 26 state, and there's no in-kernel state associated with it. The kernel 27 completely forgets that there ever was a futex at that address. This 42 There is a big conceptual problem with futex based mutexes though: it is 44 the kernel cannot help with the cleanup: if there is no 'futex queue' 45 (and in most cases there is none, futexes being fast lightweight locks) 75 because the kernel has no knowledge about how many robust futexes there 89 At the heart of this new approach there is a per-thread private list of 93 time, the kernel checks this user-space list: are there any robust futex [all …]
/openbmc/u-boot/arch/mips/mach-bmips/
H A D	Kconfig	136 Between its different peripherals there's an integrated switch with 4 147 Between its different peripherals there's an integrated switch with 4 158 Between its different peripherals there's an integrated switch with 4 169 Between its different peripherals there's a BCM5325 switch with 4 180 Between its different peripherals there's an integrated switch with 4 191 Between its different peripherals there's a BCM53115 switch with 5 202 Between its different peripherals there's a BCM5325 switch with 4 213 Between its different peripherals there's a BCM53115 switch with 4 224 Between its different peripherals there's a BCM53125 switch with 5 235 Between its different peripherals there's a BCM5325 switch with 4 [all …]
/openbmc/linux/Documentation/timers/
H A D	no_hz.rst	12 There are three main ways of managing scheduling-clock interrupts 38 there are some situations where this old-school approach is still the 40 that use short bursts of CPU, where there are very frequent idle 43 clock interrupts will normally be delivered any way because there 68 If a CPU is idle, there is little point in sending it a scheduling-clock 84 unnecessary scheduling-clock interrupts. In these situations, there 98 There is also a boot parameter "nohz=" that can be used to disable 107 If a CPU has only one runnable task, there is little point in sending it 108 a scheduling-clock interrupt because there is no other task to switch to. 121 by one less than the number of CPUs. In these situations, there is [all …]
/openbmc/linux/arch/mips/vdso/
H A D	vgettimeofday.c	`23 * This is behind the ifdef so that we don't provide the symbol when there's no 24 * possibility of there being a usable clocksource, because there's nothing we 59 * This is behind the ifdef so that we don't provide the symbol when there's no 60 * possibility of there being a usable clocksource, because there's nothing we`
/openbmc/linux/Documentation/process/
H A D	6.Followthrough.rst	13 It is a rare patch which is so good at its first posting that there is no 40 people remember who wrote kernel code, but there is little lasting fame 101 but there are times when somebody simply has to make a decision. If you 118 things. In particular, there may be more than one tree - one, perhaps, 122 For patches applying to areas for which there is no obvious subsystem tree 131 there's a good chance that you will get more comments from a new set of 151 To begin with, the visibility of your patch has increased yet again. There 153 the patch before. It may be tempting to ignore them, since there is no 162 where there are testers, there will be bug reports. 173 After any regressions have been dealt with, there may be other, ordinary [all …]
H A D	3.Early-stage.rst	44 There are a number of very good Linux kernel developers, but they 87 - There may be elements of the proposed solution which will not be 131 the MAINTAINERS file for a relevant place to post. If there is a suitable 132 subsystem list, posting there is often preferable to posting on 138 and not all subsystems are represented there. The person listed in the 140 that role currently. So, when there is doubt about who to contact, a 158 list of people to Cc for your patches. There are a number of options 178 matter is (1) kernel developers tend to be busy, (2) there is no shortage 186 not assume that it means there is no interest in the project. 187 Unfortunately, you also cannot assume that there are no problems with your [all …]
/openbmc/linux/Documentation/livepatch/
H A D	livepatch.rst	15 There are many situations where users are reluctant to reboot a system. It may 26 There are multiple mechanisms in the Linux kernel that are directly related 46 a live patch is called with the help of a custom ftrace handler. But there are 53 Functions are there for a reason. They take some input parameters, get or 64 But there are more complex fixes. For example, a patch might change 80 switching combined with kpatch's stack trace switching. There are also 119 (Note there's not yet such an approach for kthreads.) 142 There's also a /proc/<pid>/patch_state file which can be used to 150 actually delivered (there is no data in signal pending structures). Tasks are 155 /sys/kernel/livepatch/<patch>/force attribute. Writing 1 there clears [all …]
/openbmc/linux/include/net/netfilter/
H A D	nf_tproxy.h	46 * redirect the new connection to the proxy if there's a listener 51 * Returns the listener socket if there's one, the TIME_WAIT socket if 63 * - match: if there's a fully established connection matching the 68 * - match: if there's a listening socket matching the redirection 71 * address. The reasoning is that if there's an explicit rule, it 76 * Please note that there's an overlap between what a TPROXY target 105 * redirect the new connection to the proxy if there's a listener 110 * Returns the listener socket if there's one, the TIME_WAIT socket if
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A D	uncore-power.json	14 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 22 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 30 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 38 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 46 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 54 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 62 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 70 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 78 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 86 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… [all …]
/openbmc/u-boot/include/dm/
H A D	uclass.h	24 * There may be drivers for on-chip SoC GPIO banks, I2C GPIO expanders and 122 * @ucp: Returns pointer to uclass (there is only one per ID) 150 * @devp: Returns pointer to device (there is only one per for each ID) 173 * If an active device has this sequence it will be returned. If there is no 181 * @devp: Returns pointer to device (there is only one for each seq) 196 * @devp: Returns pointer to device (there is only one for each node) 212 * @devp: Returns pointer to device (there is only one for each node) 227 * @devp: Returns pointer to device (there is only one for each node) 228 * @return 0 if OK, -ENODEV if there is no device match the phandle, other 244 * @devp: Returns pointer to device (there is only one for each node) [all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	uncore-power.json	14 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 22 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 30 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 38 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 46 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 54 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 62 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 70 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 78 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 86 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… [all …]
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/
H A D	tlb.json	`4 …there are multiple misses in the TLB that are resolved by the refill, then this event only counts … 8 …there are multiple misses in the TLB that are resolved by the refill, then this event only counts … 36 …there are multiple misses in the TLB that are resolved by the refill, then this event only counts … 40 …there are multiple misses in the TLB that are resolved by the refill, then this event only counts …`
/openbmc/linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
H A D	tlb.json	`4 …there are multiple misses in the TLB that are resolved by the refill, then this event only counts … 8 …there are multiple misses in the TLB that are resolved by the refill, then this event only counts … 36 …there are multiple misses in the TLB that are resolved by the refill, then this event only counts … 40 …there are multiple misses in the TLB that are resolved by the refill, then this event only counts …`
/openbmc/linux/Documentation/networking/device_drivers/ethernet/toshiba/
H A D	spider_net.rst	28 There are three primary states that a descriptor can be in: "empty", 46 marks it full, and advances the GDACTDPA by one. Thus, when there is 55 and advance the tail pointer. Thus, when there is flowing RX traffic, 67 then mark the descr as "empty", ready to receive data. Thus, when there 117 the hardware can fill them, there is no problem. If, for some reason, 136 and is filling the next descrs. Since the OS doesn't see this, there 157 marked xa... which is "empty". Thus, from the OS point of view, there 158 is nothing to be done. In particular, there is the implicit assumption 168 and there can be no forward progress; the OS thinks there's nothing 177 operations there. Since this will leave "holes" in the ring, there [all …]
/openbmc/linux/fs/xfs/scrub/
H A D	reap.c	53 * blocks on disk. The rmap data can tell us if there are multiple owners, so 54 * if the rmapbt says there is an owner of this block other than @oinfo, then 57 * If there is one rmap record, we can free the block, which removes the 63 * If there are no rmap records at all, we also free the block. If the btree 64 * being rebuilt lives in the free space (bnobt/cntbt/rmapbt) then there isn't 65 * supposed to be a rmap record and everything is ok. For other btrees there 67 * so if it's gone now there's something wrong and the fs will shut down. 69 * Note: If there are multiple rmap records with only the same rmap owner as 72 * and therefore doesn't need disposal. If there are multiple rmap records 112 /* Make sure there's space on the freelist. */ in xreap_put_freelist() [all …]
/openbmc/u-boot/doc/
H A D	README.sched	`16 - There are NO primitives for thread synchronization (locking, 27 - There are NO priorities, and the scheduling policy is round-robin 30 - There are NO capabilities to collect thread CPU usage, scheduler 47 - There NOT enough safety checks as are probably in the other 50 - There is no parent-child relationship between threads. Only one`
/openbmc/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A D	uncore-power.json	14 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 22 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 30 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 38 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 46 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 54 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 62 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 70 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 78 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… 86 …"PublicDescription": "Number of cycles spent performing core C state transitions. There is one ev… [all …]
/openbmc/linux/Documentation/gpu/amdgpu/display/
H A D	dc-debug.rst	`28 configuration changes or a full update occurs there will be a colored bar at 33 * Pipe split can be observed if there are two bars with a difference in height 41 * There should not be any visual corruption 42 * There should not be any underflow or screen flashes 43 * There should not be any black screens 44 * There should not be any cursor corruption`
/openbmc/linux/Documentation/filesystems/
H A D	debugfs.rst	14 there. The debugfs filesystem is also intended to not serve as a stable 15 ABI to user space; in theory, there are no stability constraints placed on 16 files exported there. The real world is not always so simple, though [1]_; 103 architectures, though, complicating the situation somewhat. There are 112 Similarly, there are helpers for variables of type unsigned long, in decimal 153 can be used to export binary information, but there does not appear to be 200 There is a helper function to create a device-related seq_file:: 212 There are a couple of other directory-oriented helper functions:: 228 There is one important thing that all debugfs users must take into account: 229 there is no automatic cleanup of any directories created in debugfs. If a [all …]
/openbmc/linux/Documentation/powerpc/
H A D	pci_iov_resource_on_powernv.rst	28 There is thus, in HW, a table of PE states that contains a pair of "frozen" 33 return all 1's value. MSIs are also blocked. There's a bit more state that 66 bridge being triggered. There's a PE# in the interrupt controller 75 from the CPU address space to the PCI address space. There is one M32 92 need to ensure Linux doesn't assign anything there, the M32 logic 115 address on the PowerBus). There is a way to also set the top 14 120 has 256 segments; however, there is no table for mapping a segment 124 there's a defined ordering for which window applies. 145 than one segment, we end up with more than one PE#. There is a HW 186 There are several strategies for isolating VFs in PEs: [all …]
/openbmc/linux/Documentation/userspace-api/media/rc/
H A D	rc-protos.rst	32 This IR protocol uses manchester encoding to encode 14 bits. There is a 77 There is a variant of rc5 called either rc5x or extended rc5 78 where there the second stop bit is the 6th command bit, but inverted. 81 done to keep it compatible with plain rc-5 where there are two start bits. 191 The sony protocol is a pulse-width encoding. There are three variants, 218 The sony protocol is a pulse-width encoding. There are three variants, 245 The sony protocol is a pulse-width encoding. There are three variants, 356 The scancode is the exact 16 bits as in the protocol. There is also a 365 as in the protocol. There is also a toggle bit. 373 as in the protocol. There is also a toggle bit. [all …]

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