| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | nvidia,tegra-pinmux-common.yaml | 39 or groups. See the Tegra TRM and various pinmux spreadsheets for complete
54 Tegra TRM to determine which are valid for each pin or group.
87 values depends on the pingroup. See "CAL_DRVDN" in the Tegra TRM.
92 values depends on the pingroup. See "CAL_DRVUP" in the Tegra TRM.
107 power. See "Low Power Mode" or "LPMD1" and "LPMD0" in the Tegra TRM.
169 valid values depends on the pingroup. See "DRVDN_SLWR" in the Tegra TRM.
174 valid values depends on the pingroup. See "DRVUP_SLWF" in the Tegra TRM.
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | nvidia,tegra124-dfll.txt | 40 - nvidia,droop-ctrl: See the register CL_DVFS_DROOP_CTRL in the TRM.
41 - nvidia,force-mode: See the field DFLL_PARAMS_FORCE_MODE in the TRM.
42 - nvidia,cf: Numeric value, see the field DFLL_PARAMS_CF_PARAM in the TRM.
43 - nvidia,ci: Numeric value, see the field DFLL_PARAMS_CI_PARAM in the TRM.
44 - nvidia,cg: Numeric value, see the field DFLL_PARAMS_CG_PARAM in the TRM.
47 - nvidia,cg-scale: Boolean value, see the field DFLL_PARAMS_CG_SCALE in the TRM.
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| /openbmc/linux/Documentation/translations/zh_CN/video4linux/ |
| H A D | omap3isp.txt | 221 大多数域的解释可以在 OMAP 的 TRM 中找到。以下两个域对于以上所有的
222 私有 IOCTL 配置都很常见，由于他们没有在 TRM 中提及，故需要对其有
257 OMAP 3430 TRM:
261 OMAP 35xx TRM:
264 OMAP 3630 TRM:
268 DM 3730 TRM:
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| /openbmc/linux/drivers/bus/ |
| H A D | omap-ocp2scp.c | 48 * As per AM572x TRM: http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf in omap_ocp2scp_probe()
50 * As per OMAP4430 TRM: http://www.ti.com/lit/ug/swpu231ap/swpu231ap.pdf in omap_ocp2scp_probe()
52 * As per OMAP4460 TRM: http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf in omap_ocp2scp_probe()
54 * As per OMAP543x TRM http://www.ti.com/lit/pdf/swpu249 in omap_ocp2scp_probe()
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| /openbmc/linux/Documentation/admin-guide/media/ |
| H A D | omap3isp.rst | 74 OMAP 3430 TRM:
78 OMAP 35xx TRM:
81 OMAP 3630 TRM:
85 DM 3730 TRM:
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | rst-rk3588.c | 31 RK3588_CRU_RESET_OFFSET(SRST_CSIPHY0, 1, 7), // missing in TRM
33 RK3588_CRU_RESET_OFFSET(SRST_CSIPHY1, 1, 9), // missing in TRM
51 RK3588_CRU_RESET_OFFSET(SRST_DCPHY0, 3, 11), // missing in TRM
56 RK3588_CRU_RESET_OFFSET(SRST_DCPHY1, 4, 0), // missing in TRM
701 RK3588_CRU_RESET_OFFSET(SRST_HDPTX0_ROPLL, 72, 12), // missing in TRM
702 RK3588_CRU_RESET_OFFSET(SRST_HDPTX0_LCPLL, 72, 13), // missing in TRM
703 RK3588_CRU_RESET_OFFSET(SRST_HDPTX0, 72, 14), // missing in TRM
704 RK3588_CRU_RESET_OFFSET(SRST_HDPTX1_ROPLL, 72, 15), // missing in TRM
707 RK3588_CRU_RESET_OFFSET(SRST_HDPTX1_LCPLL, 73, 0), // missing in TRM
708 RK3588_CRU_RESET_OFFSET(SRST_HDPTX1, 73, 1), // missing in TRM
[all …]
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| /openbmc/linux/Documentation/admin-guide/perf/ |
| H A D | arm-cmn.rst | 25 Most events are specified in a format based directly on the TRM
45 (as defined in the "Node ID Mapping" section of the TRM).
59 "wp_exclusive" are specified per the TRM definitions for dtm_wp_config0.
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| /openbmc/qemu/include/hw/dma/ |
| H A D | pl080.h | 15 * The PL080 TRM is:
17 * and the PL081 TRM is:
|
| /openbmc/linux/drivers/pinctrl/ti/ |
| H A D | pinctrl-ti-iodelay.c | 34 * @signature_mask: CONFIG_REG mask for the signature bits (see TRM)
35 * @signature_value: CONFIG_REG signature value to be written (see TRM)
36 * @lock_mask: CONFIG_REG mask for the lock bits (see TRM)
37 * @lock_val: CONFIG_REG lock value for the lock bits (see TRM)
38 * @unlock_val:CONFIG_REG unlock value for the lock bits (see TRM)
39 * @binary_data_coarse_mask: CONFIG_REG coarse mask (see TRM)
40 * @binary_data_fine_mask: CONFIG_REG fine mask (see TRM)
89 * struct ti_iodelay_reg_values - Computed io_reg configuration values (see TRM)
200 * Update the configuration register as per TRM and lockup once done.
201 * *IMPORTANT NOTE* SoC TRM does recommend doing iodelay programmation only
|
| /openbmc/linux/drivers/phy/ti/ |
| H A D | phy-dm816x-usb.c | 21 * TRM has two sets of USB_CTRL registers.. The correct register bits
22 * are in TRM section 24.9.8.2 USB_CTRL Register. The TRM documents the
29 * according to the TRM. It's possible that USBPHY_CTRL is more generic,
|
| H A D | phy-ti-pipe3.c | 215 /* DRA75x TRM Table 26-17 Preferred USB3_PHY_RX SCP Register Settings */
241 /* DRA75x TRM Table 26-9 Preferred SATA_PHY_RX SCP Register Settings */
251 .dig_hs_rate = 0, /* Not in TRM preferred settings */
252 .dig_ovrd_hs_rate = 0, /* Not in TRM preferred settings */
266 /* DRA75x TRM Table 26-62 Preferred PCIe_PHY_RX SCP Register Settings */
505 * as recommended in AM572x TRM SPRUHZ6, section 18.5.2.2, table in ti_pipe3_init()
|
| /openbmc/linux/drivers/firmware/ |
| H A D | ti_sci.h | 789 * For detailed information on the settings, see the UDMAP section of the TRM.
836 * For detailed information on the settings, see the UDMAP section of the TRM.
937 * section of the TRM for restrictions regarding this parameter.
1158 * section of the TRM for more information on this setting. Valid values for
1171 * See the UDMAP section of the TRM for more information on this setting.
1176 * See the UDMAP section of the TRM for more information on this setting.
1181 * See the UDMAP section of the TRM for more information on this setting.
1186 * See the UDMAP section of the TRM for more information on this setting.
1191 * the UDMAP section of the TRM for more information on this setting.
1196 * the UDMAP section of the TRM for more information on this setting.
[all …]
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| /openbmc/linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | arm,pl35x-smc.yaml | 17 The TRM is available here:
119 # According to TRM, really should be 3 clocks
|
| /openbmc/linux/drivers/thermal/ti-soc-thermal/ |
| H A D | omap4xxx-bandgap.h | 57 * ADC conversion table limits. Ignore values outside the TRM listed
58 * range to avoid bogus thermal shutdowns. See omap4430 TRM chapter
|
| /openbmc/linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap3-gta04a5one.dts | 21 /* data lines, gpmc_d0..d7 not muxable according to TRM */
33 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
|
| H A D | am3517.dtsi | 33 * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx
180 /* Table Table 5-79 of the TRM shows 480ab000 is reserved */
|
| /openbmc/linux/arch/arm/mach-omap2/ |
| H A D | omap_hwmod_81xx_data.c | 25 * Common alwon .clkctrl_offs from dm814x TRM "Table 2-278. CM_ALWON REGISTERS"
26 * also dm816x TRM 18.7.17 CM_ALWON device register values minus 0x1400.
95 * TRM 18.7.6 CM_DEFAULT device register values minus 0x500
124 * L4 standard peripherals, see TRM table 1-12 for devices using this.
125 * See TRM table 1-73 for devices using the 125MHz SYSCLK6 clock.
135 * L4 high-speed peripherals. For devices using this, please see the TRM
136 * table 1-13. On dm816x, only EMAC, MDIO and SATA use this. See also TRM
|
| H A D | prm2xxx_3xxx.h | 183 * check TRM if you are unsure
219 * 2420 TRM sometimes uses "EN_WAKEUP" instead of "EN_WKUP"
|
| /openbmc/u-boot/drivers/i2c/ |
| H A D | omap24xx_i2c.h | 103 * In TRM, the value of 12MHz is used.
119 * In TRM
|
| /openbmc/u-boot/board/ti/omap5_uevm/ |
| H A D | README | 14 'mmc bootbus' to set the required rate (see TRM) and 'mmc partconfig' to
|
| /openbmc/linux/drivers/clk/ti/ |
| H A D | dpll44xx.c | 21 * defined in OMAP4430/60 Public TRM section 3.6.3.3.2 "Enable Control,
87 * Public TRM section 3.6.3.3.2 "Enable Control, Status, and Low-Power
|
| /openbmc/qemu/include/hw/ssi/ |
| H A D | pl022.h | 14 * The PL022 TRM is:
|
| /openbmc/u-boot/board/ti/dra7xx/ |
| H A D | README | 14 'mmc bootbus' to set the required rate (see TRM) and 'mmc partconfig' to
|
| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | twl4030-audio.txt | 19 -ti,offset_cncl_path: Offset cancellation path selection, refer to TRM for the
|
| /openbmc/linux/Documentation/devicetree/bindings/dma/ |
| H A D | nvidia,tegra20-apbdma.txt | 16 select value for the peripheral. For more details, consult the Tegra TRM's
|