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/openbmc/linux/drivers/clocksource/
H A Dtimer-ti-dm.c33 #include <clocksource/timer-ti-dm.h>
36 * timer errata flags
40 * timer counter register is never read. For more details please refer to
159 * dmtimer_read - read timer registers in posted and non-posted mode
160 * @timer: timer pointer over which read operation to perform
167 static inline u32 dmtimer_read(struct dmtimer *timer, u32 reg) in dmtimer_read() argument
175 if (wp && timer->posted) in dmtimer_read()
176 while (readl_relaxed(timer->pend) & wp) in dmtimer_read()
179 return readl_relaxed(timer->func_base + offset); in dmtimer_read()
183 * dmtimer_write - write timer registers in posted and non-posted mode
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H A Dtimer-zevio.c3 * linux/drivers/clocksource/zevio-timer.c
64 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_set_event() local
67 writel(delta, timer->timer1 + IO_CURRENT_VAL); in zevio_timer_set_event()
69 timer->timer1 + IO_CONTROL); in zevio_timer_set_event()
76 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_shutdown() local
79 /* Disable timer interrupts */ in zevio_timer_shutdown()
80 writel(0, timer->interrupt_regs + IO_INTR_MSK); in zevio_timer_shutdown()
81 writel(TIMER_INTR_ALL, timer->interrupt_regs + IO_INTR_ACK); in zevio_timer_shutdown()
82 /* Stop timer */ in zevio_timer_shutdown()
83 writel(CNTL_STOP_TIMER, timer->timer1 + IO_CONTROL); in zevio_timer_shutdown()
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H A DKconfig36 bool "BCM2835 timer driver" if COMPILE_TEST
39 Enables the support for the BCM2835 timer driver.
42 bool "BCM mobile timer driver" if COMPILE_TEST
45 Enables the support for the BCM Kona mobile timer driver.
48 bool "Texas Instruments DaVinci timer driver" if COMPILE_TEST
50 Enables the support for the TI DaVinci timer driver.
53 bool "Digicolor timer driver" if COMPILE_TEST
57 Enables the support for the digicolor timer driver.
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
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H A DMakefile2 obj-$(CONFIG_TIMER_OF) += timer-of.o
3 obj-$(CONFIG_TIMER_PROBE) += timer-probe.o
4 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
5 obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o
6 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += timer-atmel-tcb.o
9 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += timer-cs5535.o
18 obj-$(CONFIG_DAVINCI_TIMER) += timer-davinci.o
19 obj-$(CONFIG_DIGICOLOR_TIMER) += timer-digicolor.o
20 obj-$(CONFIG_OMAP_DM_TIMER) += timer-ti-dm.o
21 obj-$(CONFIG_OMAP_DM_SYSTIMER) += timer-ti-dm-systimer.o
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H A Dtimer-microchip-pit64b.c3 * 64-bit Periodic Interval Timer driver
38 #define MCHP_PIT64B_TLSBR 0x20 /* Timer LSB Register */
40 #define MCHP_PIT64B_TMSBR 0x24 /* Timer MSB Register */
51 * struct mchp_pit64b_timer - PIT64B timer data structure
66 * @timer: PIT64B timer
70 struct mchp_pit64b_timer timer; member
80 * @timer: PIT64B timer
84 struct mchp_pit64b_timer timer; member
92 /* Base address for clocksource timer. */
94 /* Default cycles for clockevent timer. */
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H A Dtimer-rockchip.c3 * Rockchip timer support
44 struct rk_timer timer; member
52 return &container_of(ce, struct rk_clkevt, ce)->timer; in rk_timer()
55 static inline void rk_timer_disable(struct rk_timer *timer) in rk_timer_disable() argument
57 writel_relaxed(TIMER_DISABLE, timer->ctrl); in rk_timer_disable()
60 static inline void rk_timer_enable(struct rk_timer *timer, u32 flags) in rk_timer_enable() argument
62 writel_relaxed(TIMER_ENABLE | flags, timer->ctrl); in rk_timer_enable()
66 struct rk_timer *timer) in rk_timer_update_counter() argument
68 writel_relaxed(cycles, timer->base + TIMER_LOAD_COUNT0); in rk_timer_update_counter()
69 writel_relaxed(0, timer->base + TIMER_LOAD_COUNT1); in rk_timer_update_counter()
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H A Ddw_apb_timer.c49 static inline u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl() argument
51 return readl(timer->base + offs); in apbt_readl()
54 static inline void apbt_writel(struct dw_apb_timer *timer, u32 val, in apbt_writel() argument
57 writel(val, timer->base + offs); in apbt_writel()
60 static inline u32 apbt_readl_relaxed(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl_relaxed() argument
62 return readl_relaxed(timer->base + offs); in apbt_readl_relaxed()
65 static inline void apbt_writel_relaxed(struct dw_apb_timer *timer, u32 val, in apbt_writel_relaxed() argument
68 writel_relaxed(val, timer->base + offs); in apbt_writel_relaxed()
71 static void apbt_disable_int(struct dw_apb_timer *timer) in apbt_disable_int() argument
73 u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); in apbt_disable_int()
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/openbmc/u-boot/drivers/timer/
H A DKconfig1 menu "Timer Support"
3 config TIMER config
4 bool "Enable driver model for timer drivers"
7 Enable driver model for timer access. It uses the same API as
8 lib/time.c, but now implemented by the uclass. The first timer
9 will be used. The timer is usually a 32 bits free-running up
10 counter. There may be no real tick, and no timer interrupt.
13 bool "Enable driver model for timer drivers in SPL"
14 depends on TIMER && SPL
16 Enable support for timer drivers in SPL. These can be used to get
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/openbmc/linux/drivers/rtc/
H A Drtc-brcmstb-waketimer.c49 static inline bool brcmstb_waketmr_is_pending(struct brcmstb_waketmr *timer) in brcmstb_waketmr_is_pending() argument
53 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_is_pending()
57 static inline void brcmstb_waketmr_clear_alarm(struct brcmstb_waketmr *timer) in brcmstb_waketmr_clear_alarm() argument
61 if (timer->alarm_en && timer->alarm_irq) in brcmstb_waketmr_clear_alarm()
62 disable_irq(timer->alarm_irq); in brcmstb_waketmr_clear_alarm()
63 timer->alarm_en = false; in brcmstb_waketmr_clear_alarm()
64 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER); in brcmstb_waketmr_clear_alarm()
65 writel_relaxed(reg - 1, timer->base + BRCMSTB_WKTMR_ALARM); in brcmstb_waketmr_clear_alarm()
66 writel_relaxed(WKTMR_ALARM_EVENT, timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
67 (void)readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_clear_alarm()
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/openbmc/linux/include/linux/
H A Dhrtimer.h21 #include <linux/timer.h>
32 * HRTIMER_MODE_PINNED - Timer is bound to CPU (is only considered
33 * when starting the timer)
34 * HRTIMER_MODE_SOFT - Timer callback function will be executed in
36 * HRTIMER_MODE_HARD - Timer callback function will be executed in
66 HRTIMER_NORESTART, /* Timer is not restarted */
67 HRTIMER_RESTART, /* Timer must be restarted */
71 * Values to track state of the timer
78 * The callback state is not part of the timer->state because clearing it would
79 * mean touching the timer after the callback, this makes it impossible to free
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H A Dtimer.h40 * @TIMER_DEFERRABLE: A deferrable timer will work normally when the
42 * to service it; instead, the timer will be serviced when the CPU
43 * eventually wakes up with a subsequent non-deferrable timer.
45 * @TIMER_IRQSAFE: An irqsafe timer is executed with IRQ disabled and
53 * @TIMER_PINNED: A pinned timer will not be affected by any timer
55 * on which the timer was enqueued.
57 * Note: Because enqueuing of timers can migrate the timer from one
60 * function is invoked via mod_timer() or add_timer(). If the timer
89 * LOCKDEP and DEBUG timer interfaces.
91 void init_timer_key(struct timer_list *timer,
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/openbmc/linux/net/netfilter/
H A Dxt_IDLETIMER.c5 * Netfilter module to trigger a timer when packet matches.
6 * After timer expires a kevent will be sent.
20 #include <linux/timer.h>
35 struct timer_list timer; member
66 struct idletimer_tg *timer; in idletimer_tg_show() local
73 timer = __idletimer_tg_find_by_label(attr->attr.name); in idletimer_tg_show()
74 if (timer) { in idletimer_tg_show()
75 if (timer->timer_type & XT_IDLETIMER_ALARM) { in idletimer_tg_show()
76 ktime_t expires_alarm = alarm_expires_remaining(&timer->alarm); in idletimer_tg_show()
80 expires = timer->timer.expires; in idletimer_tg_show()
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/openbmc/linux/arch/s390/kernel/
H A Dvtime.c3 * Virtual cpu timer based timer functions.
38 u64 timer; in get_vtimer() local
40 asm volatile("stpt %0" : "=Q" (timer)); in get_vtimer()
41 return timer; in get_vtimer()
46 u64 timer; in set_vtimer() local
49 " stpt %0\n" /* Store current cpu timer value */ in set_vtimer()
51 : "=Q" (timer) : "Q" (expires)); in set_vtimer()
52 S390_lowcore.system_timer += S390_lowcore.last_update_timer - timer; in set_vtimer()
127 u64 timer, clock, user, guest, system, hardirq, softirq; in do_account_vtime() local
129 timer = S390_lowcore.last_update_timer; in do_account_vtime()
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/openbmc/linux/sound/core/
H A Dtimer.c17 #include <sound/timer.h>
37 MODULE_DESCRIPTION("ALSA timer interface");
45 MODULE_ALIAS("devname:snd/timer");
128 static int snd_timer_free(struct snd_timer *timer);
133 static void snd_timer_reschedule(struct snd_timer * timer, unsigned long ticks_left);
136 * create a timer instance with the given owner string.
172 * find a timer instance from the given timer id
176 struct snd_timer *timer; in snd_timer_find() local
178 list_for_each_entry(timer, &snd_timer_list, device_list) { in snd_timer_find()
179 if (timer->tmr_class != tid->dev_class) in snd_timer_find()
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/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dti,timer-dm.yaml4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#
7 title: TI dual-mode timer
13 The TI dual-mode timer is a general purpose timer with PWM capabilities.
20 - ti,am335x-timer
21 - ti,am335x-timer-1ms
22 - ti,am654-timer
23 - ti,dm814-timer
24 - ti,dm816-timer
25 - ti,omap2420-timer
26 - ti,omap3430-timer
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/openbmc/sdeventplus/src/sdeventplus/utility/
H A Dtimer.hpp23 /** @class Timer<Id>
24 * @brief A simple, repeating timer around an sd_event time source
25 * @details Adds a timer to the SdEvent loop that runs a user defined callback
26 * at specified intervals. If no interval is provided to the timer,
28 * timer tracks whether or not it has expired since creation or since
35 class Timer class
38 /** @brief Type used to represent a time duration for the timer
44 * timer elapses.
46 using Callback = fu2::unique_function<void(Timer<Id>&)>;
48 /** @brief Creates a new timer on the given event loop.
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/openbmc/linux/sound/isa/gus/
H A Dgus_timer.c14 * Timer 1 - 80us
17 static int snd_gf1_timer1_start(struct snd_timer * timer) in snd_gf1_timer1_start() argument
24 gus = snd_timer_chip(timer); in snd_gf1_timer1_start()
26 ticks = timer->sticks; in snd_gf1_timer1_start()
28 snd_gf1_write8(gus, SNDRV_GF1_GB_ADLIB_TIMER_1, 256 - ticks); /* timer 1 count */ in snd_gf1_timer1_start()
29 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* enable timer 1 IRQ */ in snd_gf1_timer1_start()
30 snd_gf1_adlib_write(gus, 0x04, tmp >> 2); /* timer 2 start */ in snd_gf1_timer1_start()
35 static int snd_gf1_timer1_stop(struct snd_timer * timer) in snd_gf1_timer1_stop() argument
41 gus = snd_timer_chip(timer); in snd_gf1_timer1_stop()
44 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, tmp); /* disable timer #1 */ in snd_gf1_timer1_stop()
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/openbmc/linux/kernel/time/
H A Dtimer.c16 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
58 #include <trace/events/timer.h>
65 * The timer wheel has LVL_DEPTH array levels. Each level provides an array of
72 * The array level of a newly armed timer depends on the relative expiry
76 * Contrary to the original timer wheel implementation, which aims for 'exact'
78 * the timers into the lower array levels. The previous 'classic' timer wheel
83 * This is an optimization of the original timer wheel implementation for the
84 * majority of the timer wheel use cases: timeouts. The vast majority of
318 * due to delays of the timer irq, long irq off times etc etc) then in round_jiffies_common()
501 static inline unsigned int timer_get_idx(struct timer_list *timer) in timer_get_idx() argument
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H A Dhrtimer.c9 * In contrast to the low-resolution timeout API, aka timer wheel,
16 * Based on the original timer wheel code
42 #include <linux/timer.h>
48 #include <trace/events/timer.h>
62 * The timer bases:
65 * into the timer bases by the hrtimer_base_type enum. When trying
136 * timer->base->cpu_base
155 * means that all timers which are tied to this base via timer->base are
161 * When the timer's base is locked, and the timer removed from list, it is
162 * possible to set timer->base = &migration_base and drop the lock: the timer
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/openbmc/linux/arch/nios2/kernel/
H A Dtime.c22 #define ALTR_TIMER_COMPATIBLE "altr,timer-1.0"
42 struct nios2_timer timer; member
47 struct nios2_timer timer; member
63 static u16 timer_readw(struct nios2_timer *timer, u32 offs) in timer_readw() argument
65 return readw(timer->base + offs); in timer_readw()
68 static void timer_writew(struct nios2_timer *timer, u16 val, u32 offs) in timer_writew() argument
70 writew(val, timer->base + offs); in timer_writew()
73 static inline unsigned long read_timersnapshot(struct nios2_timer *timer) in read_timersnapshot() argument
77 timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG); in read_timersnapshot()
78 count = timer_readw(timer, ALTERA_TIMER_SNAPH_REG) << 16 | in read_timersnapshot()
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/openbmc/sdeventplus/test/utility/
H A Dtimer.cpp6 #include <sdeventplus/utility/timer.hpp>
32 using TestTimer = Timer<testClock>;
63 std::unique_ptr<TestTimer> timer; member in sdeventplus::utility::__anon9ead1e020111::TimerTest
98 if (timer) in resetTimer()
100 timer.reset(); in resetTimer()
111 EXPECT_TRUE(timer->hasExpired()); in expireTimer()
112 EXPECT_EQ(interval, timer->getInterval()); in expireTimer()
135 // dynamically, without changing it inside the timer in SetUp()
151 timer = std::make_unique<TestTimer>(*event, runCallback, interval); in SetUp()
152 EXPECT_EQ(expected_event, timer->get_event().get()); in SetUp()
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/openbmc/qemu/include/qemu/
H A Dtimer.h56 * QEMU Timer attributes:
58 * An individual timer may be given one or multiple attributes when initialized.
139 * Determines whether a clock's default timer list
143 * the timer list. The return value may be outdated by the time it is acted
146 * Returns: true if the clock's default timer list
155 * Determines whether a clock's default timer list
156 * has an expired timer.
158 * Returns: true if the clock's default timer list has
159 * an expired timer
182 * @attr_mask: mask for the timer attributes that are included
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/openbmc/qemu/hw/sparc64/
H A Dsparc64.c31 #include "qemu/timer.h"
85 CPUTimer *timer = g_new0(CPUTimer, 1); in cpu_timer_create() local
87 timer->name = name; in cpu_timer_create()
88 timer->frequency = frequency; in cpu_timer_create()
89 timer->disabled_mask = disabled_mask; in cpu_timer_create()
90 timer->npt_mask = npt_mask; in cpu_timer_create()
92 timer->disabled = 1; in cpu_timer_create()
93 timer->npt = 1; in cpu_timer_create()
94 timer->clock_offset = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); in cpu_timer_create()
96 timer->qtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cb, cpu); in cpu_timer_create()
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/openbmc/linux/include/linux/mfd/
H A Drz-mtu3.h13 #define RZ_MTU3_TSTRA 0x080 /* Timer start register A */
14 #define RZ_MTU3_TSTRB 0x880 /* Timer start register B */
17 #define RZ_MTU3_TDDRA 0x016 /* Timer dead time data register A */
18 #define RZ_MTU3_TDDRB 0x816 /* Timer dead time data register B */
19 #define RZ_MTU3_TCDRA 0x014 /* Timer cycle data register A */
20 #define RZ_MTU3_TCDRB 0x814 /* Timer cycle data register B */
21 #define RZ_MTU3_TCBRA 0x022 /* Timer cycle buffer register A */
22 #define RZ_MTU3_TCBRB 0x822 /* Timer cycle buffer register B */
23 #define RZ_MTU3_TCNTSA 0x020 /* Timer subcounter A */
24 #define RZ_MTU3_TCNTSB 0x820 /* Timer subcounter B */
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/openbmc/sdbusplus/include/sdbusplus/
H A Dtimer.hpp12 /** @class Timer
15 class Timer class
18 /** @brief Only need the default Timer */
19 Timer() = delete;
20 Timer(const Timer&) = delete;
21 Timer& operator=(const Timer&) = delete;
22 Timer(Timer&&) = delete;
23 Timer& operator=(Timer&&) = delete;
25 /** @brief Constructs timer object
28 * @param[in] userCallBack - optional function callback for timer
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