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/openbmc/u-boot/drivers/timer/
H A Dmpc83xx_timer.c61 * mftbu() - Get value of TBU (upper time base) register
63 * Return: Value of the TBU register
190 u32 tbu, tbl; in mpc83xx_timer_get_count() local
194 * tbu, read tbu again, and compare it with the previously read tbu in mpc83xx_timer_get_count()
198 tbu = mftbu(); in mpc83xx_timer_get_count()
200 } while (tbu != mftbu()); in mpc83xx_timer_get_count()
202 *count = (tbu * 0x10000ULL) + tbl; in mpc83xx_timer_get_count()
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie.yaml471 - const: tbu # PCIe TBU clock
472 - const: ddrss_sf_tbu # PCIe SF TBU clock
503 - const: tbu # PCIe TBU clock
516 - const: tbu # PCIe TBU clock
548 - const: tbu # PCIe TBU clock
549 - const: ddrss_sf_tbu # PCIe SF TBU clock
562 - const: tbu # PCIe TBU clock
563 - const: ddrss_sf_tbu # PCIe SF TBU clock
590 - const: tbu # PCIe TBU clock
591 - const: ddrss_sf_tbu # PCIe SF TBU clock
[all …]
H A Dqcom,pcie-ep.yaml163 - description: PCIe DDRSS SF TBU clock
/openbmc/u-boot/arch/arm/cpu/armv7/vf610/
H A Dtimer.c43 gd->arch.tbu = 0; in timer_init()
52 /* increment tbu if tbl has rolled over */ in get_ticks()
54 gd->arch.tbu++; in get_ticks()
57 return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl; in get_ticks()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/armada100/
H A Dtimer.c47 /* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */
70 gd->arch.tbu += now - gd->arch.tbl; in get_timer_masked()
73 gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl; in get_timer_masked()
77 return gd->arch.tbu; in get_timer_masked()
121 /* init the gd->arch.tbu and gd->arch.tbl value */ in timer_init()
123 gd->arch.tbu = 0; in timer_init()
/openbmc/u-boot/arch/arm/cpu/armv7/
H A Darch_timer.c27 gd->arch.tbu = 0; in timer_init()
44 gd->arch.tbu = nowu; in get_ticks()
46 return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl; in get_ticks()
/openbmc/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-qcom-debug.c33 "Failed to read TBU power status: %d\n", ret); in qcom_smmu_tlb_sync_debug()
39 "Failed to read TBU sync/inv ack status: %d\n", ret); in qcom_smmu_tlb_sync_debug()
48 "TBU: power_status %#x sync_inv_ack %#x sync_inv_progress %#x\n", in qcom_smmu_tlb_sync_debug()
H A Dqcom_iommu.c795 clk = devm_clk_get_optional(dev, "tbu"); in qcom_iommu_device_probe()
797 dev_err(dev, "failed to get tbu clock\n"); in qcom_iommu_device_probe()
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dqcom,qcs404-cdsp-pil.yaml46 - description: TBU clock
57 - const: tbu
142 "tbu",
/openbmc/u-boot/arch/arm/mach-davinci/
H A Dtimer.c59 /* increment tbu if tbl has rolled over */ in get_ticks()
61 gd->arch.tbu++; in get_ticks()
64 return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl; in get_ticks()
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dtimer.c76 gd->arch.tbu = 0; in timer_init()
88 gd->arch.tbu = (unsigned long)(now >> 32); in get_ticks()
/openbmc/u-boot/arch/arm/mach-imx/
H A Dsyscounter.c76 gd->arch.tbu = 0; in timer_init()
89 gd->arch.tbu = (unsigned long)(now >> 32); in get_ticks()
/openbmc/u-boot/arch/arm/mach-at91/armv7/
H A Dtimer.c30 * two 32 bit registers called tbl and tbu.
/openbmc/u-boot/arch/arm/mach-at91/arm926ejs/
H A Dtimer.c27 * two 32 bit registers called tbl and tbu.
/openbmc/u-boot/arch/arm/include/asm/
H A Dglobal_data.h34 unsigned int tbu; member
/openbmc/linux/Documentation/devicetree/bindings/iommu/
H A Darm,smmu.yaml490 - description: SNoC MMU TBU RT GDSC
491 - description: SNoC MMU TBU NRT GDSC
562 /* always ignore appended 5-bit TBU number */
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,mdp5.yaml63 - const: tbu
/openbmc/u-boot/arch/arm/cpu/armv7m/
H A Dsystick-timer.c84 gd->arch.tbu = 0; in timer_init()
/openbmc/u-boot/lib/
H A Dtime.c107 /* increment tbu if tbl has rolled over */ in get_ticks()
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dtesla,fsd-clock.yaml93 - description: PERIC shared0 div3 TBU clock (from CMU_CMU)
/openbmc/qemu/target/ppc/
H A Dhelper_regs.c514 spr_register(env, SPR_TBU, "TBU", in register_generic_sprs()
525 spr_register_hv(env, SPR_WR_TBU, "TBU", in register_generic_sprs()
535 spr_register(env, SPR_WR_TBU, "TBU", in register_generic_sprs()
H A Dppc-qmp-cmds.c105 { "tbu", 0, &monitor_get_tbu, },
/openbmc/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_event.c89 /* LPU TBU errors*/ in evt_str()
/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dsoc.c45 gd->arch.tbu = 0; in timer_init()
/openbmc/linux/arch/powerpc/kernel/
H A Dasm-offsets.c665 OFFSET(VCPU_TIMING_EXIT_TBU, kvm_vcpu, arch.timing_exit.tv32.tbu); in main()
667 OFFSET(VCPU_TIMING_LAST_ENTER_TBU, kvm_vcpu, arch.timing_last_enter.tv32.tbu); in main()

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