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/openbmc/linux/arch/x86/include/asm/fpu/
H A Dxstate.h52 /* All currently supported supervisor features */
57 * A supervisor state component may not always contain valuable information,
58 * and its size may be huge. Saving/restoring such supervisor state components
60 * be avoided. Such supervisor state components should only be saved/restored
61 * on demand. The on-demand supervisor features are set in this mask.
63 * Unlike the existing supported supervisor features, an independent supervisor
65 * supervisor state component cannot be saved/restored at each context switch.
67 * To support an independent supervisor feature, a developer should follow the
69 * - Do dynamically allocate a buffer for the supervisor state component.
72 * - Don't set the bit corresponding to the independent supervisor feature in
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/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/
H A Dpython3-supervisor_4.2.5.bb1 SUMMARY = "Supervisor: A Process Control System"
3 Supervisor is a client/server system that allows its users \
6 HOMEPAGE = "https://github.com/Supervisor/supervisor"
12 PYPI_PACKAGE = "supervisor"
23 file://supervisor.service \
25 SYSTEMD_SERVICE:${PN} = "supervisor.service"
28 install -d ${D}${sysconfdir}/supervisor
31 install -m 0644 ${UNPACKDIR}/supervisord.conf ${D}${sysconfdir}/supervisor
32 install -m 0644 ${UNPACKDIR}/supervisor.service ${D}${systemd_system_unitdir}
H A Dpython3-meld3_2.0.1.bb1 SUMMARY = "meld3 templating system used by Supervisor"
7 HOMEPAGE = "https://github.com/supervisor/meld3"
/openbmc/linux/arch/m68k/ifpsp060/
H A Dos.S58 | or supervisor application space. The examples below use simple "move"
59 | instructions for supervisor mode applications and call _copyin()/_copyout()
76 | Writes to data memory while in supervisor mode.
79 | a0 - supervisor source address
82 | 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
89 btst #0x5,0x4(%a6) | check for supervisor state
107 | Reads from data/instruction memory while in supervisor mode.
111 | a1 - supervisor destination address
113 | 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode
122 btst #0x5,0x4(%a6) | check for supervisor state
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/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/python3-supervisor/
H A Dsupervisord.conf1 ; supervisor config file
4 file=/var/run/supervisor.sock ; (the path to the socket file)
15 [rpcinterface:supervisor]
16 supervisor.rpcinterface_factory = supervisor.rpcinterface:make_main_rpcinterface
19 serverurl=unix:///var/run/supervisor.sock ; use a unix:// URL for a unix socket
28 files = /etc/supervisor/conf.d/*.conf
H A Dsupervisor.service2 Description=Supervisor process control system for UNIX
7 ExecStart=/usr/bin/supervisord -n -c /etc/supervisor/supervisord.conf
9 ExecReload=/usr/bin/supervisorctl -c /etc/supervisor/supervisord.conf $OPTIONS reload
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Driscv,cpu-intc.txt10 The RISC-V supervisor ISA manual specifies three interrupt sources that are
14 controlled via Supervisor Binary Interface (SBI) calls and CSR reads. External
18 All RISC-V systems that conform to the supervisor ISA specification are
29 RISC-V supervisor ISA manual, with only the following three interrupts being
30 defined for supervisor mode:
31 - Source 1 is the supervisor software interrupt, which can be sent by an SBI
33 - Source 5 is the supervisor timer interrupt, which can be configured by
35 - Source 9 is the supervisor external interrupt, which chains to all other
/openbmc/linux/arch/m68k/fpsp040/
H A Dskeleton.S377 btst #0x5,%sp@ | supervisor bit set in saved SR?
387 | mem_write --- write to user or supervisor address space
389 | Writes to memory while in supervisor mode. copyout accomplishes
393 | a0 - supervisor source address
397 | The supervisor source address is guaranteed to point into the supervisor
404 | If the EXC_SR shows that the exception was from supervisor space,
406 | there shouldn't be any supervisor mode floating point exceptions.
410 btstb #5,EXC_SR(%a6) |check for supervisor state
427 | mem_read --- read from user or supervisor address space
429 | Reads from memory while in supervisor mode. copyin accomplishes
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/openbmc/linux/Documentation/devicetree/bindings/riscv/
H A Dextensions.yaml126 The standard Smaia supervisor-level extension for the advanced
133 The standard Ssaia supervisor-level extension for the advanced
134 interrupt architecture for supervisor-mode-visible csr and
140 The standard Sscofpmf supervisor-level extension for count overflow
146 The standard Sstc supervisor-level extension for time compare as
152 The standard Svinval supervisor-level extension for fine-grained
158 The standard Svnapot supervisor-level extensions for napot
164 The standard Svpbmt supervisor-level extensions for page-based
/openbmc/linux/arch/microblaze/include/asm/
H A Dmmu.h36 # define PP_RWXX 0 /* Supervisor read/write, User none */
37 # define PP_RWRX 1 /* Supervisor read/write, User read */
38 # define PP_RWRW 2 /* Supervisor read/write, User read/write */
39 # define PP_RXRX 3 /* Supervisor read, User read */
44 unsigned long ks:1; /* Supervisor 'key' (normally 0) */
/openbmc/linux/Documentation/hwmon/
H A Dsl28cpld.rst21 supervisor. In the future there might be other flavours and additional
24 The fan supervisor has a 7 bit counter register and a counter period of 1
25 second. If the 7 bit counter overflows, the supervisor will automatically
H A Dpli1209bc.rst8 * Digital Supervisor PLI1209BC
22 The Vicor PLI1209BC is an isolated digital power system supervisor that provides
/openbmc/linux/arch/riscv/include/asm/
H A Dcsr.h13 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
17 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
19 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */
288 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
292 /* Supervisor-Level Interrupts (AIA) */
296 /* Supervisor-Level High-Half CSRs (AIA) */
379 /* Virtual Interrupts for Supervisor Level (AIA) */
449 /* IE/IP (Supervisor/Machine Interrupt Enable/Pending) flags */
/openbmc/u-boot/arch/riscv/include/asm/
H A Dcsr.h14 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
16 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
17 #define SR_SUM _AC(0x00040000, UL) /* Supervisor access User Memory */
H A Dencoding.h146 typeof(_SUPERVISOR) (SUPERVISOR) = (_SUPERVISOR); \
147 ((STORE) ? ((SUPERVISOR) ? PTE_SW(PTE) : PTE_UW(PTE)) : \
148 (FETCH) ? ((SUPERVISOR) ? PTE_SX(PTE) : PTE_UX(PTE)) : \
149 ((SUPERVISOR) ? PTE_SR(PTE) : PTE_UR(PTE)))
/openbmc/linux/arch/powerpc/include/asm/book3s/32/
H A Dmmu-hash.h57 #define PP_RWXX 0 /* Supervisor read/write, User none */
58 #define PP_RWRX 1 /* Supervisor read/write, User read */
59 #define PP_RWRW 2 /* Supervisor read/write, User read/write */
60 #define PP_RXRX 3 /* Supervisor read, User read */
65 #define SR_KS 0x40000000 /* Supervisor key */
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h180 /* Virtual Interrupts for Supervisor Level (AIA) */
191 /* Supervisor Trap Setup */
197 /* Supervisor Configuration CSRs */
200 /* Supervisor state CSRs */
206 /* Supervisor Trap Handling */
213 /* Sstc supervisor CSRs */
217 /* Supervisor Protection and Translation */
221 /* Supervisor-Level Window to Indirectly Accessed Registers (AIA) */
225 /* Supervisor-Level Interrupts (AIA) */
229 /* Supervisor-Level High-Half CSRs (AIA) */
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/openbmc/qemu/target/sparc/
H A Dtranslate.c185 bool supervisor; member
301 #define supervisor(dc) 0 macro
306 #define supervisor(dc) (dc->supervisor | dc->hypervisor) macro
308 #define supervisor(dc) (dc->supervisor) macro
1553 } else if (supervisor(dc) in resolve_asi()
1565 case ASI_KERNELDATA: /* Supervisor data access */ in resolve_asi()
1573 case ASI_KERNELTXT: /* Supervisor text access */ in resolve_asi()
1610 if (!supervisor(dc) && asi < 0x80) { in resolve_asi()
2742 int mask = ((dc->def->features & CPU_FEATURE_HYPV) && supervisor(dc) in do_tcc()
2938 TRANS(RDSOFTINT, 64, do_rd_special, supervisor(dc), a->rd, do_rdsoftint)
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/openbmc/linux/arch/m68k/include/asm/
H A Dmcfdma.h89 #define MCFDMA_DMR_DSTT_SD 0x00001400L /* Destination is supervisor data */
90 #define MCFDMA_DMR_DSTT_SC 0x00001800L /* Destination is supervisor code */
101 #define MCFDMA_DMR_SRCT_SD 0x00000014L /* Source is supervisor data */
102 #define MCFDMA_DMR_SRCT_SC 0x00000018L /* Source is supervisor code */
H A Dm54xxacr.h36 #define ACR_SUPER 0x00002000 /* Supervisor mode only */
43 #define ACR_SP 0x00000008 /* Supervisor protect */
96 * cacheable and supervisor access only.
/openbmc/linux/arch/sparc/include/asm/
H A Dpcr.h20 #define PCR_STRACE 0x00000002 /* Trace supervisor events */
39 #define PCR_N4_STRACE 0x00000008 /* Trace supervisor events */
/openbmc/linux/Documentation/riscv/
H A Duabi.rst29 #. Standard supervisor-level extensions (starting with 'S') will be listed
30 after standard unprivileged extensions. If multiple supervisor-level
/openbmc/linux/arch/x86/kernel/fpu/
H A Dsignal.c319 * Restore supervisor states: previous context switch etc has done in restore_fpregs_from_user()
320 * XSAVES and saved the supervisor states in the kernel buffer from in restore_fpregs_from_user()
379 * If supervisor states are available then save the in __fpu_restore_sig()
381 * supervisor state is preserved. Save the full state for in __fpu_restore_sig()
383 * saving the supervisor states and then shuffle them to in __fpu_restore_sig()
429 * Preserve supervisor states! in __fpu_restore_sig()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dmmu.h37 #define PP_RWXX 0 /* Supervisor read/write, User none */
38 #define PP_RWRX 1 /* Supervisor read/write, User read */
39 #define PP_RWRW 2 /* Supervisor read/write, User read/write */
40 #define PP_RXRX 3 /* Supervisor read, User read */
45 unsigned long ks:1; /* Supervisor 'key' (normally 0) */
59 unsigned long ks:1; /* Supervisor key (normally 0) */
72 unsigned long vs:1; /* Supervisor valid */
/openbmc/linux/drivers/reset/
H A Dreset-tps380x.c3 * TI TPS380x Supply Voltage Supervisor and Reset Controller Driver
125 MODULE_DESCRIPTION("TI TPS380x Supply Voltage Supervisor and Reset Driver");

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