Home
last modified time | relevance | path

Searched full:soft (Results 1 – 25 of 369) sorted by relevance

12345678910>>...15

/openbmc/qemu/tests/fp/
H A Dfp-test-log2.c25 static void compare(ufloat64 test, ufloat64 real, ufloat64 soft, bool exact) in compare() argument
30 if (real.i == soft.i) { in compare()
33 msb = 63 - __builtin_clzll(real.i ^ soft.i); in compare()
36 if (real.i > soft.i) { in compare()
37 ulp = real.i - soft.i; in compare()
39 ulp = soft.i - real.i; in compare()
51 test.i, test.d, soft.i, soft.d, real.i, real.d); in compare()
57 (int)(soft.i >> 52) - (int)(real.i >> 52)); in compare()
69 ufloat64 test, real, soft; in main() local
79 soft.i = float64_log2(test.i, &qsf); in main()
[all …]
/openbmc/openbmc/poky/meta/conf/machine/include/microblaze/
H A Dfeature-microblaze-math.inc7 TUNEVALID[fpu-soft] = "Software FPU"
11 TUNECONFLICTS[fpu-soft] = "fpu-hard fpu-hard-extended"
12 TUNECONFLICTS[fpu-hard] = "fpu-soft"
13 TUNECONFLICTS[fpu-hard-extended] = "fpu-soft"
16 …any('TUNE_FEATURES', ['multiply-low', 'multiply-high'], ' -mno-xl-soft-mul', ' -mxl-soft-mul', d)}"
19 …= "${@bb.utils.contains('TUNE_FEATURES', 'divide-hard', ' -mno-xl-soft-div', ' -mxl-soft-div', d)}"
21 TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'fpu-soft', '', '', d)}"
25 # Set target fpu (bitbake known target) to soft or hard (basic or extended)
26 …{@bb.utils.contains_any('TUNE_FEATURES', 'fpu-hard fpu-hard-extended', 'fpu-hard', 'fpu-soft', d)}"
/openbmc/openbmc/poky/meta/conf/machine/include/powerpc/
H A Darch-powerpc.inc3 # *) Hard/Soft Floating Point
24 TUNEVALID[fpu-soft] = "Use software FPU."
25 TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'fpu-soft', ' -msoft-float', '', d)}"
26 TARGET_FPU .= "${@bb.utils.contains('TUNE_FEATURES', 'fpu-soft', 'soft', '', d)}"
34 TUNE_FEATURES:tune-powerpc-nf = "m32 fpu-soft bigendian"
44 TUNE_FEATURES:tune-powerpcle-nf = "m32 fpu-soft"
/openbmc/u-boot/drivers/misc/
H A Dfsl_sec_mon.c53 * If initial state is Trusted, Secure or Soft-Fail, then first set in set_sec_mon_state_non_sec()
54 * the Software Security Violation Bit and transition to Soft-Fail in set_sec_mon_state_non_sec()
60 printf("SEC_MON state transitioning to Soft Fail.\n"); in set_sec_mon_state_non_sec()
63 /* polling loop till SEC_MON is in Soft-Fail state */ in set_sec_mon_state_non_sec()
83 * If SSM Soft Fail to Non-Secure State Transition in set_sec_mon_state_non_sec()
124 printf("SEC_MON state transitioning to Soft Fail.\n"); in set_sec_mon_state_soft_fail()
127 /* polling loop till SEC_MON is in Soft-Fail state */ in set_sec_mon_state_soft_fail()
/openbmc/openbmc/poky/meta/recipes-core/images/build-appliance-image/
H A DYocto_Build_Appliance.vmx40 powerType.powerOff = "soft"
41 powerType.powerOn = "soft"
42 powerType.suspend = "soft"
43 powerType.reset = "soft"
/openbmc/openbmc-test-automation/systest/
H A Dhtx_softbootme_test.robot33 Soft Bootme Test
34 [Documentation] Using HTX exerciser soft boot option.
40 # Set up the (soft) bootme iteration (loop) counter.
44 Repeat Keyword ${HTX_LOOP} times Run HTX Soft Bootme Exerciser
50 Run HTX Soft Bootme Exerciser
51 [Documentation] Run HTX Soft Bootme Exerciser.
56 # - Soft bootme (OS Reboot).
83 Run Soft Bootme ${BOOTME_PERIOD}
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dsoft-spi.txt1 Soft SPI
3 The soft SPI bus implementation allows the use of GPIO pins to simulate a
7 The soft SPI node requires the following properties:
27 soft-spi {
/openbmc/openbmc/poky/meta/classes-recipe/
H A Dlinuxloader.bbclass15 …SPKGSFX_BYTE}${MIPSPKGSFX_R6}${MIPSPKGSFX_ENDIAN}${@['', '-sf'][d.getVar('TARGET_FPU') == 'soft']}"
17 ldso_arch = "powerpc${@['', '-sf'][d.getVar('TARGET_FPU') == 'soft']}"
29 ldso_arch = "riscv64${@['', '-sf'][d.getVar('TARGET_FPU') == 'soft']}"
31 ldso_arch = "riscv32${@['', '-sf'][d.getVar('TARGET_FPU') == 'soft']}"
64 …loader = "${base_libdir}/ld-linux-riscv64-lp64${@['d', ''][d.getVar('TARGET_FPU') == 'soft']}.so.1"
66 …oader = "${base_libdir}/ld-linux-riscv32-ilp32${@['d', ''][d.getVar('TARGET_FPU') == 'soft']}.so.1"
/openbmc/pldm/softoff/
H A Dsoftoff.hpp35 * trigger the host soft off,so the pldm-softpoweroff will exit.
49 /** @brief Is the host soft off completed.
90 /** @brief When host soft off completed, stop the timer and
139 /** @brief Failed to send host soft off command flag.
143 /** @brief Host soft off completed flag.
155 * When the host soft off is complete, it sends an platform event message
H A Dsoftoff.cpp117 … "PLDM remote terminus soft off. Can't get current remote terminus state, error - {ERROR}", in getHostState()
146 "Failure to STOP the timer of PLDM soft off, response code '{RC}'", in hostSoftOffComplete()
150 // This marks the completion of pldm soft power off. in hostSoftOffComplete()
263 error("Failed to get state sensor PDR during soft-off, error - {ERROR}", in getSensorInfo()
322 …"PLDM soft off failed, can't get the response for the PLDM request msg. Time out! Exit the pldm-so… in hostSoftOff()
351 "Failed to receive pldm data during soft-off, response code '{RC}'", in hostSoftOff()
393 …"Failure to start remote terminus soft off wait timer, Exit the pldm-softpoweroff with response co… in hostSoftOff()
400 … "Timer started waiting for remote terminus soft off, timeout in sec '{TIMEOUT_SEC}'", in hostSoftOff()
418 // Time out or soft off complete in hostSoftOff()
429 "Failed to process request while remote terminus soft off, error - {ERROR}", in hostSoftOff()
H A Dmain.cpp44 … "Failure in sending soft off request to the remote terminus. Exiting pldm-softpoweroff app"); in main()
53 "ERROR! Waiting for the host soft off timeout. Exit the pldm-softpoweroff"); in main()
/openbmc/phosphor-host-ipmid/xyz/openbmc_project/Ipmi/Internal/
H A DSoftPowerOff.interface.yaml2 Implement the Soft Power Off function. On receiving the SMS_ATTN from BMC,
22 Possible response types from Host for a Soft Power Off function.
30 needs to do a Soft Power Off.
/openbmc/phosphor-fan-presence/docs/monitor/
H A Dpower_off_config.md12 - `type` - ["hard", "soft", "epow"]
14 - "soft" - Perform an orderly shutdown requesting that the host OS power off
27 ### "hard" & "soft" `type` power offs
67 "type": "soft",
/openbmc/openbmc-test-automation/data/boot_lists/
H A DPower_off11 IPMI Power Soft
12 IPMI Power Soft (mfg)
/openbmc/u-boot/arch/x86/cpu/intel_common/
H A Dcpu.c96 /* Set flex ratio in soft reset data register bits 11:6 */ in cpu_set_flex_ratio_to_tdp_nominal()
100 debug("CPU: Soft reset to set up flex ratio\n"); in cpu_set_flex_ratio_to_tdp_nominal()
102 /* Set soft reset control to use register value */ in cpu_set_flex_ratio_to_tdp_nominal()
105 /* Issue warm reset, will be "CPU only" due to soft reset data */ in cpu_set_flex_ratio_to_tdp_nominal()
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Sensor/Threshold/
H A DSoftShutdown.interface.yaml2 Implement to provide soft shutdown class sensor thresholds. Objects
28 The upper bound of the soft shutdown threshold. A value of 'NaN' is
34 The lower bound of the soft shutdown threshold. A value of 'NaN' is
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Control/Power/
H A DCapLimits.interface.yaml25 Minimum supported soft user PowerCap setting. The min soft user
/openbmc/phosphor-fan-presence/sensor-monitor/
H A Dtypes.hpp15 * @brief The enum to represent a hard or soft shutdown
20 soft enumerator
/openbmc/x86-power-control/
H A Dmeson.options20 'ignore-soft-resets-during-post',
23 description: 'Ignore soft resets from host during POST',
/openbmc/u-boot/board/xilinx/microblaze-generic/
H A Dconfig.mk11 CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul
12 CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div
/openbmc/u-boot/drivers/usb/gadget/
H A Dbcm_udc_otg_phy.c26 /* clear Soft Disconnect */ in otg_phy_init()
45 /* Soft Disconnect */ in otg_phy_off()
/openbmc/u-boot/drivers/sysreset/
H A DKconfig27 bool "Enable support for Microblaze soft reset"
30 This is soft reset on Microblaze which does jump to 0x0 address.
/openbmc/openpower-proc-control/
H A Dnmi_interface.hpp16 * @brief Implementation of NMI (Soft Reset)
34 /* @brief trigger stop followed by soft reset.
/openbmc/qemu/target/riscv/
H A Dfpu_helper.c28 int soft = get_float_exception_flags(&env->fp_status); in riscv_cpu_get_fflags() local
31 hard |= (soft & float_flag_inexact) ? FPEXC_NX : 0; in riscv_cpu_get_fflags()
32 hard |= (soft & float_flag_underflow) ? FPEXC_UF : 0; in riscv_cpu_get_fflags()
33 hard |= (soft & float_flag_overflow) ? FPEXC_OF : 0; in riscv_cpu_get_fflags()
34 hard |= (soft & float_flag_divbyzero) ? FPEXC_DZ : 0; in riscv_cpu_get_fflags()
35 hard |= (soft & float_flag_invalid) ? FPEXC_NV : 0; in riscv_cpu_get_fflags()
42 int soft = 0; in riscv_cpu_set_fflags() local
44 soft |= (hard & FPEXC_NX) ? float_flag_inexact : 0; in riscv_cpu_set_fflags()
45 soft |= (hard & FPEXC_UF) ? float_flag_underflow : 0; in riscv_cpu_set_fflags()
46 soft |= (hard & FPEXC_OF) ? float_flag_overflow : 0; in riscv_cpu_set_fflags()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-hi3798cv200/
H A Dhi3798cv200.h26 /* USB2 CTRL0 clock and soft reset */
40 /* USB2 PHY clock and soft reset */

12345678910>>...15