| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | mvebu-core-clock.txt | 4 reading the Sample-At-Reset (SAR) register. The core clock consumer should
8 0 = tclk (Internal Bus clock)
15 0 = tclk (Internal Bus clock)
21 0 = tclk (Internal Bus clock)
27 0 = tclk (Internal Bus clock)
30 3 = hclk (SDRAM Controller Internal Clock)
35 0 = tclk (Internal Bus clock)
41 0 = tclk (Internal Bus clock)
47 0 = tclk (Internal Bus clock)
52 - compatible : shall be one of the following:
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| /openbmc/linux/sound/soc/meson/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 in the Amlogic Meson8, Meson8b and GX SoC families
26 embedded in the Amlogic AXG SoC family
33 embedded in the Amlogic AXG SoC family
50 in the Amlogic AXG SoC family
58 in the Amlogic AXG SoC family
74 Select Y or M to add support for the AXG SoC sound card
83 in the Amlogic AXG SoC family
90 in the Amlogic AXG SoC family
98 in the Amlogic AXG SoC family
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| /openbmc/linux/drivers/pci/controller/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
15 3700 SoC.
45 system-on-chips, like the Apple M1. This is required for the USB
46 type-A ports, Ethernet, Wi-Fi, and Bluetooth.
102 bool "Cavium Thunder PCIe controller to off-chip devices"
110 bool "Cavium Thunder ECAM controller to on-chip devices on pass-1.x silicon"
115 Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs.
149 in the Intel IXP4xx XScale-based network processor SoC.
185 is used on 32-bit Marvell ARM SoCs: Dove, Kirkwood, Armada 370,
205 multi-function devices.
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| /openbmc/linux/drivers/net/mdio/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
18 This internal symbol is used for link time dependencies and it
20 loadable module or built-in.
54 interface units of the Allwinner SoC that have an EMAC (A10,
58 tristate "APM X-Gene SoC MDIO bus controller"
62 APM X-Gene SoC's.
71 controllers found in the ASPEED AST2600 SoC. This is a driver for the
72 third revision of the ASPEED MDIO register interface - the first two
94 Broadcom iProc SoC's.
109 tristate "GPIO lib-based bitbanged MDIO buses"
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| /openbmc/linux/include/uapi/linux/ |
| H A D | serial_core.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
34 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
35 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
36 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
37 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
39 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
46 #define PORT_RT2880 29 /* Ralink RT2880 internal UART */
87 /* Atmel AT91 SoC */
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| /openbmc/linux/Documentation/gpu/amdgpu/ |
| H A D | driver-core.rst | 15 Those end up getting lumped into the common stuff in the soc files.
16 The soc files (e.g., vi.c, soc15.c nv.c) contain code for aspects of
17 the SoC itself rather than specific IPs. E.g., things like GPU resets
18 and register access functions are SoC dependent.
32 This was a dedicated IP on older pre-vega chips, but has since
48 This handles security policy for the SoC and executes trusted
53 SoC. The driver interacts with it to control power management
58 It is described in more details in :ref:`Display Core <amdgpu-display-core>`.
61 This is a multi-purpose DMA engine. The kernel driver uses it for
69 largest block on the GPU. The 3D pipeline has tons of sub-blocks. In
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| /openbmc/u-boot/doc/mvebu/ |
| H A D | armada-8k-memory.txt | 1 Memory Layout on Armada-8k SoC's
4 The below desribes the physical memory layout for Marvell's Armada-8k SoC's.
6 This assumes that the SoC includes Dual CP configuration, in case the flavor is using
7 a single CP configuration, then all secondary-CP mappings are invalid.
12 --------------------------------------------------------------------------
15 0xF0000000 0xF0FFFFFF AP Internal registers space
19 0xF2000000 0xF3FFFFFF CP-0 Internal (configuration) registers
22 0xF4000000 0xF5FFFFFF CP-1 Internal (configuration) registers
25 0xF6000000 0xF6FFFFFF CP-0 / PCIe#0 Memory space.
27 0xF7000000 0xF7FFFFFF CP-0 / PCIe#1 Memory space.
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| /openbmc/linux/drivers/net/phy/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
35 Adds support for a set of LED trigger events per-PHY. Link
39 logical-or of all the link speed ones.
61 Currently tested with mpc866ads and mpc8349e-mitx.
77 tristate "Amlogic Meson GXL Internal PHY"
81 Currently has a driver for the Amlogic Meson GXL Internal PHY
88 - ADIN1200 - Robust,Industrial, Low Power 10/100 Ethernet PHY
89 - ADIN1300 - Robust,Industrial, Low Latency 10/100/1000 Gigabit
97 - ADIN1100 - Robust,Industrial, Low Power 10BASE-T1L Ethernet PHY
107 Currently supports the Asix Electronics PHY found in the X-Surf 100
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| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-davinci.txt | 4 Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
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| /openbmc/linux/sound/soc/uniphier/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
7 UniPhier SoC audio interfaces. You will also need to select the
43 tristate "UniPhier SoC internal audio codec"
47 This adds Codec driver for Socionext UniPhier LD11/20 SoC
48 internal DAC. This driver supports Line In / Out and HeadPhone.
|
| /openbmc/linux/Documentation/sound/soc/ |
| H A D | overview.rst | 2 ALSA SoC Layer Overview
6 provide better ALSA support for embedded system-on-chip processors (e.g.
8 subsystem there was some support in the kernel for SoC audio, however it
9 had some limitations:-
11 * Codec drivers were often tightly coupled to the underlying SoC
12 CPU. This is not ideal and leads to code duplication - for example,
13 Linux had different wm8731 drivers for 4 different SoC platforms.
18 machine specific code to re-route audio, enable amps, etc., after such an
31 features :-
36 * Easy I2S/PCM audio interface setup between codec and SoC. Each SoC
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| /openbmc/linux/Documentation/power/ |
| H A D | opp.rst | 5 (C) 2009-2010 Nishanth Menon <nm@ti.com>, Texas Instruments Incorporated
20 -------------------------------------------------
22 Complex SoCs of today consists of a multiple sub-modules working in conjunction.
23 In an operational system executing varied use cases, not all modules in the SoC
25 facilitate this, sub-modules in a SoC are grouped into domains, allowing some
41 - {300000000, 1000000}
42 - {800000000, 1200000}
43 - {1000000000, 1300000}
46 ----------------------------------------
57 (users) -> registers a set of default OPPs -> (library)
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | qcom-emac.txt | 4 internal PHY. Each device is represented by a device tree node. A phandle
5 connects the MAC node to its corresponding internal phy node. Another
11 - compatible : Should be "qcom,fsm9900-emac".
12 - reg : Offset and length of the register regions for the device
13 - interrupts : Interrupt number used by this controller
14 - mac-address : The 6-byte MAC address. If present, it is the default
16 - internal-phy : phandle to the internal PHY node
17 - phy-handle : phandle to the external PHY node
19 Internal PHY node:
20 - compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".
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|
| H A D | fsl-fman.txt | 5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
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|
| H A D | motorcomm,yt8xxx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Sae <frank.sae@motor-comm.com>
13 - $ref: ethernet-phy.yaml#
18 - ethernet-phy-id4f51.e91a
19 - ethernet-phy-id4f51.e91b
21 rx-internal-delay-ps:
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
30 tx-internal-delay-ps:
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| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | 8xxx_gpio.txt | 3 This is for the non-QE/CPM/GUTs GPIO controllers as found on
6 Every GPIO controller node must have #gpio-cells property defined,
7 this information will be used to translate gpio-specifiers.
11 The GPIO module usually is connected to the SoC's internal interrupt
12 controller, see bindings/interrupt-controller/interrupts.txt (the
17 the SoC's internal interrupt controller). See the interrupt controller
18 nodes section in bindings/interrupt-controller/interrupts.txt for
22 - compatible: "fsl,<chip>-gpio" followed by "fsl,mpc8349-gpio"
23 for 83xx, "fsl,mpc8572-gpio" for 85xx, or
24 "fsl,mpc8610-gpio" for 86xx.
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| /openbmc/linux/Documentation/devicetree/bindings/bus/ |
| H A D | mvebu-mbus.txt | 6 - compatible: Should be set to one of the following:
7 marvell,armada370-mbus
8 marvell,armadaxp-mbus
9 marvell,armada375-mbus
10 marvell,armada380-mbus
11 marvell,kirkwood-mbus
12 marvell,dove-mbus
13 marvell,orion5x-88f5281-mbus
14 marvell,orion5x-88f5182-mbus
15 marvell,orion5x-88f5181-mbus
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| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | brcm,iproc-gpio.txt | 5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
23 - reg:
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| /openbmc/linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | lantiq-gswip.txt | 6 - compatible : "lantiq,xrx200-gswip" for the embedded GSWIP in the
7 xRX200 SoC
8 "lantiq,xrx300-gswip" for the embedded GSWIP in the
9 xRX300 SoC
10 "lantiq,xrx330-gswip" for the embedded GSWIP in the
11 xRX330 SoC
12 - reg : memory range of the GSWIP core registers
21 - compatible : "lantiq,xrx200-mdio" for the MDIO bus inside the GSWIP
22 core of the xRX200 SoC and the PHYs connected to it.
29 - compatible : "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"
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| /openbmc/qemu/include/hw/arm/ |
| H A D | allwinner-a10.h | 4 #include "hw/timer/allwinner-a10-pit.h"
5 #include "hw/intc/allwinner-a10-pic.h"
7 #include "hw/sd/allwinner-sdhost.h"
8 #include "hw/ide/ahci-sysbus.h"
9 #include "hw/usb/hcd-ohci.h"
10 #include "hw/usb/hcd-ehci.h"
11 #include "hw/rtc/allwinner-rtc.h"
12 #include "hw/misc/allwinner-a10-ccm.h"
13 #include "hw/misc/allwinner-a10-dramc.h"
14 #include "hw/i2c/allwinner-i2c.h"
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| H A D | allwinner-h3.h | 21 * The Allwinner H3 is a System on Chip containing four ARM Cortex-A7
28 * https://linux-sunxi.org/File:Allwinner_H3_Datasheet_V1.2.pdf
32 * https://linux-sunxi.org/H3
39 #include "hw/timer/allwinner-a10-pit.h"
41 #include "hw/misc/allwinner-h3-ccu.h"
42 #include "hw/misc/allwinner-cpucfg.h"
43 #include "hw/misc/allwinner-h3-dramc.h"
44 #include "hw/misc/allwinner-h3-sysctrl.h"
45 #include "hw/misc/allwinner-sid.h"
46 #include "hw/sd/allwinner-sdhost.h"
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| H A D | allwinner-r40.h | 24 #include "hw/timer/allwinner-a10-pit.h"
25 #include "hw/ide/ahci-sysbus.h"
27 #include "hw/sd/allwinner-sdhost.h"
28 #include "hw/misc/allwinner-r40-ccu.h"
29 #include "hw/misc/allwinner-r40-dramc.h"
30 #include "hw/misc/allwinner-sramc.h"
31 #include "hw/i2c/allwinner-i2c.h"
33 #include "hw/net/allwinner-sun8i-emac.h"
34 #include "hw/usb/hcd-ohci.h"
35 #include "hw/usb/hcd-ehci.h"
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| /openbmc/linux/drivers/gpu/drm/bridge/cadence/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
11 Support Cadence DPI to DSI bridge. This is an internal
12 bridge and is meant to be directly embedded in a SoC.
33 Support Cadence DPI to DP bridge. This is an internal
34 bridge and is meant to be directly embedded in a SoC.
|
| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 signals) which connect directly to pins/pads on the SoC package. Each lane
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
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| /openbmc/linux/drivers/net/ethernet/marvell/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
29 in the Marvell Orion ARM SoC family.
52 interface units in the Marvell ARMADA XP and ARMADA 38x SoC
57 even for Armada 370 SoC, which doesn't support hardware
70 ARMADA 37xx SoC family.
118 This driver support the Marvell Yukon or SysKonnect SK-98xx/SK-95xx
126 Marvell 88E8001, Belkin F5D5005, CNet GigaCard, DLink DGE-530T,
127 Linksys EG1032/EG1064, 3Com 3C940/3C940B, SysKonnect SK-9871/9872.
140 The file /sys/kernel/debug/skge/ethX displays the state of the internal
151 an internal one. Disabling this option will save some memory
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|