186ce2bc7SHauke MehrtensLantiq GSWIP Ethernet switches 286ce2bc7SHauke Mehrtens================================== 386ce2bc7SHauke Mehrtens 486ce2bc7SHauke MehrtensRequired properties for GSWIP core: 586ce2bc7SHauke Mehrtens 686ce2bc7SHauke Mehrtens- compatible : "lantiq,xrx200-gswip" for the embedded GSWIP in the 786ce2bc7SHauke Mehrtens xRX200 SoC 8*ee83d824SAleksander Jan Bajkowski "lantiq,xrx300-gswip" for the embedded GSWIP in the 9*ee83d824SAleksander Jan Bajkowski xRX300 SoC 10*ee83d824SAleksander Jan Bajkowski "lantiq,xrx330-gswip" for the embedded GSWIP in the 11*ee83d824SAleksander Jan Bajkowski xRX330 SoC 1286ce2bc7SHauke Mehrtens- reg : memory range of the GSWIP core registers 1386ce2bc7SHauke Mehrtens : memory range of the GSWIP MDIO registers 1486ce2bc7SHauke Mehrtens : memory range of the GSWIP MII registers 1586ce2bc7SHauke Mehrtens 1686ce2bc7SHauke MehrtensSee Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of 1786ce2bc7SHauke Mehrtensadditional required and optional properties. 1886ce2bc7SHauke Mehrtens 1986ce2bc7SHauke Mehrtens 2086ce2bc7SHauke MehrtensRequired properties for MDIO bus: 2186ce2bc7SHauke Mehrtens- compatible : "lantiq,xrx200-mdio" for the MDIO bus inside the GSWIP 2286ce2bc7SHauke Mehrtens core of the xRX200 SoC and the PHYs connected to it. 2386ce2bc7SHauke Mehrtens 2486ce2bc7SHauke MehrtensSee Documentation/devicetree/bindings/net/mdio.txt for a list of additional 2586ce2bc7SHauke Mehrtensrequired and optional properties. 2686ce2bc7SHauke Mehrtens 2786ce2bc7SHauke Mehrtens 2886ce2bc7SHauke MehrtensRequired properties for GPHY firmware loading: 29e82b5fe5SHauke Mehrtens- compatible : "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw" 30e82b5fe5SHauke Mehrtens "lantiq,xrx300-gphy-fw", "lantiq,gphy-fw" 31e82b5fe5SHauke Mehrtens "lantiq,xrx330-gphy-fw", "lantiq,gphy-fw" 3286ce2bc7SHauke Mehrtens for the loading of the firmware into the embedded 3386ce2bc7SHauke Mehrtens GPHY core of the SoC. 3486ce2bc7SHauke Mehrtens- lantiq,rcu : reference to the rcu syscon 3586ce2bc7SHauke Mehrtens 3686ce2bc7SHauke MehrtensThe GPHY firmware loader has a list of GPHY entries, one for each 3786ce2bc7SHauke Mehrtensembedded GPHY 3886ce2bc7SHauke Mehrtens 3986ce2bc7SHauke Mehrtens- reg : Offset of the GPHY firmware register in the RCU 4086ce2bc7SHauke Mehrtens register range 4186ce2bc7SHauke Mehrtens- resets : list of resets of the embedded GPHY 4286ce2bc7SHauke Mehrtens- reset-names : list of names of the resets 4386ce2bc7SHauke Mehrtens 4486ce2bc7SHauke MehrtensExample: 4586ce2bc7SHauke Mehrtens 4686ce2bc7SHauke MehrtensEthernet switch on the VRX200 SoC: 4786ce2bc7SHauke Mehrtens 48e82b5fe5SHauke Mehrtensswitch@e108000 { 4986ce2bc7SHauke Mehrtens #address-cells = <1>; 5086ce2bc7SHauke Mehrtens #size-cells = <0>; 5186ce2bc7SHauke Mehrtens compatible = "lantiq,xrx200-gswip"; 52e82b5fe5SHauke Mehrtens reg = < 0xe108000 0x3100 /* switch */ 53e82b5fe5SHauke Mehrtens 0xe10b100 0xd8 /* mdio */ 54e82b5fe5SHauke Mehrtens 0xe10b1d8 0x130 /* mii */ 5586ce2bc7SHauke Mehrtens >; 5686ce2bc7SHauke Mehrtens dsa,member = <0 0>; 5786ce2bc7SHauke Mehrtens 5886ce2bc7SHauke Mehrtens ports { 5986ce2bc7SHauke Mehrtens #address-cells = <1>; 6086ce2bc7SHauke Mehrtens #size-cells = <0>; 6186ce2bc7SHauke Mehrtens 6286ce2bc7SHauke Mehrtens port@0 { 6386ce2bc7SHauke Mehrtens reg = <0>; 6486ce2bc7SHauke Mehrtens label = "lan3"; 6586ce2bc7SHauke Mehrtens phy-mode = "rgmii"; 6686ce2bc7SHauke Mehrtens phy-handle = <&phy0>; 6786ce2bc7SHauke Mehrtens }; 6886ce2bc7SHauke Mehrtens 6986ce2bc7SHauke Mehrtens port@1 { 7086ce2bc7SHauke Mehrtens reg = <1>; 7186ce2bc7SHauke Mehrtens label = "lan4"; 7286ce2bc7SHauke Mehrtens phy-mode = "rgmii"; 7386ce2bc7SHauke Mehrtens phy-handle = <&phy1>; 7486ce2bc7SHauke Mehrtens }; 7586ce2bc7SHauke Mehrtens 7686ce2bc7SHauke Mehrtens port@2 { 7786ce2bc7SHauke Mehrtens reg = <2>; 7886ce2bc7SHauke Mehrtens label = "lan2"; 7986ce2bc7SHauke Mehrtens phy-mode = "internal"; 8086ce2bc7SHauke Mehrtens phy-handle = <&phy11>; 8186ce2bc7SHauke Mehrtens }; 8286ce2bc7SHauke Mehrtens 8386ce2bc7SHauke Mehrtens port@4 { 8486ce2bc7SHauke Mehrtens reg = <4>; 8586ce2bc7SHauke Mehrtens label = "lan1"; 8686ce2bc7SHauke Mehrtens phy-mode = "internal"; 8786ce2bc7SHauke Mehrtens phy-handle = <&phy13>; 8886ce2bc7SHauke Mehrtens }; 8986ce2bc7SHauke Mehrtens 9086ce2bc7SHauke Mehrtens port@5 { 9186ce2bc7SHauke Mehrtens reg = <5>; 9286ce2bc7SHauke Mehrtens label = "wan"; 9386ce2bc7SHauke Mehrtens phy-mode = "rgmii"; 9486ce2bc7SHauke Mehrtens phy-handle = <&phy5>; 9586ce2bc7SHauke Mehrtens }; 9686ce2bc7SHauke Mehrtens 9786ce2bc7SHauke Mehrtens port@6 { 9886ce2bc7SHauke Mehrtens reg = <0x6>; 9986ce2bc7SHauke Mehrtens ethernet = <ð0>; 10086ce2bc7SHauke Mehrtens }; 10186ce2bc7SHauke Mehrtens }; 10286ce2bc7SHauke Mehrtens 103e82b5fe5SHauke Mehrtens mdio { 10486ce2bc7SHauke Mehrtens #address-cells = <1>; 10586ce2bc7SHauke Mehrtens #size-cells = <0>; 10686ce2bc7SHauke Mehrtens compatible = "lantiq,xrx200-mdio"; 10786ce2bc7SHauke Mehrtens reg = <0>; 10886ce2bc7SHauke Mehrtens 10986ce2bc7SHauke Mehrtens phy0: ethernet-phy@0 { 11086ce2bc7SHauke Mehrtens reg = <0x0>; 11186ce2bc7SHauke Mehrtens }; 11286ce2bc7SHauke Mehrtens phy1: ethernet-phy@1 { 11386ce2bc7SHauke Mehrtens reg = <0x1>; 11486ce2bc7SHauke Mehrtens }; 11586ce2bc7SHauke Mehrtens phy5: ethernet-phy@5 { 11686ce2bc7SHauke Mehrtens reg = <0x5>; 11786ce2bc7SHauke Mehrtens }; 11886ce2bc7SHauke Mehrtens phy11: ethernet-phy@11 { 11986ce2bc7SHauke Mehrtens reg = <0x11>; 12086ce2bc7SHauke Mehrtens }; 12186ce2bc7SHauke Mehrtens phy13: ethernet-phy@13 { 12286ce2bc7SHauke Mehrtens reg = <0x13>; 12386ce2bc7SHauke Mehrtens }; 12486ce2bc7SHauke Mehrtens }; 12586ce2bc7SHauke Mehrtens 12686ce2bc7SHauke Mehrtens gphy-fw { 12786ce2bc7SHauke Mehrtens compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw"; 12886ce2bc7SHauke Mehrtens lantiq,rcu = <&rcu0>; 129e82b5fe5SHauke Mehrtens #address-cells = <1>; 130e82b5fe5SHauke Mehrtens #size-cells = <0>; 13186ce2bc7SHauke Mehrtens 13286ce2bc7SHauke Mehrtens gphy@20 { 13386ce2bc7SHauke Mehrtens reg = <0x20>; 13486ce2bc7SHauke Mehrtens 13586ce2bc7SHauke Mehrtens resets = <&reset0 31 30>; 13686ce2bc7SHauke Mehrtens reset-names = "gphy"; 13786ce2bc7SHauke Mehrtens }; 13886ce2bc7SHauke Mehrtens 13986ce2bc7SHauke Mehrtens gphy@68 { 14086ce2bc7SHauke Mehrtens reg = <0x68>; 14186ce2bc7SHauke Mehrtens 14286ce2bc7SHauke Mehrtens resets = <&reset0 29 28>; 14386ce2bc7SHauke Mehrtens reset-names = "gphy"; 14486ce2bc7SHauke Mehrtens }; 14586ce2bc7SHauke Mehrtens }; 14686ce2bc7SHauke Mehrtens}; 147