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/openbmc/linux/drivers/memory/samsung/
H A Dexynos-srom.c6 // Exynos - SROM Controller support
17 #include "exynos-srom.h"
20 /* SROM side */
29 * struct exynos_srom_reg_dump: register dump of SROM Controller registers.
30 * @offset: srom register offset from the controller base address.
39 * struct exynos_srom: platform data for exynos srom controller driver.
41 * @reg_base: srom base address
67 static int exynos_srom_configure_bank(struct exynos_srom *srom, in exynos_srom_configure_bank() argument
78 if (of_property_read_bool(np, "samsung,srom-page-mode")) in exynos_srom_configure_bank()
80 if (of_property_read_u32_array(np, "samsung,srom-timing", timing, in exynos_srom_configure_bank()
[all …]
H A DKconfig25 bool "Exynos SROM controller driver" if COMPILE_TEST
28 This adds driver for Samsung Exynos SoC SROM controller. The driver
29 in basic operation mode only saves and restores SROM registers
H A DMakefile3 obj-$(CONFIG_EXYNOS_SROM) += exynos-srom.o
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dexynos-srom.yaml4 $id: http://devicetree.org/schemas/memory-controllers/exynos-srom.yaml#
7 title: Samsung Exynos SoC SROM Controller driver
13 The SROM controller can be used to attach external peripherals. In this case
19 - const: samsung,exynos4210-srom
46 of the relevant SROM bank.
61 samsung,srom-page-mode:
67 samsung,srom-timing:
86 - samsung,srom-timing
98 compatible = "samsung,exynos4210-srom";
112 compatible = "samsung,exynos4210-srom";
[all …]
/openbmc/u-boot/arch/arm/cpu/armv7/s5p-common/
H A Dsromc.c14 * srom_bank - SROM
21 struct s5p_sromc *srom = in s5p_config_sromc() local
25 tmp = srom->bw; in s5p_config_sromc()
28 srom->bw = tmp; in s5p_config_sromc()
31 srom->bc[srom_bank] = srom_bc_conf; in s5p_config_sromc()
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410-smdk5410.dts88 srom_ctl: srom-ctl-pins {
95 srom_ebi: srom-ebi-pins {
127 samsung,srom-page-mode;
128 samsung,srom-timing = <9 12 1 9 1 1>;
H A Ds3c6410-smdk6410.dts45 srom-cs1-bus@18000000 {
/openbmc/linux/drivers/net/usb/
H A Dsr9800.h23 /* command : SROM Read Reg */
25 /* command : SROM Write Reg */
27 /* command : SROM Write Enable Reg */
29 /* command : SROM Write Disable Reg */
/openbmc/u-boot/drivers/net/
H A Duli526x.c65 /* CR9 definition: SROM/MII */
138 /* NIC SROM data */
139 unsigned char srom[128]; member
307 /* read 64 word srom data */ in uli526x_init_one()
309 ((u16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db->ioaddr, in uli526x_init_one()
313 if (((db->srom[0] == 0xff) && (db->srom[1] == 0xff)) || in uli526x_init_one()
314 ((db->srom[0] == 0x00) && (db->srom[1] == 0x00))) in uli526x_init_one()
315 /* SROM absent, so write MAC address to ID Table */ in uli526x_init_one()
317 else { /*Exist SROM*/ in uli526x_init_one()
319 dev->enetaddr[i] = db->srom[20 + i]; in uli526x_init_one()
[all …]
/openbmc/linux/drivers/net/ethernet/dec/tulip/
H A Ddmfe.c162 /* CR9 definition: SROM/MII */
263 /* NIC SROM data */
264 unsigned char srom[128]; member
472 /* read 64 word srom data */ in dmfe_init_one()
474 ((__le16 *) db->srom)[i] = in dmfe_init_one()
479 eth_hw_addr_set(dev, &db->srom[20]); in dmfe_init_one()
616 /* Parser SROM and media mode */ in dmfe_init_dm910x()
1898 * Parser SROM and media mode
1903 char * srom = db->srom; in dmfe_parse_srom() local
1911 /* Check SROM Version */ in dmfe_parse_srom()
[all …]
H A Duli526x.c90 /* CR9 definition: SROM/MII */
178 /* NIC SROM data */
179 unsigned char srom[128]; member
367 /* read 64 word srom data */ in uli526x_init_one()
369 ((__le16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db, i)); in uli526x_init_one()
372 …if(((u16 *) db->srom)[0] == 0xffff || ((u16 *) db->srom)[0] == 0) /* SROM absent, so read MAC add… in uli526x_init_one()
389 else /*Exist SROM*/ in uli526x_init_one()
392 addr[i] = db->srom[20 + i]; in uli526x_init_one()
532 /* Parser SROM and media mode */ in uli526x_init()
H A Deeprom.c21 /* The main routine to parse the very complicated SROM structure.
22 Search www.digital.com for "21X4 SROM" to get details.
96 * srom and can not be handled under the fixup routine. These cards
/openbmc/linux/drivers/staging/vt6655/
H A DMakefile11 srom.o \
/openbmc/openbmc/meta-hpe/meta-dl360poc/recipes-hpe/host/host-boot-enable/
H A Dhost-boot-enable.sh28 echo 0x1800008a > /sys/class/soc/srom/vromoff
/openbmc/openbmc/meta-hpe/meta-common/recipes-hpe/host/host-boot-enable/
H A Dhost-boot-enable.sh28 echo 0x1800008a > /sys/class/soc/srom/vromoff
/openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/
H A Dpinmux.h22 /* Flags for SROM controller */
H A Dsromc.h7 * (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX.
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dpinmux.h22 /* Flags for SROM controller */
H A Dsromc.h49 u8 bank; /* srom bank number */
/openbmc/linux/drivers/mtd/devices/
H A Dpmc551.c12 * cPCI embedded systems. The device contains a single SROM
26 * Due to what I assume is more buggy SROM, the 64M PMC551 I
63 * * Located a bug in the SROM's initialization sequence that
73 * * Add I2C handling of the SROM so we can read the SROM's information
708 * onboard I2C SROM to discover the "real" memory size. in init_pmc551()
/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_hal.h125 s8 antgain[2]; /* Ant gain for each band - from SROM */
138 /* Max power board can support (SROM) */
/openbmc/openbmc/meta-hpe/meta-dl360-g11/recipes-hpe/host/host-boot-enable/
H A Dhost-boot-enable.sh48 echo 0x1800008a > /sys/class/soc/srom/vromoff
/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Dpub.h170 u8 sromrev; /* version # of the srom */
171 char srom_ccode[BRCM_CNTRY_BUF_SZ]; /* Country Code in SROM */
172 u32 boardflags; /* Board specific flags from srom */
H A Dmain.h273 s8 antgain; /* antenna gain from srom */
325 u8 sromrev; /* version # of the srom */
327 u32 boardflags; /* Board specific flags from srom */
582 bool antsel_avail; /* Ant selection availability (SROM based) */
/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/include/
H A Dchipcommon.h145 /* SROM interface (corerev >= 32) */
253 #define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */

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