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/openbmc/u-boot/arch/arm/dts/
H A Dr8a7796-salvator-x-u-boot.dts31 sd-uhs-sdr104;
43 sd-uhs-sdr104;
H A Dr8a7795-salvator-x-u-boot.dts31 sd-uhs-sdr104;
43 sd-uhs-sdr104;
H A Dr8a77965-salvator-x-u-boot.dts31 sd-uhs-sdr104;
45 sd-uhs-sdr104;
H A Dr8a77990-ebisu-u-boot.dts152 sd-uhs-sdr104;
170 sd-uhs-sdr104;
H A Dr8a7795-h3ulcb-u-boot.dts38 sd-uhs-sdr104;
H A Dr8a7796-m3ulcb-u-boot.dts38 sd-uhs-sdr104;
H A Dam572x-idk.dts23 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
H A Dam57xx-beagle-x15-revc.dts22 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
H A Dam57xx-beagle-x15-revb1.dts22 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
H A Dam57xx-beagle-x15.dts28 /delete-property/ sd-uhs-sdr104;
H A Ddra72-evm.dts59 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dnvidia,tegra20-sdhci.yaml132 nvidia,pad-autocal-pull-down-offset-sdr104:
133 description: Specify drive strength calibration offsets for SDR104 mode.
157 refer to the reference manual of the SoC for correct values. The SDR104
167 nvidia,pad-autocal-pull-up-offset-sdr104:
168 description: Specify drive strength calibration offsets for SDR104 mode.
H A Dsdhci-st.txt54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
108 sd-uhs-sdr104;
H A Dsdhci-omap.txt19 "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104",
H A Dsdhci-sprd.txt36 - sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing.
60 sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>;
H A Dmmc-controller.yaml94 - for SD/SDIO cards the SDR104 mode has a max supported
155 sd-uhs-sdr104:
158 SD UHS SDR104 speed is supported.
H A Dsdhci-am654.yaml97 ti,otap-del-sel-sdr104:
98 description: Output tap delay for SD UHS SDR104 timing
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dums512-1h10.dts45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>;
49 sd-uhs-sdr104;
/openbmc/linux/drivers/mmc/host/
H A Drenesas_sdhi.h16 unsigned long clk_rate; /* clock rate for SDR104 */
17 u32 tap; /* sampling clock position for SDR104/HS400 (8 TAP) */
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-dhcom-pdk2.dts6 * DHCM-STM32MP157C-C065-R102-F0819-SPI-E2-CAN2-SDR104-RTC-WBT-T-DSI-I-01D2
H A Dstih410-b2120.dts40 sd-uhs-sdr104;
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420-klimt-wifi.dts74 sd-uhs-sdr104;
/openbmc/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs-polarberry.dts78 sd-uhs-sdr104;
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-edgeble-neu6b-io.dts70 sd-uhs-sdr104;
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1012a-rdb.dts29 sd-uhs-sdr104;

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