xref: /openbmc/u-boot/arch/arm/dts/dra72-evm.dts (revision 2dc5b553)
157cd681bSTom Rini/*
27aa1a408SLokesh Vutla * Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
357cd681bSTom Rini *
457cd681bSTom Rini * This program is free software; you can redistribute it and/or modify
557cd681bSTom Rini * it under the terms of the GNU General Public License version 2 as
657cd681bSTom Rini * published by the Free Software Foundation.
757cd681bSTom Rini */
87aa1a408SLokesh Vutla#include "dra72-evm-common.dtsi"
9*4ddaa6ceSLokesh Vutla#include "dra72x-mmc-iodelay.dtsi"
1057cd681bSTom Rini/ {
1157cd681bSTom Rini	model = "TI DRA722";
1257cd681bSTom Rini
137aa1a408SLokesh Vutla	memory@0 {
1457cd681bSTom Rini		device_type = "memory";
157aa1a408SLokesh Vutla		reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */
1657cd681bSTom Rini	};
17*4ddaa6ceSLokesh Vutla
18*4ddaa6ceSLokesh Vutla	evm_1v8_sw: fixedregulator-evm_1v8 {
19*4ddaa6ceSLokesh Vutla		compatible = "regulator-fixed";
20*4ddaa6ceSLokesh Vutla		regulator-name = "evm_1v8";
21*4ddaa6ceSLokesh Vutla		regulator-min-microvolt = <1800000>;
22*4ddaa6ceSLokesh Vutla		regulator-max-microvolt = <1800000>;
23*4ddaa6ceSLokesh Vutla		vin-supply = <&smps4_reg>;
24*4ddaa6ceSLokesh Vutla		regulator-always-on;
25*4ddaa6ceSLokesh Vutla		regulator-boot-on;
26*4ddaa6ceSLokesh Vutla	};
2757cd681bSTom Rini};
2857cd681bSTom Rini
297aa1a408SLokesh Vutla&i2c1 {
307aa1a408SLokesh Vutla	tps65917: tps65917@58 {
317aa1a408SLokesh Vutla		reg = <0x58>;
3257cd681bSTom Rini
337aa1a408SLokesh Vutla		interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>;  /* IRQ_SYS_1N */
347aa1a408SLokesh Vutla	};
3557cd681bSTom Rini};
3657cd681bSTom Rini
377aa1a408SLokesh Vutla#include "dra72-evm-tps65917.dtsi"
3857cd681bSTom Rini
3957cd681bSTom Rini&hdmi {
4057cd681bSTom Rini	vdda-supply = <&ldo3_reg>;
4157cd681bSTom Rini};
42e8131386SMugunthan V N
437aa1a408SLokesh Vutla&pcf_gpio_21 {
447aa1a408SLokesh Vutla	interrupt-parent = <&gpio6>;
457aa1a408SLokesh Vutla	interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
467aa1a408SLokesh Vutla};
477aa1a408SLokesh Vutla
48e8131386SMugunthan V N&mac {
497aa1a408SLokesh Vutla	slaves = <1>;
50e8131386SMugunthan V N	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
5157cd681bSTom Rini};
527aa1a408SLokesh Vutla
537aa1a408SLokesh Vutla&cpsw_emac0 {
547aa1a408SLokesh Vutla	phy_id = <&davinci_mdio>, <3>;
557aa1a408SLokesh Vutla	phy-mode = "rgmii";
567aa1a408SLokesh Vutla};
57*4ddaa6ceSLokesh Vutla
58*4ddaa6ceSLokesh Vutla&mmc1 {
59*4ddaa6ceSLokesh Vutla	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
60*4ddaa6ceSLokesh Vutla	pinctrl-0 = <&mmc1_pins_default>;
61*4ddaa6ceSLokesh Vutla	pinctrl-1 = <&mmc1_pins_hs>;
62*4ddaa6ceSLokesh Vutla	pinctrl-2 = <&mmc1_pins_sdr12>;
63*4ddaa6ceSLokesh Vutla	pinctrl-3 = <&mmc1_pins_sdr25>;
64*4ddaa6ceSLokesh Vutla	pinctrl-4 = <&mmc1_pins_sdr50>;
65*4ddaa6ceSLokesh Vutla	pinctrl-5 = <&mmc1_pins_ddr50_rev10>;
66*4ddaa6ceSLokesh Vutla	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev10_conf>;
67*4ddaa6ceSLokesh Vutla	vqmmc-supply = <&ldo1_reg>;
68*4ddaa6ceSLokesh Vutla};
69*4ddaa6ceSLokesh Vutla
70*4ddaa6ceSLokesh Vutla&mmc2 {
71*4ddaa6ceSLokesh Vutla	pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
72*4ddaa6ceSLokesh Vutla	pinctrl-0 = <&mmc2_pins_default>;
73*4ddaa6ceSLokesh Vutla	pinctrl-1 = <&mmc2_pins_hs>;
74*4ddaa6ceSLokesh Vutla	pinctrl-2 = <&mmc2_pins_ddr_rev10>;
75*4ddaa6ceSLokesh Vutla	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev10_conf>;
76*4ddaa6ceSLokesh Vutla	vmmc-supply = <&evm_1v8_sw>;
77*4ddaa6ceSLokesh Vutla};
78