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/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk322x.c226 case SCLK_SDMMC: in rockchip_mmc_get_clk()
304 case SCLK_SDMMC: in rockchip_mmc_set_clk()
360 case SCLK_SDMMC: in rk322x_clk_get_rate()
380 case SCLK_SDMMC: in rk322x_clk_set_rate()
H A Dclk_rk3188.c271 case SCLK_SDMMC: in rockchip_mmc_get_clk()
305 case SCLK_SDMMC: in rockchip_mmc_set_clk()
472 case SCLK_SDMMC: in rk3188_clk_get_rate()
514 case SCLK_SDMMC: in rk3188_clk_set_rate()
H A Dclk_rk3328.c446 case SCLK_SDMMC: in rk3328_mmc_get_clk()
474 case SCLK_SDMMC: in rk3328_mmc_set_clk()
562 case SCLK_SDMMC: in rk3328_clk_get_rate()
595 case SCLK_SDMMC: in rk3328_clk_set_rate()
H A Dclk_rk3288.c585 case SCLK_SDMMC: in rockchip_mmc_get_clk()
634 case SCLK_SDMMC: in rockchip_mmc_set_clk()
757 case SCLK_SDMMC: in rk3288_clk_get_rate()
807 case SCLK_SDMMC: in rk3288_clk_set_rate()
H A Dclk_rk3128.c294 case SCLK_SDMMC: in rockchip_mmc_get_clk()
333 case SCLK_SDMMC: in rockchip_mmc_set_clk()
H A Dclk_rk3399.c728 case SCLK_SDMMC: in rk3399_mmc_get_clk()
757 case SCLK_SDMMC: in rk3399_mmc_set_clk()
899 case SCLK_SDMMC: in rk3399_clk_get_rate()
968 case SCLK_SDMMC: in rk3399_clk_set_rate()
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c286 DIV(SCLK_SDMMC, "sclk_sdmmc", "sclk_sdmmc_src", 0,
299 MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3036_SDMMC_CON0, 1),
300 MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3036_SDMMC_CON1, 0),
H A Dclk-rk3128.c313 COMPOSITE(SCLK_SDMMC, "sclk_sdmmc", mux_mmc_src_p, 0,
535 MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3228_SDMMC_CON0, 1),
536 MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 0),
H A Dclk-rk3228.c382 COMPOSITE(SCLK_SDMMC, "sclk_sdmmc", mux_mmc_src_p, 0,
638 MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3228_SDMMC_CON0, 1),
639 MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3228_SDMMC_CON1, 0),
H A Dclk-rv1108.c715 COMPOSITE(SCLK_SDMMC, "sclk_sdmmc", mux_mmc_src_p, 0,
761 MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RV1108_SDMMC_CON0, 1),
762 MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RV1108_SDMMC_CON1, 1),
H A Dclk-rk3368.c546 COMPOSITE(SCLK_SDMMC, "sclk_sdmmc", mux_mmc_src_p, 0,
556 MMC(SCLK_SDMMC_DRV, "sdmmc_drv", "sclk_sdmmc", RK3368_SDMMC_CON0, 1),
557 MMC(SCLK_SDMMC_SAMPLE, "sdmmc_sample", "sclk_sdmmc", RK3368_SDMMC_CON1, 0),
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3036-cru.h19 #define SCLK_SDMMC 68 macro
H A Drk3128-cru.h18 #define SCLK_SDMMC 68 macro
H A Drk3228-cru.h19 #define SCLK_SDMMC 68 macro
H A Drk3188-cru-common.h28 #define SCLK_SDMMC 72 macro
H A Drv1108-cru.h19 #define SCLK_SDMMC 68 macro
H A Drk3368-cru.h33 #define SCLK_SDMMC 68 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3036-cru.h19 #define SCLK_SDMMC 68 macro
H A Drk3188-cru-common.h28 #define SCLK_SDMMC 72 macro
H A Drk3228-cru.h20 #define SCLK_SDMMC 68 macro
H A Drk3128-cru.h22 #define SCLK_SDMMC 68 macro
H A Drv1108-cru.h19 #define SCLK_SDMMC 68 macro
H A Dpx30-cru.h61 #define SCLK_SDMMC 59 macro
H A Drk3368-cru.h24 #define SCLK_SDMMC 68 macro
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Drockchip-dw-mshc.yaml116 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,

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