| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3368.c | 318 * or can be generated from internally by a divider from SCLK_MAC. in rk3368_gmac_set_clk()
506 case SCLK_MAC: in rk3368_clk_set_rate()
530 * the id is SCLK_MAC ("sclk_mac"), switch to the internal in rk3368_gmac_set_parent()
533 if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC)) { in rk3368_gmac_set_parent()
534 debug("%s: switching GAMC to SCLK_MAC\n", __func__); in rk3368_gmac_set_parent()
561 case SCLK_MAC: in rk3368_clk_set_parent()
572 case SCLK_MAC: in rk3368_clk_enable()
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| H A D | clk_rk322x.c | 245 * or can be generated from internally by a divider from SCLK_MAC. in rk322x_mac_set_clk()
387 case SCLK_MAC: in rk322x_clk_set_rate()
455 case SCLK_MAC: in rk322x_clk_set_parent()
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| H A D | clk_rk3399.c | 808 * or can be generated from internally by a divider from SCLK_MAC. in rk3399_gmac_set_clk()
972 case SCLK_MAC: in rk3399_clk_set_rate()
1023 * the id is SCLK_MAC ("clk_gmac"), switch to the internal clock. in rk3399_gmac_set_parent()
1025 if ((parent->dev == clk->dev) && (parent->id == SCLK_MAC)) { in rk3399_gmac_set_parent()
1026 debug("%s: switching RGMII to SCLK_MAC\n", __func__); in rk3399_gmac_set_parent()
1070 case SCLK_MAC: in rk3399_clk_enable()
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| H A D | clk_rk3288.c | 304 * or can be generated from internally by a divider from SCLK_MAC. in rockchip_mac_set_clk()
820 case SCLK_MAC: in rk3288_clk_set_rate()
933 case SCLK_MAC: in rk3288_clk_set_parent()
950 case SCLK_MAC: in rk3288_clk_enable()
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | rockchip-dwmac.yaml | 128 clocks = <&cru SCLK_MAC>,
136 assigned-clocks = <&cru SCLK_MAC>;
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| H A D | rockchip,emac.yaml | 98 clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3229-evb.dts | 53 assigned-clocks = <&cru SCLK_MAC_EXTCLK>, <&cru SCLK_MAC>;
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| H A D | rk3368-lion.dts | 73 assigned-clocks = <&cru SCLK_MAC>;
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 46 #define SCLK_MAC 151 macro
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| H A D | rk3128-cru.h | 46 #define SCLK_MAC 151 macro
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| H A D | rk3228-cru.h | 47 #define SCLK_MAC 126 macro
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| H A D | rk3188-cru-common.h | 24 #define SCLK_MAC 68 macro
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| H A D | rv1108-cru.h | 62 #define SCLK_MAC 112 macro
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| H A D | rk3368-cru.h | 83 #define SCLK_MAC 127 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 46 #define SCLK_MAC 151 macro
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| H A D | rk3188-cru-common.h | 24 #define SCLK_MAC 68 macro
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| H A D | rk3228-cru.h | 49 #define SCLK_MAC 126 macro
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| H A D | rk3128-cru.h | 47 #define SCLK_MAC 126 macro
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| H A D | rv1108-cru.h | 62 #define SCLK_MAC 112 macro
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| H A D | rk3368-cru.h | 73 #define SCLK_MAC 127 macro
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| H A D | rk3308-cru.h | 68 #define SCLK_MAC 64 macro
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rv1108.c | 753 MUX(SCLK_MAC, "sclk_mac", mux_sclk_mac_p, CLK_SET_RATE_PARENT,
755 GATE(SCLK_MAC_RX, "sclk_mac_rx", "sclk_mac", 0, RV1108_CLKGATE_CON(4), 8, GFLAGS),
756 GATE(SCLK_MAC_REF, "sclk_mac_ref", "sclk_mac", 0, RV1108_CLKGATE_CON(4), 6, GFLAGS),
757 GATE(SCLK_MAC_REFOUT, "sclk_mac_refout", "sclk_mac", 0, RV1108_CLKGATE_CON(4), 7, GFLAGS),
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| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3229-evb.dts | 149 assigned-clocks = <&cru SCLK_MAC_EXTCLK>, <&cru SCLK_MAC>;
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| H A D | rk3288-rock2-som.dtsi | 63 assigned-clocks = <&cru SCLK_MAC>;
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| /openbmc/linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3368-geekbox.dts | 97 assigned-clocks = <&cru SCLK_MAC>;
|