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/openbmc/linux/include/dt-bindings/clock/
H A Dr9a07g043-cpg.h32 #define R9A07G043_CA55_SCLK 0 /* RZ/G2UL Only */
33 #define R9A07G043_CA55_PCLK 1 /* RZ/G2UL Only */
34 #define R9A07G043_CA55_ATCLK 2 /* RZ/G2UL Only */
35 #define R9A07G043_CA55_GICCLK 3 /* RZ/G2UL Only */
36 #define R9A07G043_CA55_PERICLK 4 /* RZ/G2UL Only */
37 #define R9A07G043_CA55_ACLK 5 /* RZ/G2UL Only */
38 #define R9A07G043_CA55_TSCLK 6 /* RZ/G2UL Only */
39 #define R9A07G043_GIC600_GICCLK 7 /* RZ/G2UL Only */
40 #define R9A07G043_IA55_CLK 8 /* RZ/G2UL Only */
41 #define R9A07G043_IA55_PCLK 9 /* RZ/G2UL Only */
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/openbmc/qemu/tcg/mips/
H A Dtcg-target-con-set.h13 C_O0_I2(rZ, r)
14 C_O0_I2(rZ, rZ)
15 C_O0_I3(rZ, r, r)
16 C_O0_I3(rZ, rZ, r)
17 C_O0_I4(rZ, rZ, rZ, rZ)
18 C_O0_I4(rZ, rZ, r, r)
20 C_O1_I2(r, 0, rZ)
27 C_O1_I2(r, rZ, rN)
28 C_O1_I2(r, rZ, rZ)
29 C_O1_I4(r, rZ, rZ, rZ, 0)
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/openbmc/linux/drivers/soc/renesas/
H A DKconfig129 bool "ARM32 Platform support for RZ/A1H"
138 bool "ARM32 Platform support for RZ/A2"
145 bool "ARM32 Platform support for RZ/G1C"
151 bool "ARM32 Platform support for RZ/G1E"
157 bool "ARM32 Platform support for RZ/G1H"
164 bool "ARM32 Platform support for RZ/G1M"
170 bool "ARM32 Platform support for RZ/G1N"
176 bool "ARM32 Platform support for RZ/N1D"
277 bool "ARM64 Platform support for RZ/G2E"
281 This enables support for the Renesas RZ/G2E SoC.
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/openbmc/linux/Documentation/devicetree/bindings/soc/renesas/
H A Drenesas.yaml23 - description: RZ/A1H (R7S72100)
31 - description: RZ/A2 (R7S9210)
34 - renesas,rza2mevb # RZ/A2M Eval Board (RTK7921053S00000BE)
55 - description: RZ/G1H (R8A77420)
58 # iWave Systems RZ/G1H Qseven System On Module (iW-RainboW-G21M-Qseven)
64 # iWave Systems RZ/G1H Qseven Development Platform (iW-RainboW-G21D-Qseven)
69 - description: RZ/G1M (R8A77430)
72 # iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
79 # iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
84 - description: RZ/G1N (R8A77440)
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/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Drenesas,wdt.yaml18 - renesas,r7s72100-wdt # RZ/A1
19 - renesas,r7s9210-wdt # RZ/A2
20 - const: renesas,rza-wdt # RZ/A
24 - renesas,r9a06g032-wdt # RZ/N1D
25 - const: renesas,rzn1-wdt # RZ/N1
29 - renesas,r9a07g043-wdt # RZ/G2UL and RZ/Five
30 - renesas,r9a07g044-wdt # RZ/G2{L,LC}
31 - renesas,r9a07g054-wdt # RZ/V2L
36 - renesas,r9a09g011-wdt # RZ/V2M
37 - const: renesas,rzv2m-wdt # RZ/V2M
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/openbmc/linux/drivers/pinctrl/renesas/
H A DKconfig66 R-Mobile, RZ/G, SH, and SH-Mobile platforms.
166 bool "pin control support for RZ/A1"
174 This selects pinctrl driver for Renesas RZ/A1 platforms.
177 bool "pin control support for RZ/A2"
184 This selects GPIO and pinctrl driver for Renesas RZ/A2 platforms.
187 bool "pin control support for RZ/{G2L,G2UL,V2L}" if COMPILE_TEST
194 This selects GPIO and pinctrl driver for Renesas RZ/{G2L,G2UL,V2L}
198 bool "pin control support for RZ/G1C" if COMPILE_TEST
202 bool "pin control support for RZ/G1E" if COMPILE_TEST
206 bool "pin control support for RZ/G1H" if COMPILE_TEST
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/openbmc/linux/drivers/clk/renesas/
H A DKconfig50 bool "RZ/A1H clock support" if COMPILE_TEST
54 bool "RZ/A2 clock support" if COMPILE_TEST
68 bool "RZ/G1H clock support" if COMPILE_TEST
72 bool "RZ/G1M clock support" if COMPILE_TEST
76 bool "RZ/G1E clock support" if COMPILE_TEST
80 bool "RZ/G1C clock support" if COMPILE_TEST
84 bool "RZ/G2M clock support" if COMPILE_TEST
88 bool "RZ/G2N clock support" if COMPILE_TEST
92 bool "RZ/G2E clock support" if COMPILE_TEST
96 bool "RZ/G2H clock support" if COMPILE_TEST
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/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target-con-set.h18 C_O0_I2(rZ, r)
19 C_O0_I2(rZ, rZ)
31 C_O1_I2(r, r, rZ)
32 C_O1_I2(r, 0, rZ)
33 C_O1_I2(r, rZ, ri)
34 C_O1_I2(r, rZ, rJ)
35 C_O1_I2(r, rZ, rZ)
40 C_O1_I4(r, rZ, rJ, rZ, rZ)
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Drenesas,scif.yaml20 - renesas,scif-r7s72100 # RZ/A1H
25 - renesas,scif-r7s9210 # RZ/A2
36 - renesas,scif-r8a7742 # RZ/G1H
37 - renesas,scif-r8a7743 # RZ/G1M
38 - renesas,scif-r8a7744 # RZ/G1N
39 - renesas,scif-r8a7745 # RZ/G1E
40 - renesas,scif-r8a77470 # RZ/G1C
46 - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
51 - renesas,scif-r8a774a1 # RZ/G2M
52 - renesas,scif-r8a774b1 # RZ/G2N
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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Drenesas,usbhs.yaml16 - const: renesas,usbhs-r7s72100 # RZ/A1
21 - renesas,usbhs-r7s9210 # RZ/A2
22 - renesas,usbhs-r9a07g043 # RZ/G2UL
23 - renesas,usbhs-r9a07g044 # RZ/G2{L,LC}
24 - renesas,usbhs-r9a07g054 # RZ/V2L
29 - renesas,usbhs-r8a7742 # RZ/G1H
30 - renesas,usbhs-r8a7743 # RZ/G1M
31 - renesas,usbhs-r8a7744 # RZ/G1N
32 - renesas,usbhs-r8a7745 # RZ/G1E
33 - renesas,usbhs-r8a77470 # RZ/G1C
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H A Drenesas,usb-xhci.yaml18 - renesas,xhci-r8a7742 # RZ/G1H
19 - renesas,xhci-r8a7743 # RZ/G1M
20 - renesas,xhci-r8a7744 # RZ/G1N
24 - const: renesas,rcar-gen2-xhci # R-Car Gen2 and RZ/G1
27 - renesas,xhci-r8a774a1 # RZ/G2M
28 - renesas,xhci-r8a774b1 # RZ/G2N
29 - renesas,xhci-r8a774c0 # RZ/G2E
30 - renesas,xhci-r8a774e1 # RZ/G2H
36 - const: renesas,rcar-gen3-xhci # R-Car Gen3 and RZ/G2
39 - renesas,r9a09g011-xhci # RZ/V2M
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/openbmc/qemu/tcg/aarch64/
H A Dtcg-target-con-set.h14 C_O0_I2(rZ, r)
16 C_O0_I3(rZ, rZ, r)
21 C_O1_I2(r, 0, rZ)
28 C_O1_I2(r, rZ, rZ)
35 C_O1_I4(r, r, rC, rZ, rZ)
37 C_O2_I4(r, r, rZ, rZ, rA, rMZ)
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Drenesas,cmt.yaml42 - renesas,r8a7742-cmt0 # 32-bit CMT0 on RZ/G1H
43 - renesas,r8a7743-cmt0 # 32-bit CMT0 on RZ/G1M
44 - renesas,r8a7744-cmt0 # 32-bit CMT0 on RZ/G1N
45 - renesas,r8a7745-cmt0 # 32-bit CMT0 on RZ/G1E
46 - renesas,r8a77470-cmt0 # 32-bit CMT0 on RZ/G1C
52 - const: renesas,rcar-gen2-cmt0 # 32-bit CMT0 on R-Mobile APE6, R-Car Gen2 and RZ/G1
57 - renesas,r8a7742-cmt1 # 48-bit CMT1 on RZ/G1H
58 - renesas,r8a7743-cmt1 # 48-bit CMT1 on RZ/G1M
59 - renesas,r8a7744-cmt1 # 48-bit CMT1 on RZ/G1N
60 - renesas,r8a7745-cmt1 # 48-bit CMT1 on RZ/G1E
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/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Drenesas,rst.yaml7 title: Renesas R-Car and RZ/G Reset Controller
14 The R-Car and RZ/G Reset Controllers provide reset control, and implement the
21 CPU cores (on R-Car Gen2 and Gen3, and on RZ/G).
26 - renesas,r8a7742-rst # RZ/G1H
27 - renesas,r8a7743-rst # RZ/G1M
28 - renesas,r8a7744-rst # RZ/G1N
29 - renesas,r8a7745-rst # RZ/G1E
30 - renesas,r8a77470-rst # RZ/G1C
31 - renesas,r8a774a1-rst # RZ/G2M
32 - renesas,r8a774b1-rst # RZ/G2N
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/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Drenesas,riic.yaml7 title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
20 - renesas,riic-r7s72100 # RZ/A1H
21 - renesas,riic-r7s9210 # RZ/A2M
22 - renesas,riic-r9a07g043 # RZ/G2UL and RZ/Five
23 - renesas,riic-r9a07g044 # RZ/G2{L,LC}
24 - renesas,riic-r9a07g054 # RZ/V2L
25 - const: renesas,riic-rz # RZ/A or RZ/G2L
97 compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
/openbmc/linux/Documentation/devicetree/bindings/power/
H A Drenesas,rcar-sysc.yaml7 title: Renesas R-Car and RZ/G System Controller
14 The R-Car (RZ/G) System Controller provides power management for the CPU
22 - renesas,r8a7742-sysc # RZ/G1H
23 - renesas,r8a7743-sysc # RZ/G1M
24 - renesas,r8a7744-sysc # RZ/G1N
25 - renesas,r8a7745-sysc # RZ/G1E
26 - renesas,r8a77470-sysc # RZ/G1C
27 - renesas,r8a774a1-sysc # RZ/G2M
28 - renesas,r8a774b1-sysc # RZ/G2N
29 - renesas,r8a774c0-sysc # RZ/G2E
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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Drenesas,rspi.yaml22 - renesas,rspi-r7s72100 # RZ/A1H
23 - renesas,rspi-r7s9210 # RZ/A2
24 - renesas,r9a07g043-rspi # RZ/G2UL
25 - renesas,r9a07g044-rspi # RZ/G2{L,LC}
26 - renesas,r9a07g054-rspi # RZ/V2L
27 - const: renesas,rspi-rz
31 - renesas,qspi-r8a7742 # RZ/G1H
32 - renesas,qspi-r8a7743 # RZ/G1M
33 - renesas,qspi-r8a7744 # RZ/G1N
34 - renesas,qspi-r8a7745 # RZ/G1E
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,cpg-mssr.yaml13 On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator)
27 - renesas,r7s9210-cpg-mssr # RZ/A2
28 - renesas,r8a7742-cpg-mssr # RZ/G1H
29 - renesas,r8a7743-cpg-mssr # RZ/G1M
30 - renesas,r8a7744-cpg-mssr # RZ/G1N
31 - renesas,r8a7745-cpg-mssr # RZ/G1E
32 - renesas,r8a77470-cpg-mssr # RZ/G1C
33 - renesas,r8a774a1-cpg-mssr # RZ/G2M
34 - renesas,r8a774b1-cpg-mssr # RZ/G2N
35 - renesas,r8a774c0-cpg-mssr # RZ/G2E
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/openbmc/linux/arch/csky/abiv1/
H A Dalignment.c95 static int ldh_c(struct pt_regs *regs, uint32_t rz, uint32_t addr) in ldh_c() argument
106 put_ptreg(regs, rz, byte0); in ldh_c()
117 static int sth_c(struct pt_regs *regs, uint32_t rz, uint32_t addr) in sth_c() argument
121 byte0 = byte1 = get_ptreg(regs, rz); in sth_c()
142 static int ldw_c(struct pt_regs *regs, uint32_t rz, uint32_t addr) in ldw_c() argument
165 put_ptreg(regs, rz, byte0); in ldw_c()
176 static int stw_c(struct pt_regs *regs, uint32_t rz, uint32_t addr) in stw_c() argument
180 byte0 = byte1 = byte2 = byte3 = get_ptreg(regs, rz); in stw_c()
218 uint32_t rz = 0; in csky_alignment() local
255 rz = (opcode >> 8) & 0xf; in csky_alignment()
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/openbmc/qemu/tcg/riscv/
H A Dtcg-target-con-set.h13 C_O0_I2(rZ, r)
14 C_O0_I2(rZ, rZ)
19 C_O1_I2(r, rZ, rN)
20 C_O1_I2(r, rZ, rZ)
23 C_O2_I4(r, r, rZ, rZ, rM, rM)
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Drenesas,sdhi.yaml18 - const: renesas,sdhi-r7s72100 # RZ/A1H
32 - renesas,sdhi-r8a7742 # RZ/G1H
33 - renesas,sdhi-r8a7743 # RZ/G1M
34 - renesas,sdhi-r8a7744 # RZ/G1N
35 - renesas,sdhi-r8a7745 # RZ/G1E
36 - renesas,sdhi-r8a77470 # RZ/G1C
42 - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
44 - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
47 - renesas,sdhi-r8a774a1 # RZ/G2M
48 - renesas,sdhi-r8a774b1 # RZ/G2N
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/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Drenesas,rcar-can.yaml23 - renesas,can-r8a7742 # RZ/G1H
24 - renesas,can-r8a7743 # RZ/G1M
25 - renesas,can-r8a7744 # RZ/G1N
26 - renesas,can-r8a7745 # RZ/G1E
27 - renesas,can-r8a77470 # RZ/G1C
33 - const: renesas,rcar-gen2-can # R-Car Gen2 and RZ/G1
37 - renesas,can-r8a774a1 # RZ/G2M
38 - renesas,can-r8a774b1 # RZ/G2N
39 - renesas,can-r8a774c0 # RZ/G2E
40 - renesas,can-r8a774e1 # RZ/G2H
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/openbmc/qemu/tcg/sparc64/
H A Dtcg-target-con-set.h13 C_O0_I2(rZ, r)
14 C_O0_I2(rZ, rJ)
17 C_O1_I2(r, rZ, rJ)
18 C_O1_I4(r, rZ, rJ, rI, 0)
19 C_O2_I2(r, r, rZ, rJ)
20 C_O2_I4(r, r, rZ, rZ, rJ, rJ)
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Drenesas,irqc.yaml7 title: R-Mobile/R-Car/RZ/G interrupt controller
17 - renesas,irqc-r8a7742 # RZ/G1H
18 - renesas,irqc-r8a7743 # RZ/G1M
19 - renesas,irqc-r8a7744 # RZ/G1N
20 - renesas,irqc-r8a7745 # RZ/G1E
21 - renesas,irqc-r8a77470 # RZ/G1C
27 - renesas,intc-ex-r8a774a1 # RZ/G2M
28 - renesas,intc-ex-r8a774b1 # RZ/G2N
29 - renesas,intc-ex-r8a774c0 # RZ/G2E
30 - renesas,intc-ex-r8a774e1 # RZ/G2H
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Drenesas,rcar-gpio.yaml23 - renesas,gpio-r8a7742 # RZ/G1H
24 - renesas,gpio-r8a7743 # RZ/G1M
25 - renesas,gpio-r8a7744 # RZ/G1N
26 - renesas,gpio-r8a7745 # RZ/G1E
27 - renesas,gpio-r8a77470 # RZ/G1C
33 - const: renesas,rcar-gen2-gpio # R-Car Gen2 or RZ/G1
37 - renesas,gpio-r8a774a1 # RZ/G2M
38 - renesas,gpio-r8a774b1 # RZ/G2N
39 - renesas,gpio-r8a774c0 # RZ/G2E
40 - renesas,gpio-r8a774e1 # RZ/G2H
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