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/openbmc/linux/arch/x86/crypto/
H A Dblowfish-x86_64-asm_64.S24 #define RX0 %rax macro
60 rorq $16, RX0; \
63 rolq $16, RX0; \
68 rolq $32, RX0; \
71 xorq RT0, RX0;
74 xorq p+4*(n)(CTX), RX0;
85 xorq RT0, RX0;
94 movq (RIO), RX0; \
95 rorq $32, RX0; \
96 bswapq RX0;
[all …]
H A Dsm4-aesni-avx-asm_64.S22 #define RX0 %xmm0 macro
189 vbroadcastss (4*(round))(%rdi), RX0; \
190 vpxor s1, RX0, RX0; \
191 vpxor s2, RX0, RX0; \
192 vpxor s3, RX0, RX0; /* s1 ^ s2 ^ s3 ^ rk */ \
195 transform_pre(RX0, RTMP4, RB0, MASK_4BIT, RTMP0); \
196 vaesenclast MASK_4BIT, RX0, RX0; \
197 transform_post(RX0, RB1, RB2, MASK_4BIT, RTMP0); \
200 vpshufb RB3, RX0, RTMP0; \
202 vpshufb RTMP2, RX0, RTMP1; \
[all …]
H A Dtwofish-avx-x86_64-asm_64.S47 #define RX0 %xmm8 macro
175 round_head_2(a, b, RX0, RY0, RX1, RY1); \
176 encround_tail(a ## 1, b ## 1, c ## 1, d ## 1, RX0, RY0, prerotate); \
183 round_head_2(a, b, RX0, RY0, RX1, RY1); \
184 decround_tail(a ## 1, b ## 1, c ## 1, d ## 1, RX0, RY0, prerotate); \
245 inpack_blocks(RA1, RB1, RC1, RD1, RK1, RX0, RY0, RK2);
248 inpack_blocks(RA2, RB2, RC2, RD2, RK1, RX0, RY0, RK2);
266 outunpack_blocks(RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
267 outunpack_blocks(RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
285 inpack_blocks(RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
[all …]
H A Dsm4-aesni-avx2-asm_64.S23 #define RX0 %ymm0 macro
183 vpbroadcastd (4*(round))(%rdi), RX0; \
186 vmovdqa RX0, RX1; \
187 vpxor s1, RX0, RX0; \
188 vpxor s2, RX0, RX0; \
189 vpxor s3, RX0, RX0; /* s1 ^ s2 ^ s3 ^ rk */ \
197 transform_pre(RX0, RTMP4, RTMP1, MASK_4BIT, RTMP0); \
199 vextracti128 $1, RX0, RTMP4x; \
205 vinserti128 $1, RTMP4x, RX0, RX0; \
208 transform_post(RX0, RTMP2, RTMP3, MASK_4BIT, RTMP0); \
[all …]
H A Dtwofish-x86_64-asm_64-3way.S53 #define RX0 %r8 macro
146 enc_round_end(ab ## 0, RX0, RY0, n); \
153 dec_round_end(ba ## 0, RX0, RY0, n); \
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Drockchip-mipi-dphy-rx0.yaml4 $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
7 title: Rockchip SoC MIPI RX0 D-PHY
14 The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to
19 const: rockchip,rk3399-mipi-dphy-rx0
24 - description: MIPI D-PHY RX0 cfg clock
53 * MIPI D-PHY RX0 use registers in "general register files", it
65 mipi_dphy_rx0: mipi-dphy-rx0 {
66 compatible = "rockchip,rk3399-mipi-dphy-rx0";
H A Drockchip-inno-csi-dphy.yaml7 title: Rockchip SoC MIPI RX0 D-PHY
/openbmc/linux/arch/arm64/crypto/
H A Dsm4-neon-core.S26 #define RX0 v12 macro
97 dup RX0.4s, RKEY.s[round]; \
100 eor RX0.16b, RX0.16b, s1.16b; \
101 eor RX0.16b, RX0.16b, RTMP1.16b; \
105 tbl RTMP0.16b, {v16.16b-v19.16b}, RX0.16b; \
106 sub RX0.16b, RX0.16b, RTMP3.16b; \
107 tbx RTMP0.16b, {v20.16b-v23.16b}, RX0.16b; \
108 sub RX0.16b, RX0.16b, RTMP3.16b; \
109 tbx RTMP0.16b, {v24.16b-v27.16b}, RX0.16b; \
110 sub RX0.16b, RX0.16b, RTMP3.16b; \
[all …]
/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Dfsl,scu.yaml62 - description: RX0 MU channel
65 - description: RX0 MU channel
72 - description: RX0 MU channel
81 - description: RX0 MU channel
91 - const: rx0
94 - const: rx0
101 - const: rx0
110 - const: rx0
159 "rx0", "rx1", "rx2", "rx3",
/openbmc/linux/drivers/s390/net/
H A Dqeth_ethtool.c50 QETH_CARD_STAT("rx0 IO buffers", rx_bufs),
51 QETH_CARD_STAT("rx0 HW csum skbs", rx_skb_csum),
52 QETH_CARD_STAT("rx0 SG skbs", rx_sg_skbs),
53 QETH_CARD_STAT("rx0 SG page frags", rx_sg_frags),
54 QETH_CARD_STAT("rx0 SG page allocs", rx_sg_alloc_page),
55 QETH_CARD_STAT("rx0 dropped, no memory", rx_dropped_nomem),
56 QETH_CARD_STAT("rx0 dropped, bad format", rx_dropped_notsupp),
57 QETH_CARD_STAT("rx0 dropped, runt", rx_dropped_runt),
/openbmc/linux/drivers/phy/rockchip/
H A DKconfig13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
18 Enable this to support the Rockchip MIPI Synopsys DPHY RX0
22 will be called phy-rockchip-dphy-rx0.
H A Dphy-rockchip-dphy-rx0.c3 * Rockchip MIPI Synopsys DPHY RX0 driver
316 .compatible = "rockchip,rk3399-mipi-dphy-rx0",
375 .name = "rockchip-mipi-dphy-rx0",
382 MODULE_DESCRIPTION("Rockchip MIPI Synopsys DPHY RX0 driver");
H A DMakefile3 obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0.o
/openbmc/linux/sound/soc/codecs/
H A Dlpass-wsa-macro.c283 WSA_MACRO_SOFTCLIP0, /* RX0 */
365 "ZERO", "RX0", "RX1", "RX_MIX0", "RX_MIX1", "DEC0", "DEC1"
369 "ZERO", "RX0", "RX1", "RX_MIX0", "RX_MIX1"
1565 * Reset RX0 volume to 0 dB if compander is enabled and in wsa_macro_config_ear_spkr_gain()
1956 SOC_DAPM_ENUM_EXT("WSA RX0 Mux", rx_mux_enum,
2063 SND_SOC_DAPM_MUX("WSA RX0 MUX", SND_SOC_NOPM, WSA_MACRO_RX0, 0,
2072 SND_SOC_DAPM_MIXER("WSA RX0", SND_SOC_NOPM, 0, 0, NULL, 0),
2158 {"WSA RX0 MUX", "AIF1_PB", "WSA AIF1 PB"},
2163 {"WSA RX0 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2168 {"WSA RX0", NULL, "WSA RX0 MUX"},
[all …]
H A Dlpass-rx-macro.c631 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
635 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
645 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1677 * CDC_DMA_RX_0 port drives RX0/RX1 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
2951 SND_SOC_DAPM_MUX("RX_MACRO RX0 MUX", SND_SOC_NOPM, RX_MACRO_RX0, 0,
3092 {"RX_MACRO RX0 MUX", "AIF1_PB", "RX AIF1 PB"},
3099 {"RX_MACRO RX0 MUX", "AIF2_PB", "RX AIF2 PB"},
3106 {"RX_MACRO RX0 MUX", "AIF3_PB", "RX AIF3 PB"},
3113 {"RX_MACRO RX0 MUX", "AIF4_PB", "RX AIF4 PB"},
3120 {"RX_RX0", NULL, "RX_MACRO RX0 MUX"},
[all …]
H A Dwcd934x.c154 {"RX INT" #id "_1 MIX1 INP0", "RX0", "SLIM RX0"}, \
164 {"RX INT" #id "_1 MIX1 INP1", "RX0", "SLIM RX0"}, \
174 {"RX INT" #id "_1 MIX1 INP2", "RX0", "SLIM RX0"}, \
187 {"RX INT" #id "_2 MUX", "RX0", "SLIM RX0"}, \
240 {"IIR" #id " INP0 MUX", "RX0", "SLIM RX0"}, \
258 {"IIR" #id " INP1 MUX", "RX0", "SLIM RX0"}, \
276 {"IIR" #id " INP2 MUX", "RX0", "SLIM RX0"}, \
294 {"IIR" #id " INP3 MUX", "RX0", "SLIM RX0"}, \
614 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5",
619 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5",
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/rockchip/
H A Dgrf.yaml158 mipi-dphy-rx0:
161 $ref: /schemas/phy/rockchip-mipi-dphy-rx0.yaml#
260 mipi_dphy_rx0: mipi-dphy-rx0 {
261 compatible = "rockchip,rk3399-mipi-dphy-rx0";
/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dst,stm32-bxcan.yaml55 - const: rx0
91 interrupt-names = "tx", "rx0", "rx1", "sce";
H A Dcc770.txt31 - bosch,disconnect-rx0-input : see data sheet.
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-sc8280xp.yaml38 - description: Primary USB4 RX0 clock
46 - description: Secondary USB4 RX0 clock
/openbmc/u-boot/test/dm/
H A Ddma.c52 ut_assertok(dma_get_by_name(dev, "rx0", &dma_rx)); in dm_test_dma()
94 ut_assertok(dma_get_by_name(dev, "rx0", &dma_rx)); in dm_test_dma_rx()
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra30-ahub.txt50 - rx0 .. rx<n>
84 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3";
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dti,icssg-prueth.yaml42 - const: rx0
164 "rx0", "rx1";
/openbmc/u-boot/board/freescale/ls1043aqds/
H A Dls1043aqds.c38 #define CFG_SD_MUX1_SLOT2 0x0 /* SLOT2 TX/RX0 */
40 #define CFG_SD_MUX2_SLOT3 0x0 /* SLOT3 TX/RX0 */
42 #define CFG_SD_MUX3_SLOT4 0x0 /* SLOT4 TX/RX0 */
/openbmc/linux/include/linux/can/platform/
H A Dcc770.h20 #define BUSCFG_DR0 0x01 /* Disconnect RX0 Input / Select RX input */

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