1960b2deeSHelen Koike# SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2960b2deeSHelen Koike%YAML 1.2 3960b2deeSHelen Koike--- 4960b2deeSHelen Koike$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml# 5960b2deeSHelen Koike$schema: http://devicetree.org/meta-schemas/core.yaml# 6960b2deeSHelen Koike 7*dd3cb467SAndrew Lunntitle: Rockchip SoC MIPI RX0 D-PHY 8960b2deeSHelen Koike 9960b2deeSHelen Koikemaintainers: 10960b2deeSHelen Koike - Helen Koike <helen.koike@collabora.com> 11960b2deeSHelen Koike - Ezequiel Garcia <ezequiel@collabora.com> 12960b2deeSHelen Koike 13960b2deeSHelen Koikedescription: | 14960b2deeSHelen Koike The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to 15960b2deeSHelen Koike the ISP1 (Image Signal Processing unit v1.0) for CSI cameras. 16960b2deeSHelen Koike 17960b2deeSHelen Koikeproperties: 18960b2deeSHelen Koike compatible: 19960b2deeSHelen Koike const: rockchip,rk3399-mipi-dphy-rx0 20960b2deeSHelen Koike 21960b2deeSHelen Koike clocks: 22960b2deeSHelen Koike items: 23960b2deeSHelen Koike - description: MIPI D-PHY ref clock 24960b2deeSHelen Koike - description: MIPI D-PHY RX0 cfg clock 25960b2deeSHelen Koike - description: Video in/out general register file clock 26960b2deeSHelen Koike 27960b2deeSHelen Koike clock-names: 28960b2deeSHelen Koike items: 29960b2deeSHelen Koike - const: dphy-ref 30960b2deeSHelen Koike - const: dphy-cfg 31960b2deeSHelen Koike - const: grf 32960b2deeSHelen Koike 33960b2deeSHelen Koike '#phy-cells': 34960b2deeSHelen Koike const: 0 35960b2deeSHelen Koike 36960b2deeSHelen Koike power-domains: 37960b2deeSHelen Koike description: Video in/out power domain. 38960b2deeSHelen Koike maxItems: 1 39960b2deeSHelen Koike 40960b2deeSHelen Koikerequired: 41960b2deeSHelen Koike - compatible 42960b2deeSHelen Koike - clocks 43960b2deeSHelen Koike - clock-names 44960b2deeSHelen Koike - '#phy-cells' 45960b2deeSHelen Koike - power-domains 46960b2deeSHelen Koike 47960b2deeSHelen KoikeadditionalProperties: false 48960b2deeSHelen Koike 49960b2deeSHelen Koikeexamples: 50960b2deeSHelen Koike - | 51960b2deeSHelen Koike 52960b2deeSHelen Koike /* 53960b2deeSHelen Koike * MIPI D-PHY RX0 use registers in "general register files", it 54960b2deeSHelen Koike * should be a child of the GRF. 55960b2deeSHelen Koike * 56960b2deeSHelen Koike * grf: syscon@ff770000 { 57960b2deeSHelen Koike * compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; 58960b2deeSHelen Koike * ... 59960b2deeSHelen Koike * }; 60960b2deeSHelen Koike */ 61960b2deeSHelen Koike 62960b2deeSHelen Koike #include <dt-bindings/clock/rk3399-cru.h> 63960b2deeSHelen Koike #include <dt-bindings/power/rk3399-power.h> 64960b2deeSHelen Koike 65960b2deeSHelen Koike mipi_dphy_rx0: mipi-dphy-rx0 { 66960b2deeSHelen Koike compatible = "rockchip,rk3399-mipi-dphy-rx0"; 67960b2deeSHelen Koike clocks = <&cru SCLK_MIPIDPHY_REF>, 68960b2deeSHelen Koike <&cru SCLK_DPHY_RX0_CFG>, 69960b2deeSHelen Koike <&cru PCLK_VIO_GRF>; 70960b2deeSHelen Koike clock-names = "dphy-ref", "dphy-cfg", "grf"; 71960b2deeSHelen Koike power-domains = <&power RK3399_PD_VIO>; 72960b2deeSHelen Koike #phy-cells = <0>; 73960b2deeSHelen Koike }; 74