Searched full:resetb (Results 1 – 25 of 29) sorted by relevance
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| /openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | ov2640.txt | 13 - resetb-gpios: reference to the GPIO connected to the resetb pin, if any.
28 resetb-gpios = <&pioE 11 GPIO_ACTIVE_LOW>;
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| H A D | ov9650.txt | 10 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
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| H A D | ov2659.txt | 18 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
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| H A D | ov7670.txt | 17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
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| H A D | ovti,ov5645.yaml | 42 Reference to the GPIO connected to the RESETB pin, if any.
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| H A D | hynix,hi846.yaml | 35 description: Reference to the GPIO connected to the RESETB pin. Active low.
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| H A D | tvp5150.txt | 15 - reset-gpios: Phandle for the GPIO connected to the RESETB pin, if any.
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | at91sam9g25ek.dts | 33 resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
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| H A D | sama5d3xmb_cmp.dtsi | 65 resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
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| H A D | sama5d3xmb.dtsi | 69 resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
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| H A D | stm32429i-eval.dts | 155 resetb-gpios = <&stmpegpio 2 GPIO_ACTIVE_HIGH>;
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| H A D | at91sam9m10g45ek.dts | 64 resetb-gpios = <&pioD 12 GPIO_ACTIVE_LOW>;
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| /openbmc/linux/arch/arm/boot/dts/microchip/ |
| H A D | at91sam9g25ek.dts | 23 resetb-gpios = <&pioA 7 GPIO_ACTIVE_LOW>;
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| H A D | sama5d3xmb.dtsi | 60 resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
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| H A D | sama5d3xmb_cmp.dtsi | 59 resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
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| H A D | at91sam9m10g45ek.dts | 73 resetb-gpios = <&pioD 12 GPIO_ACTIVE_LOW>;
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| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | atmel-isi.txt | 52 resetb-gpios = <&pioE 11 GPIO_ACTIVE_LOW>;
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| /openbmc/linux/drivers/media/i2c/ |
| H A D | ov2640.c | 791 /* Active the resetb pin to perform a reset pulse */ in ov2640_set_power()
1158 priv->resetb_gpio = devm_gpiod_get_optional(&client->dev, "resetb", in ov2640_probe_dt()
1162 dev_dbg(&client->dev, "resetb gpio is not assigned!\n"); in ov2640_probe_dt()
1167 "Error %d while getting resetb gpio\n", ret); in ov2640_probe_dt()
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| H A D | tc358746.c | 65 #define RESETB BIT(1) macro
407 val = PLL_FRS(ilog2(post)) | RESETB | PLL_EN; in tc358746_apply_pll_config()
408 mask = PLL_FRS_MASK | RESETB | PLL_EN; in tc358746_apply_pll_config()
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| H A D | ov5640.c | 2441 * t3 >= 1ms Delay from PWDN pull down to RESETB pull up
2442 * t4 >= 20ms Delay from RESETB pull up to SCCB (i2c) stable
2444 * Some modules don't expose RESETB/PWDN pins directly, instead providing a
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| H A D | ov5647.c | 33 * From the datasheet, "20ms after PWDN goes low or 20ms after RESETB goes
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| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | stm32429i-eval.dts | 207 resetb-gpios = <&stmpegpio 2 GPIO_ACTIVE_HIGH>;
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| /openbmc/u-boot/board/freescale/mx51evk/ |
| H A D | mx51evk.c | 156 /* De-assert USB PHY RESETB */ in board_ehci_hcd_init()
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| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-pll14xx.c | 420 * RESETB = 1 from 0, PLL starts its normal in clk_pll14xx_prepare()
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| /openbmc/linux/drivers/gpu/drm/bridge/ |
| H A D | tc358768.c | 637 /* FRS[11:10] LBWS[9:8] CKEN[4] RESETB[1] EN[0] */ in tc358768_setup_pll()
644 /* FRS[11:10] LBWS[9:8] CKEN[4] PLL_CKEN[4] RESETB[1] EN[0] */ in tc358768_setup_pll()
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