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/openbmc/u-boot/board/freescale/ls1043ardb/
H A Dcpld.c33 u8 reg6 = (u8)(reg & 1); in cpld_set_altbank() local
41 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_altbank()
55 u8 reg6 = (u8)(reg & 1); in cpld_set_defbank() local
62 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_defbank()
73 u8 reg6 = (u8)(reg & 1); in cpld_set_nand() local
80 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_nand()
89 u8 reg6 = (u8)(reg & 1); in cpld_set_sd() local
96 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_sd()
/openbmc/linux/arch/arm/lib/
H A Dcopy_from_user.S53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
55 ldr4w \ptr, \reg5, \reg6, \reg7, \reg8, \abort
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
H A Dcopy_to_user.S44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
70 str1w \ptr, \reg6, \abort
83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
H A Dmemcpy.S25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
H A Dcopy_template.S28 * ldr8w ptr, reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
41 * str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
/openbmc/u-boot/board/freescale/ls1046ardb/
H A Dcpld.c33 u8 reg6 = (u8)(reg & 1); in cpld_set_altbank() local
41 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_altbank()
55 u8 reg6 = (u8)(reg & 1); in cpld_set_defbank() local
62 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_defbank()
73 u8 reg6 = (u8)(reg & 1); in cpld_set_sd() local
80 CPLD_WRITE(cfg_rcw_src2, reg6); in cpld_set_sd()
/openbmc/linux/arch/powerpc/include/asm/
H A Dsyscalls.h95 u32 reg6, u32 pos1, u32 pos2);
98 u32 reg6, u32 pos1, u32 pos2);
121 u32 reg6, u32 pos1, u32 pos2);
124 u32 reg6, u32 pos1, u32 pos2);
H A Dmpc52xx.h212 u8 osc_disable; /* CDM + 0x18 reg6 byte0 */
213 u8 reserved0[3]; /* CDM + 0x19 reg6 byte1,2,3 */
/openbmc/u-boot/arch/arm/lib/
H A Dmemcpy.S24 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
25 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
36 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
37 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drockchip,rk806.yaml54 The input supply for dcdc-reg6.
90 The input supply for pldo-reg6.
218 vdd_npu_mem_s0: dcdc-reg6 {
339 master_pldo6_s3: pldo-reg6 {
/openbmc/linux/arch/powerpc/kernel/
H A Dsys_ppc32.c73 u32, reg6, u32, pos1, u32, pos2) in PPC32_SYSCALL_DEFINE6() argument
81 u32, reg6, u32, pos1, u32, pos2) in PPC32_SYSCALL_DEFINE6() argument
/openbmc/linux/sound/soc/codecs/
H A Dcs4270.c405 int reg6; in cs4270_dai_mute() local
407 reg6 = snd_soc_component_read(component, CS4270_MUTE); in cs4270_dai_mute()
410 reg6 |= CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B; in cs4270_dai_mute()
412 reg6 &= ~(CS4270_MUTE_DAC_A | CS4270_MUTE_DAC_B); in cs4270_dai_mute()
413 reg6 |= cs4270->manual_mute; in cs4270_dai_mute()
416 return snd_soc_component_write(component, CS4270_MUTE, reg6); in cs4270_dai_mute()
H A Dtas2780.h90 /* TDM Configuration Reg6 */
H A Dtas2764.h88 /* TDM Configuration Reg6 */
H A Dcx2072x.c695 union cx2072x_reg_i2spcm_ctrl_reg6 reg6; in cx2072x_config_i2spcm() local
817 reg6.r.rx_pause_start_pos = i2s_right_pause_pos; in cx2072x_config_i2spcm()
818 reg6.r.rx_pause_cycles = i2s_right_pause_interval; in cx2072x_config_i2spcm()
819 reg6.r.tx_pause_start_pos = i2s_right_pause_pos; in cx2072x_config_i2spcm()
820 reg6.r.tx_pause_cycles = i2s_right_pause_interval; in cx2072x_config_i2spcm()
853 regmap_write(cx2072x->regmap, CX2072X_I2SPCM_CONTROL6, reg6.ulval); in cx2072x_config_i2spcm()
H A Dtas2770.h75 /* TDM Configuration Reg6 */
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-evb1-v10.dts316 vdd_npu_mem_s0: dcdc-reg6 {
438 vccio_1v8_s3: pldo-reg6 {
616 vdd_cpu_big0_mem_s0: dcdc-reg6 {
733 pldo6_s3: pldo-reg6 {
H A Drk3588-edgeble-neu6b.dtsi190 vdd2_ddr_s3: dcdc-reg6 {
313 pldo6_s3: pldo-reg6 {
H A Drk3368-evb-act8846.dts89 vdd10_lcd: REG6 {
H A Drk3588-rock-5b.dts383 vdd2_ddr_s3: dcdc-reg6 {
506 pldo6_s3: pldo-reg6 {
/openbmc/linux/arch/sparc/lib/
H A Dcopy_page.S38 #define TOUCH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7) \ argument
42 fsrc2 %reg6, %f60; fsrc2 %reg7, %f62;
/openbmc/linux/drivers/net/wireless/zydas/zd1211rw/
H A Dzd_rf_rf2959.c85 PDEBUG("reg6 RFPLL2 n %d num %d",
189 0x1819f9, /* REG6 */ in rf2959_init_hw()
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dactive-semi,act8846.yaml117 REG6 {
/openbmc/u-boot/arch/arm/mach-exynos/
H A Dsec_boot.S84 .word 0x0 @ REG6
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-evb-act8846.dts120 vdd10_lcd: REG6 {

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