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/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dtzpc.h12 u32 decport0_status; /* 0x04 Status of decode protection port 0 */
13 u32 decport0_set; /* 0x08 Set decode protection port 0 */
14 u32 decport0_clear; /* 0x0c Clear decode protection port 0 */
16 u32 decport1_status; /* 0x10 Status of decode protection port 1 */
17 u32 decport1_set; /* 0x14 Set decode protection port 1 */
18 u32 decport1_clear; /* 0x18 Clear decode protection port 1 */
19 u32 decport2_status; /* 0x1c Status of decode protection port 2 */
20 u32 decport2_set; /* 0x20 Set decode protection port 2 */
21 u32 decport2_clear; /* 0x24 Clear decode protection port 2 */
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-extended/dlm/dlm/
H A D0001-Remove-fcf-protection-full.patch4 Subject: [PATCH] Remove -fcf-protection=full
8 | cc1: error: '-fcf-protection=full' is not supported for this target
25 - -fstack-clash-protection -fcf-protection=full
26 + -fstack-clash-protection
36 - -fstack-clash-protection -fcf-protection=full
37 + -fstack-clash-protection
47 - -fstack-clash-protection -fcf-protection=full
48 + -fstack-clash-protection
58 -LIB_CFLAGS += $(CFLAGS) -D_REENTRANT -fcf-protection=full
59 -LLT_CFLAGS += $(CFLAGS) -fcf-protection=full
/openbmc/qemu/tests/qtest/
H A Daspeed_scu-test.c12 * SCU base, as well as protection key are
26 /* AST2600 has two protection registers */
133 * The AST2600 has two protection registers, both in test_2600_protection_register()
149 * depending on the protection register state.
151 * The test first locks the protection register and verifies that
153 * the protection register and confirms that the written value is
158 * @param protection_register - first SCU protection key register
169 /* Arbitrary value to lock provided SCU protection register */ in test_write_permission_lock_state()
183 * Assumes that the first SCU protection register is sufficient to in test_write_permission_lock_state()
184 * unlock all protection registers, if multiple are present. in test_write_permission_lock_state()
/openbmc/u-boot/drivers/mtd/
H A DKconfig61 bool "Use hardware flash protection"
64 If defined, hardware flash sectors protection is used
65 instead of U-Boot software protection.
/openbmc/qemu/include/exec/
H A Dpage-protection.h2 * QEMU page protection definitions.
23 * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs()
/openbmc/qemu/linux-headers/linux/
H A Duserfaultfd.h218 * write-protection mode is supported on both shmem and hugetlbfs.
221 * write-protection mode will always apply to unpopulated pages
224 * when userfault write-protection mode is registered.
226 * UFFD_FEATURE_WP_ASYNC indicates that userfaultfd write-protection
228 * automatically resolved and write-protection is un-set.
312 * unset the flag to undo protection of a range which was previously
320 * protection (WP=0) in response to a page fault wakes the faulting
/openbmc/qemu/docs/system/devices/
H A Dnvme.rst13 Protection`_,
276 End-to-End Data Protection
279 The virtual namespace device supports DIF- and DIX-based protection information
283 Enable protection information of the specified type (type ``1``, ``2`` or
287 Controls the location of the protection information within the metadata. Set
288 to ``1`` to transfer protection information as the first bytes of metadata.
289 Otherwise, the protection information is transferred as the last bytes of
293 By default, the namespace device uses 16 bit guard protection information
294 format (``pif=0``). Set to ``2`` to enable 64 bit guard protection
/openbmc/u-boot/doc/
H A DREADME.AX2523 - Memory subsyetem soft-error protection
24 - Protection scheme: parity-checking or error-checking-and-correction (ECC)
H A DREADME.fsl-trustzone-components2 TZPC-BP147 (TrustZone Protection Controller) and TZASC-400 (TrustZone
12 TZPC-BP147 (TrustZone Protection Controller)
/openbmc/u-boot/doc/device-tree-bindings/mtd/
H A Dmtd-physmap.txt29 - use-advanced-sector-protection: boolean to enable support for the
30 advanced sector protection (Spansion: PPB - Persistent Protection
/openbmc/u-boot/arch/arm/cpu/armv7/
H A Dmpu_v7r.c3 * Cortex-R Memory Protection Unit specific code
26 * The Memory Protection Unit(MPU) allows to partition memory into regions
27 * and set individual protection attributes for each region. In absence
/openbmc/u-boot/arch/arm/cpu/arm946es/
H A Dcpu.c33 /* ARM926E-S needs the protection unit enabled for the icache to have in cleanup_before_linux()
35 * should turn off the protection unit as well.... in cleanup_before_linux()
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dsama5_matrix.h23 u32 wpmr; /* 0x1E4: Write Protection Mode Register */
24 u32 wpsr; /* 0x1E8: Write Protection Status Register */
/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c-ed1.dts87 regulator-over-current-protection;
108 regulator-over-current-protection;
132 regulator-over-current-protection;
156 regulator-over-current-protection;
215 regulator-over-current-protection;
288 regulator-over-current-protection;
/openbmc/qemu/include/hw/misc/
H A Dtz-mpc.h2 * ARM AHB5 TrustZone Memory Protection Controller emulation
12 /* This is a model of the TrustZone memory protection controller (MPC).
/openbmc/openbmc/poky/meta/conf/machine/include/arm/
H A Darch-arm64.inc41 # Emit branch protection (PAC/BTI) instructions. On hardware that doesn't
44 TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'aarch64', ' -mbranch-protection=standard', '…
/openbmc/openbmc/poky/meta/files/common-licenses/
H A DNGPL15 Also, for our own protection, we must make certain that everyone finds out that there is no warrant…
25 …Agreement (except that you may choose to grant more extensive warranty protection to some or all t…
27 … act of transferring a copy, and you may at your option offer warranty protection in exchange for …
/openbmc/u-boot/board/armltd/integrator/
H A Dintegrator.c82 * Flash protection on the Integrator/CP is in a simple register in board_init()
89 * The Integrator/AP has some special protection mechanisms in board_init()
105 * Set up the system controller to remove write protection from in board_init()
/openbmc/u-boot/board/freescale/ls1021atwr/
H A DREADME23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
30 - 32 Kbyte L1 Instruction Cache and Data Cache for each core (ECC protection)
31 - 512 Kbyte shared coherent L2 Cache (with ECC protection)
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/
H A DCpu.interface.yaml44 Capable, Multi-Core, Hardware Thread, Execute Protection, Enhanced
82 Support execute protection.
/openbmc/u-boot/include/configs/
H A Dsh7763rdp.h57 /* Use hardware flash sectors protection instead of U-Boot software protection */
H A Despt.h57 /* Use hardware flash sectors protection instead of U-Boot software protection */
/openbmc/openbmc/poky/meta/recipes-devtools/rust/files/
H A D0001-Disable-libunwind-cross-architecture-unwinding.patch10 it helps compiling with the -mbranch-protection=pac or -mbranch-protection=standard flags
/openbmc/u-boot/board/freescale/ls1021aqds/
H A DREADME23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
30 - 32 Kbyte L1 Instruction Cache and Data Cache for each core (ECC protection)
31 - 512 Kbyte shared coherent L2 Cache (with ECC protection)
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-extended/dlm/
H A Ddlm_4.2.0.bb13 file://0001-Remove-fcf-protection-full.patch \
39 CFPROTECTION ?= "-fcf-protection=full"

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