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/openbmc/smbios-mdr/include/
H A Dcpu.hpp43 using processor = sdbusplus::server::xyz::openbmc_project::inventory::item::Cpu; typedef
56 {0x05, "Intel 386 processor"},
57 {0x06, "Intel 486 processor"},
62 {0x0b, "Intel Pentium processor"},
63 {0x0c, "Pentium Pro processor"},
64 {0x0d, "Pentium II processor"},
65 {0x0e, "Pentium processor with MMX technology"},
66 {0x0f, "Intel Celeron processor"},
67 {0x10, "Pentium II Xeon processor"},
68 {0x11, "Pentium III processor"},
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/openbmc/bmcweb/redfish-core/schema/dmtf/installed/
H A DProcessor_v1.xml4 <!--# Redfish Schema: Processor v1.20.1 -->
100 <Schema xmlns="http://docs.oasis-open.org/odata/ns/edm" Namespace="Processor">
104 <EntityType Name="Processor" BaseType="Resource.v1_0_0.Resource" Abstract="true">
105 …scription" String="The `Processor` schema describes the information about a single processor that …
106 …tion" String="This resource shall represent a single processor that a system contains. A processo…
151 <Annotation Term="OData.Description" String="This action resets the processor."/>
152 <Annotation Term="OData.LongDescription" String="This action shall reset the processor."/>
153 <Parameter Name="Processor" Type="Processor.v1_1_0.Actions"/>
171 <Parameter Name="Processor" Type="Processor.v1_1_0.Actions"/>
183 <Schema xmlns="http://docs.oasis-open.org/odata/ns/edm" Namespace="Processor.v1_0_0">
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/openbmc/bmcweb/redfish-core/schema/dmtf/csdl/
H A DProcessor_v1.xml4 <!--# Redfish Schema: Processor v1.20.1 -->
100 <Schema xmlns="http://docs.oasis-open.org/odata/ns/edm" Namespace="Processor">
104 <EntityType Name="Processor" BaseType="Resource.v1_0_0.Resource" Abstract="true">
105 …scription" String="The `Processor` schema describes the information about a single processor that …
106 …tion" String="This resource shall represent a single processor that a system contains. A processo…
151 <Annotation Term="OData.Description" String="This action resets the processor."/>
152 <Annotation Term="OData.LongDescription" String="This action shall reset the processor."/>
153 <Parameter Name="Processor" Type="Processor.v1_1_0.Actions"/>
171 <Parameter Name="Processor" Type="Processor.v1_1_0.Actions"/>
183 <Schema xmlns="http://docs.oasis-open.org/odata/ns/edm" Namespace="Processor.v1_0_0">
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-class-remoteproc4 Description: Remote processor firmware
7 remote processor.
9 To change the running firmware, ensure the remote processor is
15 Description: Remote processor state
17 Reports the state of the remote processor, which will be one of:
25 "offline" means the remote processor is powered off.
27 "suspended" means that the remote processor is suspended and
30 "running" is the normal state of an available remote processor
33 the remote processor.
35 "invalid" is returned if the remote processor is in an
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/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/
H A DProcessor.v1_20_1.json2 "$id": "http://redfish.dmtf.org/schemas/v1/Processor.v1_20_1.json",
3 "$ref": "#/definitions/Processor",
26 "#Processor.Reset": {
29 "#Processor.ResetToDefaults": {
104 …iption": "This object shall contain the properties of the FPGA device represented by a processor.",
279 "Integrated": "The FPGA device integrated with other processor in the single chip."
338 "description": "The link to the chassis that contains this processor.",
339 …resource of type `Chassis` that represents the physical container associated with this processor.",
344 … "description": "An array of links to the processors directly connected to this processor.",
346 … "$ref": "http://redfish.dmtf.org/schemas/v1/Processor.json#/definitions/Processor"
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H A DProcessorMetrics.v1_6_4.json39 "description": "The C-state residency of the processor.",
40 …"This type shall contain properties that describe the C-state residency of the processor or core.",
66 …"description": "The percentage of time that the processor or core has spent in this particular lev…
67 …s property shall contain the percentage of time, `0` to `100`, that the processor or core has spen…
81 "description": "The processor core metrics.",
82 …ription": "This type shall contain properties that describe cache metrics of a processor or core.",
100 …n": "This property shall contain the number of cache line misses of the processor or core in milli…
109 …"This property shall contain the number of cache misses per instruction of the processor or core.",
118 … "longDescription": "This property shall contain the cache hit ratio of the processor or core.",
127 … "longDescription": "This property shall contain the level of the cache in the processor or core.",
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/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema-installed/
H A DProcessor.v1_20_1.json2 "$id": "http://redfish.dmtf.org/schemas/v1/Processor.v1_20_1.json",
3 "$ref": "#/definitions/Processor",
26 "#Processor.Reset": {
29 "#Processor.ResetToDefaults": {
104 …iption": "This object shall contain the properties of the FPGA device represented by a processor.",
279 "Integrated": "The FPGA device integrated with other processor in the single chip."
338 "description": "The link to the chassis that contains this processor.",
339 …resource of type `Chassis` that represents the physical container associated with this processor.",
344 … "description": "An array of links to the processors directly connected to this processor.",
346 … "$ref": "http://redfish.dmtf.org/schemas/v1/Processor.json#/definitions/Processor"
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/openbmc/linux/arch/sh/
H A DKconfig78 The SuperH is a RISC processor targeted for use in embedded systems
152 # Processor families
214 prompt "Processor sub-type selection"
217 # Processor subtypes
220 # SH-2 Processor Support
223 bool "Support SH7619 processor"
228 bool "Support J2 processor"
233 # SH-2A Processor Support
236 bool "Support SH7201 processor"
242 bool "Support SH7203 processor"
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/openbmc/linux/tools/perf/pmu-events/arch/powerpc/power8/
H A Dcache.json5 …"BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another c…
6 …"PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another …
11 …"BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chi…
12 …"PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another ch…
17 …"BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different…
18 …"PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a differen…
23 …"BriefDescription": "The processor's data cache was reloaded from local core's L2 due to a demand …
24 …"PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either o…
35 …"BriefDescription": "The processor's data cache was reloaded from a location other than the local …
36 …"PublicDescription": "The processor's data cache was reloaded from a location other than the local…
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H A Dfrontend.json89 …"BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from an…
90 …"PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from a…
95 …"BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from anot…
96 …"PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from ano…
101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di…
102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d…
107 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on …
108 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on…
113 …"BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 due to an…
114 …"PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 due to e…
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/
H A DCpu.interface.yaml7 Processor Socket designation on MotherBoard.
12 A free form string indicates processor family type. For example,
13 values can be "Intel Xeon processor", "AS400 Family", etc.
19 this processor in unsigned integer. Default set to 0x02 which is
20 defined as "Unknown" Processor Family in DSP0134 section 7.5.2.
26 this processor in unsigned integer.
31 This Processor ID field contains processor-specific information that
32 describes the processor's features. Details depend on processor
43 The set of boolean flags for processor's capability, such as 64-bit
49 The number of cores in the processor.
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/openbmc/qemu/docs/system/
H A Dcpu-models-mips.rst.inc17 MIPS32 Processor (Release 6, 2015)
20 MIPS32 Processor (P5600, 2014)
23 MIPS32 Processor (M14K, 2009)
26 MIPS32 Processor (74K, 2007)
29 MIPS32 Processor (34K, 2006)
32 MIPS32 Processor (24K, 2003)
35 MIPS32 Processor (4K, 1999)
49 MIPS64 Processor (Release 6, 2014)
52 MIPS64 Processor (Loongson 2, 2006)
55 MIPS64 Processor (Loongson 2, 2008)
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/openbmc/linux/arch/arm/mach-imx/
H A DKconfig47 This enables support for Freescale i.MX31 processor
54 This enables support for Freescale i.MX35 processor
66 This enables support for Freescale i.MX1 processor
78 This enables support for Freescale i.MX25 processor
86 This enables support for Freescale i.MX27 processor
105 This enables support for Freescale i.MX50 processor.
112 This enables support for Freescale i.MX51 processor
120 This enables support for Freescale i.MX53 processor.
144 This enables support for Freescale i.MX6 Quad processor.
154 This enables support for Freescale i.MX6 SoloLite processor.
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/openbmc/linux/drivers/eisa/
H A Deisa.ids74 AIR1001 "AIR P6NDP PCI/EISA Dual-Pentium Processor System Board"
84 ALR3000 "80486 Processor Module"
85 ALR3010 "Pentium Processor Board"
91 ALRB0A0 "Primary System Processor Board - 80486DX2/66"
92 ALRB0B0 "Secondary System Processor Board - 80486DX2/66"
245 CPQ5000 "Compaq 386/33 System Processor Board used as Secondary"
246 CPQ5251 "Compaq 5/133 System Processor Board-2MB"
247 CPQ5253 "Compaq 5/166 System Processor Board-2MB"
248 CPQ5255 "Compaq 5/133 System Processor Board-1MB"
249 CPQ525D "Compaq 5/100 System Processor Board-1MB"
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/openbmc/linux/drivers/net/phy/mscc/
H A Dmscc_ptp.c23 /* Two PHYs share the same 1588 processor and it's to be entirely configured
24 * through the base PHY of this processor.
59 PROCESSOR, enumerator
77 case PROCESSOR: in vsc85xx_ts_read_csr()
117 blk == PROCESSOR; in vsc85xx_ts_write_csr()
127 case PROCESSOR: in vsc85xx_ts_write_csr()
254 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_EGR_STALL_LATENCY, in vsc85xx_ts_set_latencies()
274 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_LOCAL_LATENCY, in vsc85xx_ts_set_latencies()
277 val = vsc85xx_ts_read_csr(phydev, PROCESSOR, in vsc85xx_ts_set_latencies()
280 vsc85xx_ts_write_csr(phydev, PROCESSOR, MSCC_PHY_PTP_INGR_TSP_CTRL, in vsc85xx_ts_set_latencies()
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/openbmc/linux/Documentation/powerpc/
H A Delf_hwcaps.rst80 The processor is PowerPC 601.
93 The processor is 40x or 44x family.
96 The processor has a unified L1 cache for instructions and data, as
98 Unused in the kernel since 39c8bf2b3cc1 ("powerpc: Retire e200 core (mpc555x processor)")
111 This is a 601 specific HWCAP, so if it is known that the processor
117 The processor is POWER4 or PPC970/FX/MP.
121 The processor is POWER5.
124 The processor is POWER5+.
127 The processor is Cell.
130 The processor implements the embedded category ("BookE") architecture.
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/openbmc/linux/arch/m68k/
H A DKconfig.cpu2 comment "Processor Type"
10 the full 68000 processor instruction set.
12 of the 68000 processor family. They are mainly targeted at embedded
15 processor instruction set.
17 MC68xxx processor, select M68KCLASSIC.
19 processor, select COLDFIRE.
63 processor, say Y. Otherwise, say N. Note that the 68020 requires a
74 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
84 or MC68040 processor, say Y. Otherwise, say N. Note that an
95 processor, say Y. Otherwise, say N.
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/openbmc/u-boot/cmd/
H A Dremoteproc.c14 * print_remoteproc_list() - print all the remote processor devices
27 printf("Cannot find Remote processor class\n"); in print_remoteproc_list()
106 * do_remoteproc_load() - Load a remote processor with binary image
139 printf("Load Remote Processor %d with data@addr=0x%08lx %lu bytes:%s\n", in do_remoteproc_load()
153 * helper routines in remote processor core. by using a set of
182 printf("Remote processor is Running\n"); in do_remoteproc_wrapper()
184 printf("Remote processor is NOT Running\n"); in do_remoteproc_wrapper()
191 printf("Remote processor responds 'Pong'\n"); in do_remoteproc_wrapper()
193 printf("No response from Remote processor\n"); in do_remoteproc_wrapper()
211 "Load remote processor with provided image",
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/openbmc/ipmitool/contrib/
H A Dbmc-snmp-proxy.sysconf4 # the OS and Service Processor/Baseboard Management Controller (BMC)
7 # destined to the Service Processor. We will need the Service Processor's
8 # SNMP community string and the OID of the Service Processor's SNMP agent.
10 # For redirecting Traps from the Service Processor to the trap sink
17 ### Configure SNMP proxy to BMC/Service Processor ###
19 ### Service Processor/BMC SNMP Community String.
21 # Description: Set community string of the Service Processor (BMC)'s
27 ### OEM Specific OID of Service Processor
30 # Processor (BMC). This can be unique to each OEM.
34 ### Forward Traps from the Service Processor to trap sink
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/openbmc/libcper/specification/document/
H A Dcper-json-specification.tex195 containmentWarning & boolean & If true, the error was not contained within the processor or memory …
253 % Generic processor error section.
254 \section{Generic Processor Error Section}
256 …the JSON format for a single Generic Processor Error Section from a CPER record. The GUID used for…
258 validationBits & object & A Generic Processor Error Validation Structure, as described in Subsectio…
260 processorType.name & string & If available, the human readable name of the processor type.\\
261 processorType.value & uint64 & The integer value of the processor type.\\
263 processorISA.name & string & If available, the human readable name of the processor ISA.\\
264 processorISA.value & uint64 & The integer value corresponding to the processor ISA.\\
266 errorType.name & string & If available, the human readable name of the type of processor error this…
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dfsl,mu-msi.yaml16 for one processor (A side) to signal the other processor (B side) using
23 registers (Processor A-side, Processor B-side).
45 - const: processor-a-side
46 - const: processor-b-side
62 - const: processor-a-side
63 - const: processor-b-side
94 reg-names = "processor-a-side", "processor-b-side";
98 power-domain-names = "processor-a-side", "processor-b-side";
/openbmc/linux/drivers/remoteproc/
H A DKconfig5 bool "Support for Remote Processor subsystem"
33 processor framework.
44 processor framework.
62 Say y here to support Mediatek's System Companion Processor (SCP) via
63 the remote processor framework.
75 and DSP on OMAP4) via the remote processor framework.
102 Say y here to support Wakeup M3 remote processor on TI AM33xx
116 remote processor framework.
136 via the remote processor framework.
142 tristate "Amlogic Meson6/8/8b/8m2 AO ARC remote processor support"
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/openbmc/linux/Documentation/admin-guide/pm/
H A Dintel_idle.rst20 a particular processor model in it depends on whether or not it recognizes that
21 processor model and may also depend on information coming from the platform
26 ``intel_idle`` uses the ``MWAIT`` instruction to inform the processor that the
28 processor's functional blocks into low-power states. That instruction takes two
30 first of which, referred to as a *hint*, can be used by the processor to
47 Each ``MWAIT`` hint value is interpreted by the processor as a license to
48 reconfigure itself in a certain way in order to save energy. The processor
52 processor) corresponding to them depends on the processor model and it may also
59 for different processor models included in the driver itself and the ACPI tables
60 of the system. The former are always used if the processor model at hand is
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/openbmc/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dimx-regs.h275 u32 cpxtype; /* Processor x Type Register */
276 u32 cpxnum; /* Processor x Number Register */
277 u32 cpxmaster; /* Processor x Master Number Register */
278 u32 cpxcount; /* Processor x Count Register */
279 u32 cpxcfg0; /* Processor x Configuration 0 Register */
280 u32 cpxcfg1; /* Processor x Configuration 1 Register */
281 u32 cpxcfg2; /* Processor x Configuration 2 Register */
282 u32 cpxcfg3; /* Processor x Configuration 3 Register */
283 u32 cp0type; /* Processor 0 Type Register */
284 u32 cp0num; /* Processor 0 Number Register */
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/openbmc/u-boot/include/
H A Dremoteproc.h20 * @RPROC_INTERNAL_MEMORY_MAPPED: Remote processor uses own memory and is memory
21 * mapped to the host processor over an address range.
62 * @is_running: Check if the remote processor is running(optional)
90 * @id: id of the remote processor
104 * rproc_load() - load binary to a remote processor
105 * @id: id of the remote processor
114 * rproc_start() - Start a remote processor
115 * @id: id of the remote processor
122 * rproc_stop() - Stop a remote processor
123 * @id: id of the remote processor
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