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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dstericsson,u8500-clks.yaml18 control management unit) clocks and PRCC (peripheral reset and
19 clock controller) clocks. For some reason PRCC 4 does not exist so
31 - description: PRCC 1 register area
32 - description: PRCC 2 register area
33 - description: PRCC 3 register area
34 - description: PRCC 5 register area
35 - description: PRCC 6 register area
49 prcc-periph-clock:
50 description: A subnode with two clock cells for PRCC (peripheral
52 which PRCC block the consumer wants to use, possible values are 1, 2, 3,
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/openbmc/linux/drivers/clk/ux500/
H A Dreset-prcc.c3 * Reset controller portions for the U8500 PRCC
16 #include "prcc.h"
17 #include "reset-prcc.h"
21 /* This macro flattens the 2-dimensional PRCC numberspace */
26 * Reset registers in each PRCC - the reset lines are active low
74 pr_debug("PRCC cycle reset id %lu, bit %u\n", id, bit); in u8500_prcc_reset()
95 pr_debug("PRCC assert reset id %lu, bit %u\n", id, bit); in u8500_prcc_reset_assert()
108 pr_debug("PRCC deassert reset id %lu, bit %u\n", id, bit); in u8500_prcc_reset_deassert()
122 pr_debug("PRCC check status on reset line id %lu, bit %u\n", id, bit); in u8500_prcc_reset_status()
149 pr_err("%s: invalid PRCC %d\n", __func__, prcc_num); in u8500_prcc_reset_xlate()
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H A Dreset-prcc.h10 * struct u8500_prcc_reset - U8500 PRCC reset controller state
12 * @phy_base: the physical base address for each PRCC block
13 * @base: the remapped PRCC bases
H A DMakefile7 obj-y += clk-prcc.o
12 obj-y += reset-prcc.o
H A Du8500_of_clk.c15 #include "prcc.h"
16 #include "reset-prcc.h"
42 pr_err("%s: invalid PRCC base %d\n", __func__, base); in ux500_twocell_get()
302 /* PRCC P-clocks */ in u8500_clk_init()
479 /* PRCC K-clocks in u8500_clk_init()
602 if (of_node_name_eq(child, "prcc-periph-clock")) in u8500_clk_init()
605 if (of_node_name_eq(child, "prcc-kernel-clock")) in u8500_clk_init()
614 if (of_node_name_eq(child, "prcc-reset-controller")) in u8500_clk_init()
H A Dclk-prcc.c3 * PRCC clock implementation for ux500 platform.
33 /* PRCC clock operations. */
/openbmc/linux/include/dt-bindings/reset/
H A Dstericsson,db8500-prcc-reset.h11 /* Reset lines on PRCC 1 */
28 /* Reset lines on PRCC 2 */
39 /* Reset lines on PRCC 3 */
48 /* Reset lines on PRCC 6 */
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dst,nomadik-i2c.yaml86 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h>
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-srggb12p.rst9 V4L2_PIX_FMT_SRGGB12P ('pRCC'), V4L2_PIX_FMT_SGRBG12P ('pgCC'), V4L2_PIX_FMT_SGBRG12P ('pGCC'), V4L…
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0.dtsi9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h>
365 prcc_pclk: prcc-periph-clock {
369 prcc_kclk: prcc-kernel-clock {
373 prcc_reset: prcc-reset-controller {
/openbmc/linux/
H A Dopengrok0.0.log[all...]
H A Dopengrok1.0.log[all...]
H A Dopengrok2.0.log[all...]
/openbmc/
Dopengrok1.0.log[all...]
Dopengrok2.0.log[all...]