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/openbmc/linux/drivers/infiniband/hw/qib/
H A Dqib_verbs.h149 u64 z_unicast_xmit; /* starting count for PMA */
150 u64 z_unicast_rcv; /* starting count for PMA */
151 u64 z_multicast_xmit; /* starting count for PMA */
152 u64 z_multicast_rcv; /* starting count for PMA */
153 u64 z_symbol_error_counter; /* starting count for PMA */
154 u64 z_link_error_recovery_counter; /* starting count for PMA */
155 u64 z_link_downed_counter; /* starting count for PMA */
156 u64 z_port_rcv_errors; /* starting count for PMA */
157 u64 z_port_rcv_remphys_errors; /* starting count for PMA */
158 u64 z_port_xmit_discards; /* starting count for PMA */
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H A Dqib_mad.c1531 /* Congestion PMA packets start at offset 24 not 64 */ in pma_get_portcounters_cong()
1666 struct qib_pma_counters pma; in pma_get_portcounters_ext() local
1690 qib_snapshot_pmacounters(ibp, &pma); in pma_get_portcounters_ext()
1692 p->port_unicast_xmit_packets = cpu_to_be64(pma.n_unicast_xmit in pma_get_portcounters_ext()
1694 p->port_unicast_rcv_packets = cpu_to_be64(pma.n_unicast_rcv in pma_get_portcounters_ext()
1696 p->port_multicast_xmit_packets = cpu_to_be64(pma.n_multicast_xmit in pma_get_portcounters_ext()
1698 p->port_multicast_rcv_packets = cpu_to_be64(pma.n_multicast_rcv in pma_get_portcounters_ext()
1827 struct qib_pma_counters pma; in pma_set_portcounters_ext() local
1843 qib_snapshot_pmacounters(ibp, &pma); in pma_set_portcounters_ext()
1846 ibp->z_unicast_xmit = pma.n_unicast_xmit; in pma_set_portcounters_ext()
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/openbmc/linux/include/uapi/linux/
H A Dmdio.h40 #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */
41 #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */
42 #define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */
49 #define MDIO_PMA_NG_EXTABLE 21 /* 2.5G/5G PMA/PMD extended ability */
70 #define MDIO_B10L_PMA_CTRL 2294 /* 10BASE-T1L PMA control */
71 #define MDIO_PMA_10T1L_STAT 2295 /* 10BASE-T1L PMA status */
73 #define MDIO_PMA_PMD_BT1 18 /* BASE-T1 PMA/PMD extended ability */
84 #define MDIO_PMA_PMD_BT1_CTRL 2100 /* BASE-T1 PMA/PMD control register */
160 #define MDIO_PMA_CTRL2_TYPE 0x000f /* PMA/PMD type selection */
191 #define MDIO_PMA_STAT2_LBABLE 0x0001 /* PMA loopback ability */
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/openbmc/u-boot/include/linux/
H A Dmdio.h39 #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */
40 #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */
41 #define MDIO_PMA_EXTABLE 11 /* 10G PMA/PMD extended ability */
136 #define MDIO_PMA_CTRL2_TYPE 0x000f /* PMA/PMD type selection */
164 #define MDIO_PMA_STAT2_LBABLE 0x0001 /* PMA loopback ability */
214 /* PMA 10GBASE-T pair swap & polarity */
222 /* PMA 10GBASE-T TX power register. */
225 /* PMA 10GBASE-T SNR registers. */
230 /* PMA 10GBASE-R FEC ability register. */
276 #define MDIO_PMA_LASI_RX_PMALFLT 0x0010 /* PMA/PMD RX local fault */
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/openbmc/linux/drivers/net/phy/
H A Dphy-c45.c14 * genphy_c45_baset1_able - checks if the PMA has BASE-T1 extended abilities
33 * genphy_c45_pma_can_sleep - checks if the PMA have sleep support
48 * genphy_c45_pma_resume - wakes up the PMA module
62 * genphy_c45_pma_suspend - suspends the PMA module
127 * PMA/PMD type selection is 1.7.5:0 not 1.7.3:0. See 45.2.1.6.1 in genphy_c45_pma_setup_forced()
314 * are controlled through the PMA/PMD MMD registers.
595 * genphy_c45_read_pma - read link speed etc from PMA
645 * genphy_c45_read_mdix - read mdix status from PMA
853 /* IEEE 802.3cg-2019 45.2.1.186b 10BASE-T1L PMA status register in genphy_c45_read_eee_abilities()
885 * genphy_c45_pma_baset1_read_abilities - read supported baset1 link modes from PMA
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H A Dmarvell10g.c12 * SGMII PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for <= 1G)
13 * 10GBASE-KR PHYXS -- BASE-T PCS -- 10G PMA -- AN -- Copper (for 10G)
584 * don't set bit 14 in PMA Extended Abilities (1.11), although they do
587 * the PMA device identifier, with a mask matching models known to have this
595 /* Only some revisions of the 88X3310 family PMA seem to be impacted */ in mv3310_has_pma_ngbaset_quirk()
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dxlnx,axi-ethernet.yaml101 - description: MGT reference clock (used by optional internal PCS/PMA PHY)
121 description: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
122 modes, where "pcs-handle" should be used to point to the PCS/PMA PHY,
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,ufs-phy.yaml27 - const: phy-pma
101 reg-names = "phy-pma";
H A Dti,phy-j721e-wiz.yaml79 clock source for the reference clock used in the PHY and PMA digital
147 WIZ node should have subnodes for each of the PMA common refclock
H A Dcdns,dphy.yaml23 - description: PMA state machine clock
/openbmc/u-boot/drivers/net/phy/
H A Dxilinx_phy.c3 * Xilinx PCS/PMA Core phy driver
132 .name = "Xilinx PCS/PMA PHY",
H A Dgeneric_10g.c53 /* Assume PHY must have at least one of PMA/PMD, WIS, PCS, PHY in gen10g_discover_mmds()
/openbmc/linux/drivers/net/ethernet/aquantia/atlantic/
H A Daq_phy.c119 /* PMA Standard Device Identifier 2: Address 1.3 */ in aq_phy_init_phy_id()
137 /* PMA Standard Device Identifier: in aq_phy_init()
/openbmc/linux/drivers/net/pcs/
H A Dpcs-xpcs-nxp.c67 /* In NXP SJA1105, the PCS is integrated with a PMA that has the TX lane
153 * Release reset of PMA to enable data flow to/from PCS. in nxp_sja1110_pma_config()
H A Dpcs-xpcs-wx.c148 /* wait pma initialization done */ in txgbe_pma_init_done()
153 dev_err(&xpcs->mdiodev->dev, "xpcs pma initialization timeout\n"); in txgbe_pma_init_done()
/openbmc/linux/arch/riscv/include/asm/
H A Dpgtable-64.h118 * 00 - PMA Normal Cacheable, No change to implied PMA memory type
131 * 01110 - PMA Weakly-ordered, Cacheable, Bufferable, Shareable, Non-trustable
/openbmc/linux/drivers/net/ethernet/sfc/falcon/
H A Dqt202x_phy.c184 /* The PHY can get stuck in a state where it reports PHY_XS and PMA/PMD in qt2025c_bug17190_workaround()
186 * persisting for a couple of seconds, we switch PMA/PMD loopback in qt2025c_bug17190_workaround()
203 netif_dbg(efx, hw, efx->net_dev, "bashing QT2025C PMA/PMD\n"); in qt2025c_bug17190_workaround()
284 /* PMA/PMD loopback sets RXIN to inverse polarity and the firmware in qt2025c_select_phy_mode()
H A Dtxc43128_phy.c182 /* Reset the PMA/PMD MMD. The documentation is explicit that this does a
211 /* Set PMA to test into loopback using Mt Diablo reg as per app note */ in txc_bist_one()
406 /* Analog register bank in PMA/PMD, PHY XS */ in txc_set_power()
/openbmc/linux/drivers/phy/cadence/
H A Dphy-cadence-sierra.c216 /* PHY PMA common registers */
221 /* PHY PMA lane registers */
569 /* PHY PMA lane registers configurations */ in cdns_sierra_phy_init()
581 /* PMA common registers configurations */ in cdns_sierra_phy_init()
591 /* PMA lane registers configurations */ in cdns_sierra_phy_init()
1129 dev_err(dev, "Failed to init PHY PMA common CDB regmap\n"); in cdns_regmap_init_blocks()
1141 dev_err(dev, "Failed to init PHY PMA lane CDB regmap\n"); in cdns_regmap_init_blocks()
1314 /* PHY PMA lane registers configurations */ in cdns_sierra_phy_configure_multilink()
1326 /* PMA common registers configurations */ in cdns_sierra_phy_configure_multilink()
1336 /* PMA lane registers configurations */ in cdns_sierra_phy_configure_multilink()
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H A Dphy-cadence-torrent.c168 /* PMA TX Lane registers */
189 /* PMA RX Lane registers */
231 /* PHY PMA common registers */
1209 "timeout waiting for PMA common ready\n"); in cdns_torrent_dp_wait_pma_cmn_ready()
1258 /* PMA lane configuration to deal with multi-link operation */ in cdns_torrent_dp_pma_cmn_rate()
1311 /* PMA common configuration 19.2MHz */ in cdns_torrent_dp_configure_rate()
1314 /* PMA common configuration 25MHz */ in cdns_torrent_dp_configure_rate()
1317 /* PMA common configuration 100MHz */ in cdns_torrent_dp_configure_rate()
1716 * PHY PMA registers configuration functions in cdns_torrent_dp_common_init()
2286 dev_err(dev, "Failed to init PHY PMA common CDB regmap\n"); in cdns_torrent_regmap_init()
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/openbmc/linux/drivers/infiniband/hw/hfi1/
H A Dopa_compat.h21 /* OPA PMA attribute IDs */
/openbmc/linux/drivers/phy/rockchip/
H A Dphy-rockchip-snps-pcie3.c96 /* Deassert PCIe PMA output clamp mode */ in rockchip_p3phy_rk3568_init()
140 /* Deassert PCIe PMA output clamp mode */ in rockchip_p3phy_rk3588_init()
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Dcdns,mhdp8546.yaml24 The AUX and PMA registers are not part of this range, they are instead
/openbmc/linux/include/rdma/
H A Dib_pma.h14 * PMA class portinfo capability mask bits
/openbmc/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet.h157 #define XAE_PPST_OFFSET 0x00000030 /* PCS PMA Soft Temac Status Reg */
343 /* Xilinx PCS/PMA PHY register for switching 1000BaseX or SGMII */
389 * @pcs_phy: Reference to PCS/PMA PHY if used

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