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/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3128.dtsi237 clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>;
245 clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER1>;
253 clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER2>;
261 clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER3>;
269 clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER4>;
277 clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER5>;
H A Drv1126.dtsi375 clocks = <&cru PCLK_TIMER>, <&cru CLK_TIMER0>;
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Drockchip,rk-timer.yaml63 clocks = <&cru PCLK_TIMER>, <&xin24m>;
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3036-cru.h73 #define PCLK_TIMER 353 macro
H A Drk3128-cru.h76 #define PCLK_TIMER 353 macro
H A Drk3228-cru.h81 #define PCLK_TIMER 353 macro
H A Drv1108-cru.h124 #define PCLK_TIMER 270 macro
H A Drk3328-cru.h145 #define PCLK_TIMER 315 macro
H A Drk3288-cru.h140 #define PCLK_TIMER 353 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3036-cru.h72 #define PCLK_TIMER 353 macro
H A Drk3228-cru.h112 #define PCLK_TIMER 353 macro
H A Drk3128-cru.h113 #define PCLK_TIMER 353 macro
H A Drv1108-cru.h121 #define PCLK_TIMER 270 macro
H A Dpx30-cru.h168 #define PCLK_TIMER 345 macro
H A Drk3308-cru.h191 #define PCLK_TIMER 212 macro
H A Drk3328-cru.h146 #define PCLK_TIMER 215 macro
H A Drk3288-cru.h145 #define PCLK_TIMER 353 macro
H A Drockchip,rv1126-cru.h328 #define PCLK_TIMER 267 macro
H A Drockchip,rk3588-cru.h234 #define PCLK_TIMER 219 macro
H A Drk3568-cru.h427 #define PCLK_TIMER 364 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3036.c413 GATE(PCLK_TIMER, "pclk_timer", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 7, GFLAGS),
H A Dclk-rk3128.c513 GATE(PCLK_TIMER, "pclk_timer", "pclk_peri", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(7), 7, GFLAGS),
H A Dclk-rv1108.c559 GATE(PCLK_TIMER, "pclk_timer", "pclk_bus_pre", CLK_IGNORE_UNUSED,
H A Dclk-rv1126.c575 GATE(PCLK_TIMER, "pclk_timer", "pclk_pdbus", 0,
H A Dclk-rk3308.c880 GATE(PCLK_TIMER, "pclk_timer", "pclk_bus", 0, RK3308_CLKGATE_CON(6), 9, GFLAGS),

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