| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-s3c64xx.c | 224 GATE_BUS(PCLK_SPI0, "pclk_spi0", "pclk", PCLK_GATE, 21),
334 ALIAS(PCLK_SPI0, "s3c6410-spi.0", "spi"),
356 ALIAS(PCLK_SPI0, "s3c6410-spi.0", "spi_busclk0"),
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| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | spi-rockchip.yaml | 106 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | samsung,s3c64xx-clock.h | 68 #define PCLK_SPI0 53 macro
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| H A D | exynos7-clk.h | 104 #define PCLK_SPI0 12 macro
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| H A D | rk3188-cru-common.h | 80 #define PCLK_SPI0 328 macro
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| H A D | rk3228-cru.h | 106 #define PCLK_SPI0 338 macro
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| H A D | rk3128-cru.h | 107 #define PCLK_SPI0 338 macro
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| H A D | px30-cru.h | 164 #define PCLK_SPI0 341 macro
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| H A D | rk3368-cru.h | 122 #define PCLK_SPI0 338 macro
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| H A D | rk3308-cru.h | 186 #define PCLK_SPI0 207 macro
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| H A D | rk3288-cru.h | 130 #define PCLK_SPI0 338 macro
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| H A D | rockchip,rv1126-cru.h | 50 #define PCLK_SPI0 37 macro
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| H A D | rk3399-cru.h | 242 #define PCLK_SPI0 347 macro
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| H A D | rockchip,rk3588-cru.h | 161 #define PCLK_SPI0 146 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | exynos7420-clk.h | 107 #define PCLK_SPI0 12 macro
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| H A D | rk3228-cru.h | 75 #define PCLK_SPI0 338 macro
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| H A D | rk3188-cru-common.h | 78 #define PCLK_SPI0 328 macro
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| H A D | rk3368-cru.h | 125 #define PCLK_SPI0 338 macro
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| H A D | rk3288-cru.h | 125 #define PCLK_SPI0 338 macro
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| H A D | rk3399-cru.h | 240 #define PCLK_SPI0 347 macro
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rk3128.c | 501 GATE(PCLK_SPI0, "pclk_spi0", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 12, GFLAGS),
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| H A D | clk-rk3228.c | 607 GATE(PCLK_SPI0, "pclk_spi0", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 6, GFLAGS),
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| H A D | clk-rk3188.c | 520 GATE(PCLK_SPI0, "pclk_spi0", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 12, GFLAGS),
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3xxx.dtsi | 393 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
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| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3xxx.dtsi | 453 clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
|