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/openbmc/linux/drivers/staging/pi433/
H A Drf69.c338 bool pa0, pa1, pa2, high_power; in rf69_set_output_power_level() local
343 pa0 = pa_level & MASK_PALEVEL_PA0; in rf69_set_output_power_level()
353 if (pa0 && !pa1 && !pa2) { in rf69_set_output_power_level()
356 } else if (!pa0 && pa1 && !pa2) { in rf69_set_output_power_level()
359 } else if (!pa0 && pa1 && pa2) { in rf69_set_output_power_level()
/openbmc/u-boot/configs/
H A DChuwi_V7_CW0825_defconfig24 CONFIG_VIDEO_LCD_SPI_CS="PA0"
/openbmc/linux/Documentation/driver-api/media/drivers/
H A Dsaa7134-devel.rst45 - nc MDT2005 PA0 pin 17 strap low
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm6125-xiaomi-laurel-sprout.dts86 rf-pa0-thermal {
177 rf-pa0-therm@0 {
H A Dsm6125-sony-xperia-seine-pdx201.dts92 rf-pa0-thermal {
230 rf-pa0-therm@0 {
/openbmc/u-boot/arch/arm/dts/
H A Dsun4i-a10-inet9f-rev03.dts115 gpios = <&pio 0 0 GPIO_ACTIVE_LOW>; /* PA0 */
313 pins = "PA0", "PA1", "PA3", "PA4",
H A Dsun5i-a10s.dtsi142 pins = "PA0", "PA1", "PA2",
H A Dsun6i-a31.dtsi581 pins = "PA0", "PA1", "PA2", "PA3",
597 pins = "PA0", "PA1", "PA2", "PA3",
606 pins = "PA0", "PA1", "PA2", "PA3",
H A Dsun7i-a20.dtsi713 pins = "PA0", "PA1", "PA2",
722 pins = "PA0", "PA1", "PA2",
731 pins = "PA0", "PA1", "PA2",
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dst,stm32-pinctrl.txt84 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dingenic,pinctrl.yaml19 pin within that GPIO port. For example PA0 is the first pin in GPIO port A,
H A Datmel,at91-pinctrl.txt47 PA0 MCDB0
H A Dst,stm32-pinctrl.yaml153 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i-a10s.dtsi141 pins = "PA0", "PA1", "PA2",
H A Dsun7i-a20.dtsi844 pins = "PA0", "PA1", "PA2",
864 pins = "PA0", "PA1", "PA2",
874 pins = "PA0", "PA1", "PA2",
1093 pins = "PA0", "PA1";
H A Dsun4i-a10-inet9f-rev03.dts111 gpios = <&pio 0 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; /* PA0 */
H A Dsun6i-a31.dtsi625 pins = "PA0", "PA1", "PA2", "PA3",
641 pins = "PA0", "PA1", "PA2", "PA3",
650 pins = "PA0", "PA1", "PA2", "PA3",
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dgpio.h16 * PA0 - PA17 | PB0 - PB23 | PC0 - PC24
/openbmc/linux/drivers/mtd/nand/raw/
H A Drockchip-nand-controller.c550 * PA0 PA1 PA2 PA3 | BBM OOB1 OOB2 OOB3 | ... in rk_nfc_write_page_raw()
561 * BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3 in rk_nfc_write_page_raw()
620 * PA0 PA1 PA2 PA3 | BBM OOB1 OOB2 OOB3 | ... in rk_nfc_write_page_hwecc()
632 * BBM OOB1 OOB2 OOB3 |......| PA0 PA1 PA2 PA3 in rk_nfc_write_page_hwecc()
/openbmc/u-boot/board/freescale/mpc8555cds/
H A Dmpc8555cds.c69 /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
/openbmc/u-boot/board/freescale/mpc8541cds/
H A Dmpc8541cds.c71 /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9260.dtsi370 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
400 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
H A Dat91sam9263.dtsi294 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
386 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
/openbmc/linux/arch/m68k/include/asm/
H A DMC68EZ328.h1162 #define DRAMMC_COL10 0x0080 /* Col address bit for MD10 PA11/PA0 */
1163 #define DRAMMC_COL9 0x0040 /* Col address bit for MD9 PA10/PA0 */
1164 #define DRAMMC_COL8 0x0020 /* Col address bit for MD8 PA9/PA0 */
H A DMC68VZ328.h1257 #define DRAMMC_COL10 0x0080 /* Col address bit for MD10 PA11/PA0 */
1258 #define DRAMMC_COL9 0x0040 /* Col address bit for MD9 PA10/PA0 */
1259 #define DRAMMC_COL8 0x0020 /* Col address bit for MD8 PA9/PA0 */

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