Searched full:macrocell (Results 1 – 20 of 20) sorted by relevance
7 title: Arm CoreSight Embedded Trace MacroCell23 The Embedded Trace Macrocell (ETM) is a real-time trace module providing53 Embedded Trace Macrocell with memory mapped access.60 Embedded Trace Macrocell (version 4.x), with system register access only
7 title: Arm CoreSight System Trace MacroCell
75 The Security Module macrocell provides all necessary secure functions to avoid
5 Description: (RW) Enable/disable tracing on this specific trace macrocell.6 Enabling the trace macrocell implies it has been configured
457 available to the trace unit. See the Trace Macrocell
88 tristate "CoreSight Embedded Trace Macrocell 3.x driver"106 This driver provides support for the CoreSight Embedded Trace Macrocell123 tristate "CoreSight System Trace Macrocell driver"
5 * Description: CoreSight System Trace Macrocell driver973 MODULE_DESCRIPTION("Arm CoreSight System Trace Macrocell driver");
113 * See Embedded Trace Macrocell specification (ARM IHI 0014Q)135 * See ARM Embedded Trace Macrocell Architecture Specification (ARM IHI 0064D)
3259 * the configuration of the ARM embedded trace macrocell which is in cs_etm__process_auxtrace_info_full()
76 &&&&&&&&& IIIIIII ETM = Embedded Trace Macrocell77 ; PTM = Program Trace Macrocell100 Program Trace Macrocell102 Embedded Trace Macrocell104 System trace Macrocell108 Instrumentation Trace Macrocell631 Using the System Trace Macrocell module is the same as the tracers - the only
8 * Cortex-A53 (2 cores) Soft Macrocell Model
119 * ULPI : Universal Transceiver Macrocell Low Pin Interface
277 (Soft Macrocell Models)
417 /* Instrumentation Trace Macrocell */ in zynq_init()423 /* Fabric Trace Macrocell */ in zynq_init()
446 * Having incorrect crc is usually due to i2c macrocell in st21nfca_hci_irq_thread_fn()
255 embedded trace macrocell, and a floating-point unit.
44 /* Macrocell value definitions */53 /* Macrocell register definitions */
1354 their output to the EmbeddedICE macrocell's DCC channel using
2446 /* Trace Macrocell system register access */ in arm_cpu_realizefn()
767 * TRCDIS [28] is RAZ/WI since we do not implement a trace macrocell. in cpacr_write()