| /openbmc/linux/drivers/gpu/drm/bridge/imx/ |
| H A D | Kconfig | 17 tristate "Freescale i.MX8QXP LVDS display bridge"
24 Freescale i.MX8qxp processor. Official name of LDB is pixel mapper.
45 tristate "Freescale i.MX8QXP pixel link to display pixel interface"
50 found in Freescale i.MX8qxp processor.
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| H A D | imx8qxp-pixel-link.c | 425 MODULE_DESCRIPTION("i.MX8QXP/QM display pixel link bridge driver");
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| /openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | fsl,imx8qxp-pxl2dpi.yaml | 7 title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface
13 The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)
19 The i.MX8qxp PXL2DPI is controlled by Control and Status Registers(CSR) module.
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| H A D | fsl,imx8qxp-ldb.yaml | 19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
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| /openbmc/linux/Documentation/devicetree/bindings/bus/ |
| H A D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 7 title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus
13 i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
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| /openbmc/u-boot/board/freescale/imx8qxp_mek/ |
| H A D | MAINTAINERS | 1 i.MX8QXP MEK BOARD
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| H A D | README | 1 U-Boot for the NXP i.MX8QXP EVK board
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| /openbmc/u-boot/arch/arm/mach-imx/imx8/ |
| H A D | Kconfig | 26 bool "Support i.MX8QXP MEK board"
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| /openbmc/linux/drivers/firmware/imx/ |
| H A D | Kconfig | 8 DSP exists on some i.MX8 processors (e.g i.MX8QM, i.MX8QXP).
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| H A D | imx-scu-soc.c | 87 return "i.MX8QXP"; in imx_scu_soc_name()
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | fsl-imx8qxp.dtsi | 19 model = "Freescale i.MX8QXP";
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| H A D | fsl-imx8qxp-mek.dts | 12 model = "Freescale i.MX8QXP MEK";
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| /openbmc/linux/Documentation/devicetree/bindings/phy/ |
| H A D | mixel,mipi-dsi-phy.yaml | 17 The Mixel PHY IP block found on i.MX8qxp is a combo PHY that can work
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| /openbmc/linux/drivers/media/platform/nxp/imx8-isi/ |
| H A D | imx8-isi-core.h | 3 * V4L2 Capture ISI subdev for i.MX8QXP/QM platform
5 * ISI is a Image Sensor Interface of i.MX8QXP/QM platform, which
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| /openbmc/linux/Documentation/devicetree/bindings/media/ |
| H A D | nxp,imx8-jpeg.yaml | 7 title: i.MX8QXP/QM JPEG decoder/encoder
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| H A D | amphion,vpu.yaml | 53 separately. NXP i.MX8QM SoC has one decoder and two encoder, i.MX8QXP SoC
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | imx8qxp-lpcg.yaml | 7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock
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| /openbmc/linux/drivers/media/platform/nxp/imx-jpeg/ |
| H A D | mxc-jpeg.h | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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| H A D | mxc-jpeg-hw.h | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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| H A D | mxc-jpeg-hw.c | 3 * i.MX8QXP/i.MX8QM JPEG encoder/decoder v4l2 driver
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8qxp-ai_ml.dts | 12 model = "Einfochips i.MX8QXP AI_ML";
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| H A D | imx8qxp-mek.dts | 12 model = "Freescale i.MX8QXP MEK";
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| /openbmc/linux/drivers/pinctrl/freescale/ |
| H A D | pinctrl-imx8qxp.c | 240 MODULE_DESCRIPTION("NXP i.MX8QXP pinctrl driver");
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| /openbmc/linux/drivers/remoteproc/ |
| H A D | imx_dsp_rproc.c | 268 /* Specific configuration for i.MX8QXP */
951 * On i.MX8QM and i.MX8QXP there is multiple power domains
1034 * For i.MX8QXP and i.MX8QM, DSP should be started and stopped by System
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| /openbmc/linux/sound/soc/fsl/ |
| H A D | fsl_mqs.c | 200 * But in i.MX8QM/i.MX8QXP the control register is moved in fsl_mqs_probe()
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