| /openbmc/u-boot/arch/arm/mach-imx/mx3/ |
| H A D | Kconfig | 3 config MX31 config
7 prompt "MX31 board select"
11 bool "Support the i.MX31 PDK board from Freescale/NXP"
19 int "i.MX31 HCLK frequency"
26 int "i.MX31 CLK32 Frequency"
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| /openbmc/linux/arch/arm/mach-imx/ |
| H A D | cpu-imx31.c | 3 * MX31 CPU type detection
23 { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
24 { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
26 { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
28 { .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
30 { .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
56 imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN); in mx31_read_cpu_rev()
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| H A D | mm-imx3.c | 7 * - add MX31 specific definitions
74 imx_map_entry(MX31, X_MEMC, MT_DEVICE),
75 imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
76 imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
77 imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
78 imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
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| H A D | Kconfig | 43 bool "i.MX31 support"
47 This enables support for Freescale i.MX31 processor
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| H A D | hardware.h | 54 * mx31:
97 #include "mx31.h"
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| H A D | mach-imx31.c | 14 DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
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| H A D | mx3x.h | 11 * MX31 memory map:
182 #define MX3x_PROD_SIGNATURE 0x1 /* For MX31 */
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| /openbmc/u-boot/doc/ |
| H A D | README.watchdog | 13 Can be used to change the timeout for i.mx31/35/5x/6x.
15 be 128000 msec for i.mx31/35/5x/6x.
27 Available for i.mx31/35/5x/6x to service the watchdog. This is not
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| H A D | README.fsl_iim | 7 - i.MX31,
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| /openbmc/u-boot/arch/arm/cpu/arm1136/mx31/ |
| H A D | relocate.S | 3 * relocate - i.MX31-specific vector relocation
11 * The i.MX31 SoC is very specific with respect to exceptions: it
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| H A D | generic.c | 75 printf("mx31 cpu clock: %dMHz\n", cpufreq / 1000000); in mx31_dump_clocks()
211 printf("CPU: Freescale i.MX31 rev %d.%d%s at %d MHz.\n", in print_cpuinfo()
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| /openbmc/u-boot/board/freescale/mx31pdk/ |
| H A D | lowlevel_init.S | 30 /* Set up MX31 DDR pins */
59 /* Set up MX31 DDR Memory Controller */
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| H A D | Kconfig | 13 default "mx31"
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | imx31-clock.yaml | 7 title: Freescale i.MX31 Clock Controller
14 ID in its "clocks" phandle cell. The following is a full list of i.MX31
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| /openbmc/u-boot/include/configs/ |
| H A D | mx31pdk.h | 10 * Configuration settings for the Freescale i.MX31 PDK board.
66 "tftpboot 0x81000000 uImage-mx31; bootm\0" \
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| /openbmc/qemu/hw/arm/ |
| H A D | kzm.c | 13 * i.MX31 SoC
31 * 0x00000000-0x7fffffff See i.MX31 SOC for support
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| H A D | fsl-imx31.c | 4 * i.MX31 SOC emulation.
226 dc->desc = "i.MX31 SOC"; in fsl_imx31_class_init()
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| /openbmc/u-boot/arch/arm/cpu/arm1136/ |
| H A D | Makefile | 9 obj-$(CONFIG_MX31) += mx31/
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| /openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx31-bug.dts | 10 model = "Buglabs i.MX31 Bug 1.x";
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| /openbmc/linux/Documentation/w1/masters/ |
| H A D | mxc-w1.rst | 7 * Freescale MX27, MX31 and probably other i.MX SoCs
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| /openbmc/u-boot/drivers/w1/ |
| H A D | Kconfig | 31 V1: i.MX21, i.MX27, i.MX31, i.MX51
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| /openbmc/linux/Documentation/devicetree/bindings/nvmem/ |
| H A D | imx-iim.yaml | 14 i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and i.MX53 SoCs.
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| /openbmc/u-boot/drivers/watchdog/ |
| H A D | Makefile | 8 ifneq (,$(filter $(SOC), mx25 mx31 mx35 mx5 mx6 mx7 vf610))
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| /openbmc/qemu/include/hw/intc/ |
| H A D | imx_avic.h | 2 * i.MX31 Vectored Interrupt Controller
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| /openbmc/linux/drivers/clocksource/ |
| H A D | timer-imx-gpt.c | 24 * - MX25, MX31, MX35, MX37, MX51, MX6Q(rev1.0)
30 GPT_TYPE_IMX31, /* i.MX31/35/25/37/51/6Q */
51 /* MX31, MX35, MX25, MX5, MX6 */
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