Searched full:msmc (Results 1 – 20 of 20) sorted by relevance
| /openbmc/u-boot/arch/arm/mach-keystone/ |
| H A D | msmc.c | 3 * MSMC controller utilities
10 #include <asm/arch/msmc.h>
60 struct msms_regs *msmc = (struct msms_regs *)KS2_MSMC_CTRL_BASE; in msmc_share_all_segments() local
64 msmc->sms[priv_id][j].mpaxh &= 0xffffff7ful; in msmc_share_all_segments()
65 msmc->ses[priv_id][j].mpaxh &= 0xffffff7ful; in msmc_share_all_segments()
72 struct msms_regs *msmc = (struct msms_regs *)KS2_MSMC_CTRL_BASE; in msmc_map_ses_segment() local
74 msmc->ses[priv_id][ses_pair].mpaxh = src_pfn << 12 | in msmc_map_ses_segment()
76 msmc->ses[priv_id][ses_pair].mpaxl = dst_pfn << 8 | 0x3f; in msmc_map_ses_segment()
81 struct msms_regs *msmc = (struct msms_regs *)KS2_MSMC_CTRL_BASE; in msmc_get_ses_mpax() local
83 *mpax++ = msmc->ses[priv_id][ses_pair].mpaxl; in msmc_get_ses_mpax()
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| H A D | Makefile | 17 obj-y += msmc.o
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| H A D | cmd_clock.c | 135 "listed in official TRM. For instance, to enable MSMC RAM clock\n"
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| H A D | init.c | 12 #include <asm/arch/msmc.h>
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| H A D | ddr3.c | 11 #include <asm/arch/msmc.h>
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| /openbmc/u-boot/arch/arm/mach-keystone/include/mach/ |
| H A D | hardware.h | 218 /* MSMC control */
234 /* KS2 HK/L/E MSMC PRIVIDs for MSMC2 */
262 /* MSMC segment size shift bits */
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| H A D | msmc.h | 3 * MSMC controller
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| /openbmc/linux/drivers/net/ethernet/ti/icssg/ |
| H A D | icssg_switch_map.h | 216 /* 16B for Host Egress MSMC Q (Pre-emptible) context */
228 /* 16B for Host Egress MSMC Q (Express) context */
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| H A D | icssg_prueth.h | 198 * @sram_pool: MSMC RAM pool for buffers
199 * @msmcram: MSMC RAM region
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| H A D | icssg_prueth.c | 1325 /* clear SMEM and MSMC settings for all slices */ in emac_ndo_open()
2086 dev_err(dev, "unable to allocate MSMC resource\n"); in prueth_probe()
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| /openbmc/linux/Documentation/devicetree/bindings/arm/freescale/ |
| H A D | fsl,imx7ulp-pm.yaml | 13 The Multi-System Mode Controller (MSMC) is responsible for sequencing
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| /openbmc/linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am65.dtsi | 59 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
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| H A D | k3-j7200.dtsi | 120 <0x00 0x70000000 0x00 0x70000000 0x00 0x00800000>, /* MSMC RAM */
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| H A D | k3-j721s2.dtsi | 126 <0x00 0x70000000 0x00 0x70000000 0x00 0x00400000>, /* MSMC RAM */
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| H A D | k3-j721e.dtsi | 134 <0x00 0x70000000 0x00 0x70000000 0x00 0x00800000>, /* MSMC RAM */
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| H A D | k3-j784s4.dtsi | 246 <0x00 0x70000000 0x00 0x70000000 0x00 0x00400000>, /* MSMC RAM */
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | ti,icssg-prueth.yaml | 27 phandle to MSMC SRAM node
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| /openbmc/u-boot/board/ti/ks2_evm/ |
| H A D | README | 43 code that will be installed in MSMC SRAM. There is command available
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| /openbmc/linux/drivers/soc/ti/ |
| H A D | knav_qmss_queue.c | 1152 * in MSMC SRAM), the actual memory used is 0x0c000000-0x0c020000, in knav_get_link_ram()
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| /openbmc/linux/ |
| H A D | opengrok0.0.log | [all...] |