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/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Dloongson,rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/loongson,rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Real-Time Clock
10 The Loongson family chips use an on-chip counter 0 (Time Of Year
14 - Binbin Zhou <zhoubinbin@loongson.cn>
17 - $ref: rtc.yaml#
22 - enum:
23 - loongson,ls1b-rtc
[all …]
/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dloongson,ls2k-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/loongson,ls2k-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Thermal sensors on Loongson-2 SoCs
10 - zhanghongchen <zhanghongchen@loongson.cn>
11 - Yinbo Zhu <zhuyinbo@loongson.cn>
14 - $ref: /schemas/thermal/thermal-sensor.yaml#
19 - enum:
20 - loongson,ls2k1000-thermal
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/openbmc/linux/Documentation/devicetree/bindings/soc/loongson/
H A Dloongson,ls2k-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 Power Manager controller
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
15 - items:
16 - const: loongson,ls2k0500-pmc
17 - const: syscon
18 - items:
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dloongson,liointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Local I/O Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips and
14 Loongson-2K1000 chip, as the primary package interrupt controller which
18 - $ref: /schemas/interrupt-controller.yaml#
23 - loongson,liointc-1.0
[all …]
H A Dloongson,pch-msi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PCH MSI Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson LS7A family of PCH for
19 const: loongson,pch-msi-1.0
22 maxItems: 1
24 loongson,msi-base-vec:
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H A Dloongson,eiointc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson Extended I/O Interrupt Controller
10 - Binbin Zhou <zhoubinbin@loongson.cn>
13 This interrupt controller is found on the Loongson-3 family chips and
14 Loongson-2K series chips and is used to distribute interrupts directly to
18 - $ref: /schemas/interrupt-controller.yaml#
23 - loongson,ls2k0500-eiointc
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H A Dloongson,pch-pic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PCH PIC Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson LS7A family of PCH for
14 transforming interrupts from on-chip devices into HyperTransport vectorized
19 const: loongson,pch-pic-1.0
22 maxItems: 1
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H A Dloongson,ls1x-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,ls1x-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 Interrupt Controller
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 Loongson-1 interrupt controller is connected to the MIPS core interrupt
18 const: loongson,ls1x-intc
21 maxItems: 1
23 interrupt-controller: true
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H A Dloongson,htpic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 - $ref: /schemas/interrupt-controller.yaml#
16 This interrupt controller is found in the Loongson-3 family of chips to transmit
21 const: loongson,htpic-1.0
24 maxItems: 1
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H A Dloongson,htvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Vector Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips for
18 const: loongson,htvec-1.0
21 maxItems: 1
24 minItems: 1
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/openbmc/linux/Documentation/devicetree/bindings/mips/loongson/
H A Ddevices.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mips/loongson/devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson based Platforms
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
12 Devices with a Loongson CPU shall have the following properties.
20 - description: Classic Loongson64 Quad Core + LS7A
22 - const: loongson,loongson64c-4core-ls7a
24 - description: Classic Loongson64 Quad Core + RS780E
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H A Dls2k-reset.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mips/loongson/ls2k-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson 2K1000 PM Controller
10 - Qing Zhang <zhangqing@loongson.cn>
13 This controller can be found in Loongson-2K1000 Soc systems.
17 const: loongson,ls2k-pm
20 maxItems: 1
23 - compatible
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H A Drs780e-acpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mips/loongson/rs780e-acpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson RS780E PCH ACPI Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This controller can be found in Loongson-3 systems with RS780E PCH.
17 const: loongson,rs780e-acpi
20 maxItems: 1
23 - compatible
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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dloongson,ls2k-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/loongson,ls2k-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 SoC Clock Control Module
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
13 Loongson-2 SoC clock control module is an integrated clock controller, which
19 - loongson,ls2k-clk
22 maxItems: 1
26 - description: 100m ref
[all …]
H A Dloongson,ls1x-clk.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/loongson,ls1x-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 Clock Controller
10 - Keguang Zhang <keguang.zhang@gmail.com>
15 - loongson,ls1b-clk
16 - loongson,ls1c-clk
19 maxItems: 1
22 maxItems: 1
[all …]
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dloongson,ls2k-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/loongson,ls2k-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson SPI controller
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - enum:
19 - loongson,ls2k1000-spi
20 - items:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dloongson,ls-audio-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/loongson,ls-audio-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson 7axxx/2kxxx ASoC audio sound card driver
10 - Yingkun Meng <mengyingkun@loongson.cn>
13 The binding describes the sound card present in loongson
15 which uses Loongson I2S controller to transfer the audio data.
19 const: loongson,ls-audio-card
25 mclk-fs:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dloongson,ls1x-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/loongson,ls1x-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 Watchdog Timer
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 - $ref: watchdog.yaml#
18 - loongson,ls1b-wdt
19 - loongson,ls1c-wdt
22 maxItems: 1
[all …]
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dloongson,ls1x-pwmtimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/loongson,ls1x-pwmtimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-1 PWM timer
10 - Keguang Zhang <keguang.zhang@gmail.com>
13 Loongson-1 PWM timer can be used for system clock source
18 const: loongson,ls1b-pwmtimer
21 maxItems: 1
24 maxItems: 1
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dloongson.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/loongson.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson PCI Host Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 PCI host controller found on Loongson PCHs and SoCs.
16 - $ref: /schemas/pci/pci-bus.yaml#
21 - loongson,ls2k-pci
22 - loongson,ls7a-pci
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dloongson,ls2x-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/loongson,ls2x-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson LS2X I2C Controller
10 - Binbin Zhou <zhoubinbin@loongson.cn>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
18 - loongson,ls2k-i2c
19 - loongson,ls7a-i2c
22 maxItems: 1
[all …]
/openbmc/linux/Documentation/devicetree/bindings/hwinfo/
H A Dloongson,ls2k-chipid.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwinfo/loongson,ls2k-chipid.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 SoC ChipID
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
13 Loongson-2 SoC contains many groups of global utilities register
19 const: loongson,ls2k-chipid
22 maxItems: 1
24 little-endian: true
[all …]
/openbmc/linux/drivers/pci/controller/
H A Dpci-loongson.c1 // SPDX-License-Identifier: GPL-2.0
3 * Loongson PCI Host Controller Driver
12 #include <linux/pci-acpi.h>
13 #include <linux/pci-ecam.h>
39 #define FLAG_CFG1 BIT(1)
58 dev->class = PCI_CLASS_BRIDGE_PCI_NORMAL; in bridge_class_quirk()
73 pdev->mmio_always_on = 1; in system_bus_quirk()
74 pdev->non_compliant_bars = 1; in system_bus_quirk()
84 * Some Loongson PCIe ports have hardware limitations on their Maximum Read
87 * bridges. However, some MIPS Loongson firmware doesn't set MRRS properly,
[all …]
/openbmc/linux/arch/loongarch/kernel/
H A Dcpu-probe.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
16 #include <asm/cpu-features.h>
20 #include <asm/pgtable-bits.h>
34 fcsr = c->fpu_csr0; in cpu_set_fpu_fcsr_mask()
52 c->fpu_mask = ~(fcsr0 ^ fcsr1) & ~mask; in cpu_set_fpu_fcsr_mask()
68 c->pabits = (read_cpucfg(LOONGARCH_CPUCFG1) & CPUCFG1_PABITS) >> 4; in cpu_probe_addrbits()
69 c->vabits = (read_cpucfg(LOONGARCH_CPUCFG1) & CPUCFG1_VABITS) >> 12; in cpu_probe_addrbits()
70 vm_map_base = 0UL - (1UL << c->vabits); in cpu_probe_addrbits()
78 c->isa_level |= LOONGARCH_CPU_ISA_LA64; in set_isa()
[all …]
/openbmc/linux/Documentation/arch/loongarch/
H A Dintroduction.rst1 .. SPDX-License-Identifier: GPL-2.0
7 LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are
8 currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit
9 version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels
22 ----
24 LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32
25 and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers
26 are not architecturally special. (Except ``$r1``, which is hard-wired as the
30 the LoongArch ELF psABI spec, in :ref:`References <loongarch-references>`:
40 ``$r4``-``$r11`` ``$a0``-``$a7`` Argument registers No
[all …]

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