| /openbmc/linux/Documentation/devicetree/bindings/display/ |
| H A D | st,stm32-ltdc.yaml | 4 $id: http://devicetree.org/schemas/display/st,stm32-ltdc.yaml#
15 const: st,stm32-ltdc
40 ltdc has one video port with up to 2 endpoints:
61 ltdc: display-controller@40016800 {
62 compatible = "st,stm32-ltdc";
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| H A D | st,stm32-dsi.yaml | 58 DSI input port node, connected to the ltdc rgb output port.
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| /openbmc/u-boot/drivers/video/stm32/ |
| H A D | stm32_ltdc.c | 29 /* LTDC main registers */
49 /* LTDC layer 1 registers */
83 #define GCR_LTDCEN BIT(0) /* LTDC ENable */
183 debug("%s: %d bpp -> ltdc pf %d\n", __func__, VNBITS(l2bpp), pf); in stm32_ltdc_get_pixel_format()
207 /* Reload configuration immediately & enable LTDC */ in stm32_ltdc_enable()
220 /* Convert video timings to ltdc timings */ in stm32_ltdc_set_mode()
340 debug("%s: ltdc dt register address error\n", __func__); in stm32_ltdc_probe()
359 debug("%s: missing ltdc hardware reset\n", __func__); in stm32_ltdc_probe()
414 /* Configure & start LTDC */ in stm32_ltdc_probe()
441 { .compatible = "st,stm32-ltdc" },
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| /openbmc/linux/drivers/gpu/drm/stm/ |
| H A D | drv.c | 30 #include "ltdc.h"
238 { .compatible = "st,stm32-ltdc"},
260 MODULE_DESCRIPTION("STMicroelectronics ST DRM LTDC driver");
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| H A D | Makefile | 4 ltdc.o
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| H A D | ltdc.c | 43 #include "ltdc.h"
126 #define GCR_LTDCEN BIT(0) /* LTDC ENable */
816 /* immediately commit disable of layers before switching off LTDC */ in ltdc_crtc_atomic_disable()
956 /* Convert video timings to ltdc timings */ in ltdc_crtc_mode_set_nofb()
1487 DRM_WARN("ltdc transfer error: %d\n", ldev->transfer_err); in ltdc_plane_atomic_update()
1493 DRM_WARN("ltdc fifo underrun: please verify display mode\n"); in ltdc_plane_atomic_update()
1498 DRM_WARN("ltdc fifo underrun: please verify display mode\n"); in ltdc_plane_atomic_update()
1713 /* Disable LTDC */ in ltdc_encoder_disable()
1731 /* Enable LTDC */ in ltdc_encoder_enable()
1976 DRM_ERROR("Unable to get ltdc registers\n"); in ltdc_load()
[all …]
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | stm32f746.dtsi | 335 ltdc: display-controller@40016800 { label
336 compatible = "st,stm32-ltdc";
338 resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
339 clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
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| H A D | stm32f746-disco.dts | 219 ltdc_pins: ltdc@0 {
319 <dc {
|
| H A D | stm32f429.dtsi | 587 ltdc: display-controller@40016800 { label
588 compatible = "st,stm32-ltdc";
591 resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
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| H A D | stm32429i-eval.dts | 189 <dc {
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | st,stm32mp1-rcc.yaml | 38 For example on STM32MP1, for LTDC reset:
39 ltdc = APB4_RSTSETR_offset / 4 * 32 + LTDC_bit_offset
|
| /openbmc/linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts | 78 <dc {
91 ltdc_pins: ltdc-0 {
|
| H A D | stm32f429-disco.dts | 156 <dc {
194 /* Connect panel-ilitek-9341 to ltdc */
|
| H A D | stm32mp157c-dk2.dts | 73 <dc {
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| H A D | stm32mp157a-icore-stm32mp1-edimm2.2.dts | 94 <dc {
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| H A D | stm32mp157a-icore-stm32mp1-ctouch2-of10.dts | 94 <dc {
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| H A D | stm32f746.dtsi | 557 ltdc: display-controller@40016800 { label
558 compatible = "st,stm32-ltdc";
561 resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
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| H A D | stm32h743.dtsi | 353 ltdc: display-controller@50001000 { label
354 compatible = "st,stm32-ltdc";
357 resets = <&rcc STM32H7_APB3_RESET(LTDC)>;
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| H A D | stm32f429.dtsi | 670 ltdc: display-controller@40016800 { label
671 compatible = "st,stm32-ltdc";
674 resets = <&rcc STM32F4_APB2_RESET(LTDC)>;
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| H A D | stm32f746-disco.dts | 151 <dc {
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| H A D | stm32f469-disco.dts | 178 <dc {
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| H A D | stm32mp157c-lxa-mc1.dts | 157 <dc {
|
| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_stm32f.c | 208 * Configure the SAI PLL to generate LTDC pixel clock and in configure_clocks()
479 /* particular case for LTDC clock */ in stm32_clk_get_rate()
480 case STM32F7_APB2_CLOCK(LTDC): in stm32_clk_get_rate()
508 /* Only set_rate for LTDC clock is implemented */ in stm32_set_rate()
509 if (clk->id != STM32F7_APB2_CLOCK(LTDC)) { in stm32_set_rate()
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | stm32mp1-clks.h | 69 #define LTDC 56 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | stm32mp1-clks.h | 69 #define LTDC 56 macro
|