| /openbmc/qemu/hw/i386/kvm/ |
| H A D | xen_primary_console.c | 9 * See the COPYING file in the top-level directory. 31 #define TYPE_XEN_PRIMARY_CONSOLE "xen-primary-console" 60 memory_region_init_ram(&s->console_page, OBJECT(dev), "xen:console_page", in xen_primary_console_realize() 62 memory_region_set_enabled(&s->console_page, true); in xen_primary_console_realize() 63 s->cp = memory_region_get_ram_ptr(&s->console_page); in xen_primary_console_realize() 64 memset(s->cp, 0, XEN_PAGE_SIZE); in xen_primary_console_realize() 70 static void xen_primary_console_class_init(ObjectClass *klass, const void *data) in xen_primary_console_class_init() argument 74 dc->realize = xen_primary_console_realize; in xen_primary_console_class_init() 87 DeviceState *dev = sysbus_create_simple(TYPE_XEN_PRIMARY_CONSOLE, -1, NULL); in xen_primary_console_create() 112 return s->guest_port; in type_init() [all …]
|
| /openbmc/qemu/docs/specs/ |
| H A D | spdm.rst | 2 QEMU Security Protocols and Data Models (SPDM) Support 18 SPDM-Utils 19 ---------- 23 SPDM-Utils is a Linux applications to manage, test and develop devices 24 supporting DMTF Security Protocol and Data Model (SPDM). It is written in Rust 27 To use SPDM-Utils you will need to do the following steps. Details are included 28 in the SPDM-Utils README. 34 spdm-emu 35 -------- 40 .. code-block:: shell [all …]
|
| /openbmc/openbmc/meta-openembedded/meta-networking/recipes-connectivity/vpnc/vpnc/ |
| H A D | long-help | 1 Usage: vpnc [--version] [--print-config] [--help] [--long-help] [options] [config files] 4 --gateway <ip/hostname> 6 conf-variable: IPSec gateway <ip/hostname> 8 --id <ASCII string> 10 conf-variable: IPSec ID <ASCII string> 14 conf-variable: IPSec secret <ASCII string> 18 conf-variable: IPSec obfuscated secret <hex string> 20 --username <ASCII string> 22 conf-variable: Xauth username <ASCII string> 26 conf-variable: Xauth password <ASCII string> [all …]
|
| /openbmc/docs/ |
| H A D | glossary.md | 5 - Include terms specific to the OpenBMC project, OpenBMC reference platforms 7 - Include terms needed to disambiguate. For example, "image" may refer to a 9 - Treat acronyms the same as terms. 11 BMC - Baseboard management controller. A device designed to enable remote out of 14 D-Bus - Provides the primary mechanisms for inter-process communication with an 15 OpenBMC system. OpenBMC D-Bus APIs are documented in 16 `https://github.com/openbmc/phosphor-dbus-interfaces`. For example, see the tree 19 IPMI - Intelligent Platform Management Interface. OpenBMC implements a subset of 22 ODM - Original design manufacturer. In OpenBMC, ODM generally refers to the 25 OEM - Original equipment manufacturer. In OpenBMC, OEM generally refers to the [all …]
|
| /openbmc/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | sama5d2.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Chip-specific header file for the SAMA5D2 SoC 26 #define ATMEL_ID_TDES 11 /* Triple Data Encryption Standard */ 29 #define ATMEL_ID_MATRIX1 14 /* H32MX, 32-bit AHB Matrix */ 30 #define ATMEL_ID_MATRIX0 15 /* H64MX, 64-bit AHB Matrix */ 32 #define ATMEL_ID_HSMC 17 /* Multi-bit ECC interrupt */ 44 #define ATMEL_ID_TWIHS0 29 /* Two-wire Interface 0 */ 45 #define ATMEL_ID_TWIHS1 30 /* Two-wire Interface 1 */ 46 #define ATMEL_ID_SDMMC0 31 /* Secure Data Memory Card Controller 0 */ 47 #define ATMEL_ID_SDMMC1 32 /* Secure Data Memory Card Controller 1 */ [all …]
|
| /openbmc/qemu/include/hw/misc/ |
| H A D | mips_itu.h | 2 * Inter-Thread Communication Unit emulation. 26 #define TYPE_MIPS_ITU "mips-itu" 36 uint8_t FIFO; /* 1 - FIFO cell, 0 - Semaphore cell */ 46 uint64_t data[ITC_CELL_DEPTH]; member
|
| /openbmc/u-boot/include/ |
| H A D | fsl_dtsec.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Copyright 2009-2011 Freescale Semiconductor, Inc. 30 u32 ipgifg; /* inter-packet/inter-frame gap */ 31 u32 hafdup; /* half-duplex control */ 121 /* IEVENT - interrupt events register */ 136 #define IEVENT_TDPE 0x00000002 /* Internal data parity error on Tx */ 137 #define IEVENT_RDPE 0x00000001 /* Internal data parity error on Rx */ 141 /* IMASK - interrupt mask register */ 156 #define IMASK_TDPEEN 0x00000002 /* Internal data parity error on Tx enable */ 157 #define IMASK_RDPEEN 0x00000001 /* Internal data parity error on Rx enable */ [all …]
|
| H A D | fsl_tgec.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * Copyright 2009-2011 Freescale Semiconductor, Inc. 17 u32 mac_addr_0; /* Lower 32 bits of 48-bit MAC address */ 18 u32 mac_addr_1; /* Upper 16 bits of 48-bit MAC address */ 25 u32 tx_ipg_length; /* Transmitter inter-packet-gap register */ 26 u32 mac_addr_2; /* Lower 32 bits of the 2nd 48-bit MAC addr */ 27 u32 mac_addr_3; /* Upper 16 bits of the 2nd 48-bit MAC addr */ 104 /* EC10G_ID - 10-gigabit ethernet MAC controller ID */ 109 /* COMMAND_CONFIG - command and configuration register */ 128 /* HASHTABLE_CTRL - Hashtable control register */ [all …]
|
| H A D | tsec.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 34 (TSEC_BASE_ADDR + (((num) - 1) * (offset))) 41 (CONFIG_SYS_MDIO_BASE_ADDR + ((num) - 1) * (offset)) 216 u32 tr64; /* Tx/Rx 64-byte Frame Counter */ 217 u32 tr127; /* Tx/Rx 65-127 byte Frame Counter */ 218 u32 tr255; /* Tx/Rx 128-255 byte Frame Counter */ 219 u32 tr511; /* Tx/Rx 256-511 byte Frame Counter */ 220 u32 tr1k; /* Tx/Rx 512-1023 byte Frame Counter */ 221 u32 trmax; /* Tx/Rx 1024-1518 byte Frame Counter */ 222 u32 trmgv; /* Tx/Rx 1519-1522 byte Good VLAN Frame */ [all …]
|
| H A D | fsl_memac.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 4 * Roy Zang <tie-fei.zang@freescale.com> 16 u32 mac_addr_0; /* Lower 32 bits of 48-bit MAC address */ 17 u32 mac_addr_1; /* Upper 16 bits of 48-bit MAC address */ 23 u32 tx_ipg_length; /* Transmitter inter-packet-gap register */ 27 u32 cl_pause_quanta[4]; /* CL01-CL67 pause quanta register */ 28 u32 cl_pause_thresh[4]; /* CL01-CL67 pause thresh register */ 157 /* COMMAND_CONFIG - command and configuration register */ 163 /* HASHTABLE_CTRL - Hashtable control register */ 167 /* TX_IPG_LENGTH - Transmit inter-packet gap length register */ [all …]
|
| /openbmc/u-boot/board/ms7750se/ |
| H A D | lowlevel_init.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 modified from SH-IPL+g 17 #define BCR2_D_VALUE 0x2FFC /* Area 1-6 width: 32/32/32/32/32/16 */ 26 #define WCR3_D_VALUE 0x01777771 /* A6: 0-1 A5: 1-3 A4: 1-3 A3: 1-3 27 A2: 1-3 A1: 1-3 A0: 0-1 */ 28 #define RTCOR_D_VALUE 0xA50D /* Write code A5, data 0D (~15us?) */ 29 #define SDMR3_ADDRESS 0xFF940088 /* SDMR3 address on 32-bit bus */ 30 #define MCR_D1_VALUE 0x100901B4 /* SDRAM 32-bit, CAS/RAS Refresh, .. */ 33 #define BCR2_D_VALUE 0x2E3C /* Area 1-6 width: 32/32/64/16/32/16 */ 37 #define WCR3_D_VALUE 0x01717771 /* A6: 0-1 A5: 1-3 A4: 0-1 A3: 1-3 [all …]
|
| /openbmc/qemu/hw/sh4/ |
| H A D | sh7750_regs.h | 2 * SH-7750 memory-mapped registers 6 * Document Number ADE-602-124C, Rev. 4.0, 4/21/00, Hitachi Ltd. 8 * Copyright (C) 2001 OKTET Ltd., St.-Petersburg, Russia 42 * All register has 2 addresses: in 0xff000000 - 0xffffffff (P4 address) and 43 * in 0x1f000000 - 0x1fffffff (area 7 address) 55 /* Page Table Entry High register - PTEH */ 64 /* Page Table Entry Low register - PTEL */ 70 #define SH7750_PTEL_V 0x00000100 /* Validity (0-entry is invalid) */ 73 #define SH7750_PTEL_SZ_1KB 0x00000000 /* 1-kbyte page */ 74 #define SH7750_PTEL_SZ_4KB 0x00000010 /* 4-kbyte page */ [all …]
|
| /openbmc/openbmc/poky/meta/classes-global/ |
| H A D | package_pkgdata.bbclass | 4 # SPDX-License-Identifier: MIT 7 WORKDIR_PKGDATA = "${WORKDIR}/pkgdata-sysroot" 21 … for manifest in glob.glob(d.expand("${SSTATE_MANIFESTS}/manifest-%s-*.packagedata" % pkgarch)): 47 # Detect bitbake -b usage 56 data = taskdepdata[dep] 57 if data[1] == mytaskname and data[0] == pn: 67 # condensed to inter-sstate task dependencies, similar to that used by setscene 85 # Create collapsed do_populate_sysroot -> do_populate_sysroot tree 87 data = setscenedeps[dep] 88 if data[1] not in sstatetasks: [all …]
|
| /openbmc/qemu/include/hw/xen/interface/io/ |
| H A D | xs_wire.h | 1 /* SPDX-License-Identifier: MIT */ 87 uint32_t len; /* Length of data following this. */ 89 /* Generally followed by nul-terminated string(s). */ 101 * Inter-domain shared memory communications. */ 104 #define MASK_XENSTORE_IDX(idx) ((idx) & (XENSTORE_RING_SIZE-1)) 128 #define XENSTORE_CONNECTED 0 /* the steady-state */ 142 * c-file-style: "BSD" 143 * c-basic-offset: 4 144 * tab-width: 4 145 * indent-tabs-mode: nil
|
| /openbmc/openbmc/poky/bitbake/ |
| H A D | ChangeLog | 2 - Add PE (Package Epoch) support from Philipp Zabel (pH5) 3 - Treat python functions the same as shell functions for logging 4 - Use TMPDIR/anonfunc as a __anonfunc temp directory (T) 5 - Catch truncated cache file errors 6 - Allow operations other than assignment on flag variables 7 - Add code to handle inter-task dependencies 8 - Fix cache errors when generation dotGraphs 9 - Make sure __inherit_cache is updated before calling include() (from Michael Krelin) 10 - Fix bug when target was in ASSUME_PROVIDED (#2236) 11 - Raise ParseError for filenames with multiple underscores instead of infinitely looping (#2062) [all …]
|
| /openbmc/u-boot/drivers/usb/host/ |
| H A D | ohci-hcd.c | 1 // SPDX-License-Identifier: GPL-2.0+ 16 * (C) Copyright 2000-2002 David Brownell 19 * ebenard@eukrea.com - based on s3c24x0's driver 23 * 1 - Read doc/README.generic_usb_ohci 24 * 2 - this driver is intended for use with USB Mass Storage Devices 26 * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG 146 /* Data Togg */ USB_ST_CRC_ERR, 148 /* DevNotResp */ -1, 153 /* reservd */ -1, 154 /* reservd */ -1, [all …]
|
| /openbmc/qemu/docs/devel/ |
| H A D | multiple-iothreads.rst | 5 Copyright (c) 2014-2017 Red Hat Inc. 8 the COPYING file in the top-level directory. 15 --------------------------------- 16 QEMU is an event-driven program that can do several things at once using an 21 The default event loop is called the main loop (see ``main-loop.c``). It is 23 ``-object iothread,id=my-iothread``. 30 ------------------------------ 39 QEMU's code historically was not thread-safe. 45 The experimental ``virtio-blk`` data-plane implementation has been benchmarked and 49 .. _how-to-program: [all …]
|
| /openbmc/docs/designs/ |
| H A D | estoraged.md | 1 # eStoraged Design - Encrypted Secondary Storage Management Daemon 7 - John Broadbent <jebr@google.com> 8 - Benjamin Fair <benjaminfair@google.com> 9 - Nancy Yuenn <yuenn@google.com> 16 encapsulating the security functionality and providing a D-Bus interface to 17 manage the encrypted filesystem on the device. Using the D-Bus interface, other 30 uses the [dm-crypt](https://en.wikipedia.org/wiki/Dm-crypt) kernel subsystem. 31 Dm-crypt provides the encryption and device mapping capability, and Cryptsetup 34 change the password without re-encrypting the entire device. 41 [JEDEC standard JESD84-B51A](https://www.jedec.org/document_search?search_api_views_fulltext=jesd84… [all …]
|
| /openbmc/qemu/hw/mips/ |
| H A D | cps.c | 25 #include "hw/qdev-clock.h" 26 #include "hw/qdev-properties.h" 32 assert(pin_number < s->num_irq); in get_cps_irq() 33 return s->gic.irq_state[pin_number].irq; in get_cps_irq() 41 s->clock = qdev_init_clock_in(DEVICE(obj), "clk-in", NULL, NULL, 0); in mips_cps_init() 46 memory_region_init(&s->container, obj, "mips-cps-container", UINT64_MAX); in mips_cps_init() 47 sysbus_init_mmio(sbd, &s->container); in mips_cps_init() 60 bool is_mt = (env->CP0_Config5 & (1 << CP0C5_VP)) || ase_mt_available(env); in cpu_mips_itu_supported() 71 if (!clock_get(s->clock)) { in mips_cps_realize() 76 for (int i = 0; i < s->num_vp; i++) { in mips_cps_realize() [all …]
|
| /openbmc/qemu/qapi/ |
| H A D | misc-i386.json | 1 # -*- Mode: Python -*- 4 # SPDX-License-Identifier: GPL-2.0-or-later 7 # @rtc-reset-reinjection: 11 # guest agent's `guest-set-time` command. 19 # .. qmp-example:: 21 # -> { "execute": "rtc-reset-reinjection" } 22 # <- { "return": {} } 24 { 'command': 'rtc-reset-reinjection' } 29 # An enumeration of SEV state information used during `query-sev`. 33 # @launch-update: The guest is currently being launched; plaintext [all …]
|
| /openbmc/openbmc/poky/bitbake/doc/bitbake-user-manual/ |
| H A D | bitbake-user-manual-metadata.rst | 1 .. SPDX-License-Identifier: CC-BY-2.5 20 ---------------------- 53 ---------------------------- 58 - Customize a recipe that uses the variable. 60 - Change a variable's default value used in a ``*.bbclass`` file. 62 - Change the variable in a ``*.bbappend`` file to override the variable 65 - Change the variable in a configuration file so that the value 80 - For configuration changes, use the following:: 82 $ bitbake -e 94 - To find changes to a given variable in a specific recipe, use the [all …]
|
| H A D | bitbake-user-manual-intro.rst | 1 .. SPDX-License-Identifier: CC-BY-2.5 23 working within complex inter-task dependency constraints. One of 25 Linux software stacks using a task-oriented approach. 30 - BitBake executes tasks according to the provided metadata that builds up 37 - BitBake includes a fetcher library for obtaining source code from 41 - The instructions for each unit to be built (e.g. a piece of software) 46 - BitBake includes a client/server abstraction and can be used from a 47 command line or used as a service over XML-RPC and has several 58 - BitBake, a generic task executor 60 - OpenEmbedded, a metadata set utilized by BitBake [all …]
|
| /openbmc/qemu/hw/misc/ |
| H A D | mips_itu.c | 2 * Inter-Thread Communication Unit emulation. 27 #include "hw/qdev-properties.h" 73 return &itu->tag_io; in mips_itu_get_tag_region() 86 return tag->ITCAddressMap[index]; in itc_tag_read() 91 uint64_t *am = &tag->ITCAddressMap[0]; in itc_reconfigure() 92 MemoryRegion *mr = &tag->storage_io; in itc_reconfigure() 98 if (!(size & (size - 1))) { in itc_reconfigure() 107 uint64_t data, unsigned size) in itc_tag_write() argument 110 uint64_t *am = &tag->ITCAddressMap[0]; in itc_tag_write() 127 am[index] = (data & mask) | (am_old & ~mask); in itc_tag_write() [all …]
|
| H A D | ivshmem-pci.c | 2 * Inter-VM Shared Memory PCI device. 16 * Contributions after 2012-01-13 are licensed under the terms of the 25 #include "hw/qdev-properties.h" 26 #include "hw/qdev-properties-system.h" 32 #include "qemu/error-report.h" 36 #include "chardev/char-fe.h" 60 #define TYPE_IVSHMEM_COMMON "ivshmem-common" 65 #define TYPE_IVSHMEM_PLAIN "ivshmem-plain" 69 #define TYPE_IVSHMEM_DOORBELL "ivshmem-doorbell" 122 /* registers for the Inter-VM shared memory device */ [all …]
|
| /openbmc/dbus-sensors/src/nvme/ |
| H A D | NVMeBasicContext.cpp | 17 #include <phosphor-logging/lg2.hpp> 18 #include <phosphor-logging/lg2/flags.hpp> 42 #include <linux/i2c-dev.h> 46 * NVMe-MI Basic Management Command 48 …* https://nvmexpress.org/wp-content/uploads/NVMe_Management_-_Technical_Note_on_Basic_Management_C… 63 memcpy(command->data(), &busle, sizeof(busle)); in encodeBasicQuery() 75 memcpy(&busle, req.data(), sizeof(busle)); in decodeBasicQuery() 85 std::filesystem::path devpath = "/dev/i2c-" + std::to_string(bus); in execBasicQuery() 92 // NOLINTNEXTLINE(cppcoreguidelines-pro-type-vararg) in execBasicQuery() 93 if (::ioctl(fileHandle.handle(), I2C_SLAVE, addr) == -1) in execBasicQuery() [all …]
|