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/openbmc/linux/drivers/irqchip/
H A DMakefile4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
13 obj-$(CONFIG_FARADAY_FTINTC010) += irq-ftintc010.o
14 obj-$(CONFIG_ARCH_HIP04) += irq-hip04.o
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/openbmc/linux/drivers/misc/ocxl/
H A Dafu_irq.c35 struct afu_irq *irq; in ocxl_irq_set_handler() local
39 irq = idr_find(&ctx->irq_idr, irq_id); in ocxl_irq_set_handler()
40 if (!irq) { in ocxl_irq_set_handler()
45 irq->handler = handler; in ocxl_irq_set_handler()
46 irq->private = private; in ocxl_irq_set_handler()
47 irq->free_private = free_private; in ocxl_irq_set_handler()
60 struct afu_irq *irq = (struct afu_irq *) data; in afu_irq_handler() local
64 if (irq->handler) in afu_irq_handler()
65 return irq->handler(irq->private); in afu_irq_handler()
70 static int setup_afu_irq(struct ocxl_context *ctx, struct afu_irq *irq) in setup_afu_irq() argument
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/openbmc/linux/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
H A Dirq_public.h22 /*! Read the control registers of IRQ[ID]
24 \param ID[in] IRQ identifier
25 \param state[out] irq controller state structure
27 \return none, state = IRQ[ID].state
32 /*! Write to a control register of IRQ[ID]
34 \param ID[in] IRQ identifier
38 \return none, IRQ[ID].ctrl[reg] = value
45 /*! Read from a control register of IRQ[ID]
47 \param ID[in] IRQ identifier
51 \return IRQ[ID].ctrl[reg]
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/openbmc/linux/arch/arm64/kvm/vgic/
H A Dvgic.c7 #include <linux/irq.h>
58 * matching interrupt ID and return a reference to the IRQ structure.
63 struct vgic_irq *irq = NULL; in vgic_get_lpi() local
68 list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { in vgic_get_lpi()
69 if (irq->intid != intid) in vgic_get_lpi()
74 * call vgic_put_irq() later once it's finished with the IRQ. in vgic_get_lpi()
76 vgic_get_irq_kref(irq); in vgic_get_lpi()
79 irq = NULL; in vgic_get_lpi()
84 return irq; in vgic_get_lpi()
90 * to call vgic_put_irq() once it's finished with this IRQ.
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H A Dvgic-mmio.c9 #include <linux/irq.h>
53 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_read_group() local
55 if (irq->group) in vgic_mmio_read_group()
58 vgic_put_irq(vcpu->kvm, irq); in vgic_mmio_read_group()
64 static void vgic_update_vsgi(struct vgic_irq *irq) in vgic_update_vsgi() argument
66 WARN_ON(its_prop_update_vsgi(irq->host_irq, irq->priority, irq->group)); in vgic_update_vsgi()
77 struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i); in vgic_mmio_write_group() local
79 raw_spin_lock_irqsave(&irq->irq_lock, flags); in vgic_mmio_write_group()
80 irq->group = !!(val & BIT(i)); in vgic_mmio_write_group()
81 if (irq->hw && vgic_irq_is_sgi(irq->intid)) { in vgic_mmio_write_group()
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/openbmc/linux/drivers/acpi/
H A Dpci_link.c10 * 1. Support more than one IRQ resource entry per link device (index).
12 * for IRQ management (e.g. start()->_SRS).
28 #include <linux/irq.h>
53 * later even the link is disable. Instead, we just repick the active irq
56 u32 active; /* Current IRQ */
69 struct acpi_pci_link_irq irq; member
97 struct acpi_resource_irq *p = &resource->data.irq; in acpi_pci_link_check_possible()
100 "Blank _PRS IRQ resource\n"); in acpi_pci_link_check_possible()
108 "Invalid _PRS IRQ %d\n", in acpi_pci_link_check_possible()
112 link->irq.possible[i] = p->interrupts[i]; in acpi_pci_link_check_possible()
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/openbmc/u-boot/arch/x86/lib/
H A Dinterrupts.c47 void irq_install_handler(int irq, interrupt_handler_t *handler, void *arg) in irq_install_handler() argument
51 if (irq < 0 || irq >= SYS_NUM_IRQS) { in irq_install_handler()
52 printf("irq_install_handler: bad irq number %d\n", irq); in irq_install_handler()
56 if (irq_handlers[irq].handler != NULL) in irq_install_handler()
59 (ulong) irq_handlers[irq].handler); in irq_install_handler()
63 irq_handlers[irq].handler = handler; in irq_install_handler()
64 irq_handlers[irq].arg = arg; in irq_install_handler()
65 irq_handlers[irq].count = 0; in irq_install_handler()
68 unmask_irq(irq); in irq_install_handler()
76 void irq_free_handler(int irq) in irq_free_handler() argument
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H A Dpirq_routing.c17 u8 irq = 0; in pirq_get_next_free_irq() local
19 /* IRQ sharing starts from IRQ#3 */ in pirq_get_next_free_irq()
21 /* Can we assign this IRQ? */ in pirq_get_next_free_irq()
25 /* We can, now let's assume we can use this IRQ */ in pirq_get_next_free_irq()
26 irq = i; in pirq_get_next_free_irq()
29 if (irq_already_routed[irq]) in pirq_get_next_free_irq()
33 if (pirq_check_irq_routed(dev, link, irq)) { in pirq_get_next_free_irq()
34 irq_already_routed[irq] = true; in pirq_get_next_free_irq()
40 if (!irq_already_routed[irq]) { in pirq_get_next_free_irq()
41 irq_already_routed[irq] = true; in pirq_get_next_free_irq()
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/openbmc/linux/arch/x86/include/asm/trace/
H A Dirq_vectors.h61 * irq_work - called when entering/exiting a irq work interrupt
128 TP_PROTO(unsigned int irq, unsigned int vector,
131 TP_ARGS(irq, vector, cpu, apicdest),
134 __field( unsigned int, irq )
141 __entry->irq = irq;
147 TP_printk("irq=%u vector=%u cpu=%u apicdest=0x%08x",
148 __entry->irq, __entry->vector, __entry->cpu,
154 TP_PROTO(unsigned int irq, unsigned int vector,
158 TP_ARGS(irq, vector, cpu, prev_vector, prev_cpu),
161 __field( unsigned int, irq )
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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dpci_irq.c144 /* mlx5_system_free_irq - Free an IRQ
145 * @irq: IRQ to free
147 * Free the IRQ and other resources such as rmap from the system.
153 static void mlx5_system_free_irq(struct mlx5_irq *irq) in mlx5_system_free_irq() argument
155 struct mlx5_irq_pool *pool = irq->pool; in mlx5_system_free_irq()
164 irq_update_affinity_hint(irq->map.virq, NULL); in mlx5_system_free_irq()
168 irq_cpu_rmap_remove(rmap, irq->map.virq); in mlx5_system_free_irq()
171 free_irq(irq->map.virq, &irq->nh); in mlx5_system_free_irq()
172 if (irq->map.index && pci_msix_can_alloc_dyn(pool->dev->pdev)) in mlx5_system_free_irq()
173 pci_msix_free_irq(pool->dev->pdev, irq->map); in mlx5_system_free_irq()
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/openbmc/linux/drivers/misc/
H A Ddummy-irq.c3 * Dummy IRQ handler driver.
6 * by the 'irq' parameter.
9 * which spurious IRQs would happen on disabled IRQ vector.
15 #include <linux/irq.h>
18 static int irq = -1; variable
20 static irqreturn_t dummy_interrupt(int irq, void *dev_id) in dummy_interrupt() argument
25 printk(KERN_INFO "dummy-irq: interrupt occurred on IRQ %d\n", in dummy_interrupt()
26 irq); in dummy_interrupt()
35 if (irq < 0) { in dummy_irq_init()
36 printk(KERN_ERR "dummy-irq: no IRQ given. Use irq=N\n"); in dummy_irq_init()
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/openbmc/linux/arch/ia64/kernel/
H A Diosapic.c17 * 00/10/27 Asit Mallick, Goutham Rao <goutham.rao@intel.com> IRQ vector
23 * 01/07/27 J.I. Lee PCI irq routing, Platform/Legacy interrupts
25 * 02/01/23 J.I. Lee iosapic pgm fixes for PCI irq routing from _PRT
28 * initializations for /proc/irq/#/smp_affinity
29 * 02/04/02 P. Diefenbaugh Cleaned up ACPI PCI IRQ routing.
31 * 02/04/30 J.I. Lee bug fix in find_iosapic to fix ACPI PCI IRQ to
34 * 02/08/04 T. Kochi Cleaned up terminology (irq, global system
43 * Updated to work with irq migration necessary
66 * (4) The kernel recognizes an interrupt as an IRQ. The IRQ interface is
68 * As an IRQ is a number, we have to have
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H A Dmsi_ia64.c7 #include <linux/irq.h>
22 unsigned int irq = idata->irq; in ia64_set_msi_irq_affinity() local
24 if (irq_prepare_move(irq, cpu)) in ia64_set_msi_irq_affinity()
36 data |= MSI_DATA_VECTOR(irq_to_vector(irq)); in ia64_set_msi_irq_affinity()
39 pci_write_msi_msg(irq, &msg); in ia64_set_msi_irq_affinity()
50 int irq, vector; in arch_setup_msi_irq() local
52 irq = create_irq(); in arch_setup_msi_irq()
53 if (irq < 0) in arch_setup_msi_irq()
54 return irq; in arch_setup_msi_irq()
56 irq_set_msi_desc(irq, desc); in arch_setup_msi_irq()
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H A Dirq_ia64.c32 #include <linux/irq.h>
61 * Legacy IRQ to IA-64 vector translation table.
64 /* 8259 IRQ translation, first 16 entries */
93 int irq; in find_unassigned_irq() local
95 for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++) in find_unassigned_irq()
96 if (irq_status[irq] == IRQ_UNUSED) in find_unassigned_irq()
97 return irq; in find_unassigned_irq()
120 static int __bind_irq_vector(int irq, int vector, cpumask_t domain) in __bind_irq_vector() argument
124 struct irq_cfg *cfg = &irq_cfg[irq]; in __bind_irq_vector()
126 BUG_ON((unsigned)irq >= NR_IRQS); in __bind_irq_vector()
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/openbmc/linux/drivers/parisc/
H A Dgsc.c35 int irq = txn_alloc_irq(GSC_EIM_WIDTH); in gsc_alloc_irq() local
36 if (irq < 0) { in gsc_alloc_irq()
37 printk("cannot get irq\n"); in gsc_alloc_irq()
38 return irq; in gsc_alloc_irq()
41 i->txn_addr = txn_alloc_addr(irq); in gsc_alloc_irq()
42 i->txn_data = txn_alloc_data(irq); in gsc_alloc_irq()
43 i->irq = irq; in gsc_alloc_irq()
45 return irq; in gsc_alloc_irq()
48 int gsc_claim_irq(struct gsc_irq *i, int irq) in gsc_claim_irq() argument
50 int c = irq; in gsc_claim_irq()
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/openbmc/linux/arch/m68k/coldfire/
H A Dintc-simr.c17 #include <linux/irq.h>
38 static inline unsigned int irq2ebit(unsigned int irq) in irq2ebit() argument
40 return irqebitmap[irq - EINT0]; in irq2ebit()
54 static inline unsigned int irq2ebit(unsigned int irq) in irq2ebit() argument
56 return irq - EINT0; in irq2ebit()
69 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_mask() local
71 if (MCFINTC2_SIMR && (irq > 127)) in intc_irq_mask()
72 __raw_writeb(irq - 128, MCFINTC2_SIMR); in intc_irq_mask()
73 else if (MCFINTC1_SIMR && (irq > 63)) in intc_irq_mask()
74 __raw_writeb(irq - 64, MCFINTC1_SIMR); in intc_irq_mask()
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H A Dintc-2.c24 #include <linux/irq.h>
52 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_mask() local
57 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_mask()
61 imraddr += (irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL; in intc_irq_mask()
62 imrbit = 0x1 << (irq & 0x1f); in intc_irq_mask()
70 unsigned int irq = d->irq - MCFINT_VECBASE; in intc_irq_unmask() local
75 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; in intc_irq_unmask()
79 imraddr += ((irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL); in intc_irq_unmask()
80 imrbit = 0x1 << (irq & 0x1f); in intc_irq_unmask()
83 if ((irq & 0x20) == 0) in intc_irq_unmask()
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/openbmc/linux/arch/m68k/virt/
H A Dints.c5 #include <linux/irq.h>
13 #include <asm/irq.h>
34 * 6 goldfish-pic for CPU IRQ #1 to IRQ #6
35 * CPU IRQ #1 -> PIC #1
36 * IRQ #1 to IRQ #31 -> unused
37 * IRQ #32 -> goldfish-tty
38 * CPU IRQ #2 -> PIC #2
39 * IRQ #1 to IRQ #32 -> virtio-mmio from 1 to 32
40 * CPU IRQ #3 -> PIC #3
41 * IRQ #1 to IRQ #32 -> virtio-mmio from 33 to 64
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/openbmc/linux/Documentation/arch/arm/
H A Dinterrupts.rst16 Secondly, the IRQ subsystem.
39 SA1111 IRQ handler, SA1111 IRQs can hold off SMC9196 IRQs indefinitely.
48 We also bring the idea of an IRQ "chip" (mainly to reduce the size of
57 * Acknowledge the IRQ.
58 * If this is a level-based IRQ, then it is expected to mask the IRQ
61 void (*ack)(unsigned int irq);
63 * Mask the IRQ in hardware.
65 void (*mask)(unsigned int irq);
67 * Unmask the IRQ in hardware.
69 void (*unmask)(unsigned int irq);
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/openbmc/linux/include/linux/
H A Dirqnr.h9 extern struct irq_desc *irq_to_desc(unsigned int irq);
12 # define for_each_irq_desc(irq, desc) \ argument
13 for (irq = 0, desc = irq_to_desc(irq); irq < nr_irqs; \
14 irq++, desc = irq_to_desc(irq)) \
20 # define for_each_irq_desc_reverse(irq, desc) \ argument
21 for (irq = nr_irqs - 1, desc = irq_to_desc(irq); irq >= 0; \
22 irq--, desc = irq_to_desc(irq)) \
27 # define for_each_active_irq(irq) \ argument
28 for (irq = irq_get_next_irq(0); irq < nr_irqs; \
29 irq = irq_get_next_irq(irq + 1))
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/openbmc/qemu/hw/intc/
H A Dgic_internal.h29 #define GIC_DIST_SET_ENABLED(irq, cm) (s->irq_state[irq].enabled |= (cm)) argument
30 #define GIC_DIST_CLEAR_ENABLED(irq, cm) (s->irq_state[irq].enabled &= ~(cm)) argument
31 #define GIC_DIST_TEST_ENABLED(irq, cm) ((s->irq_state[irq].enabled & (cm)) != 0) argument
32 #define GIC_DIST_SET_PENDING(irq, cm) (s->irq_state[irq].pending |= (cm)) argument
33 #define GIC_DIST_CLEAR_PENDING(irq, cm) (s->irq_state[irq].pending &= ~(cm)) argument
34 #define GIC_DIST_SET_ACTIVE(irq, cm) (s->irq_state[irq].active |= (cm)) argument
35 #define GIC_DIST_CLEAR_ACTIVE(irq, cm) (s->irq_state[irq].active &= ~(cm)) argument
36 #define GIC_DIST_TEST_ACTIVE(irq, cm) ((s->irq_state[irq].active & (cm)) != 0) argument
37 #define GIC_DIST_SET_MODEL(irq) (s->irq_state[irq].model = true) argument
38 #define GIC_DIST_CLEAR_MODEL(irq) (s->irq_state[irq].model = false) argument
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H A Darm_gicv3_dist.c32 typedef uint32_t maskfn(GICv3State *s, int irq);
34 static uint32_t mask_nsacr_ge1(GICv3State *s, int irq) in mask_nsacr_ge1() argument
37 uint64_t raw_nsacr = s->gicd_nsacr[irq / 16 + 1]; in mask_nsacr_ge1()
39 raw_nsacr = raw_nsacr << 32 | s->gicd_nsacr[irq / 16]; in mask_nsacr_ge1()
44 static uint32_t mask_nsacr_ge2(GICv3State *s, int irq) in mask_nsacr_ge2() argument
47 uint64_t raw_nsacr = s->gicd_nsacr[irq / 16 + 1]; in mask_nsacr_ge2()
49 raw_nsacr = raw_nsacr << 32 | s->gicd_nsacr[irq / 16]; in mask_nsacr_ge2()
60 maskfn *maskfn, int irq) in mask_group_and_nsacr() argument
72 mask = *gic_bmp_ptr32(s->group, irq); in mask_group_and_nsacr()
74 mask |= maskfn(s, irq); in mask_group_and_nsacr()
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/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dinterrupt.c48 #define get_event_virt_handler(irq, e) (irq->events[e].v_handler) argument
49 #define get_irq_info(irq, e) (irq->events[e].info) argument
51 #define irq_to_gvt(irq) \ argument
52 container_of(irq, struct intel_gvt, irq)
153 struct intel_gvt_irq *irq = &gvt->irq; in regbase_to_irq_info() local
156 for_each_set_bit(i, irq->irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX) { in regbase_to_irq_info()
157 if (i915_mmio_reg_offset(irq->info[i]->reg_base) == reg) in regbase_to_irq_info()
158 return irq->info[i]; in regbase_to_irq_info()
182 const struct intel_gvt_irq_ops *ops = gvt->irq.ops; in intel_vgpu_reg_imr_handler()
196 * intel_vgpu_reg_master_irq_handler - master IRQ write emulation handler
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/openbmc/linux/arch/powerpc/platforms/4xx/
H A Dhsta_msi.c42 int irq, hwirq; in hsta_setup_msi_irqs() local
52 irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1); in hsta_setup_msi_irqs()
53 if (irq < 0) { in hsta_setup_msi_irqs()
56 return irq; in hsta_setup_msi_irqs()
59 hwirq = ppc4xx_hsta_msi.irq_map[irq]; in hsta_setup_msi_irqs()
61 pr_err("%s: Failed mapping irq %d\n", __func__, irq); in hsta_setup_msi_irqs()
69 addr = ppc4xx_hsta_msi.address + irq*0x10; in hsta_setup_msi_irqs()
76 pr_debug("%s: Setup irq %d (0x%0llx)\n", __func__, hwirq, in hsta_setup_msi_irqs()
83 msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1); in hsta_setup_msi_irqs()
94 int irq; in hsta_find_hwirq_offset() local
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/openbmc/linux/drivers/xen/events/
H A Devents_base.c9 * chip. When an event is received, it is mapped to an irq and sent
29 #include <linux/irq.h>
46 #include <asm/irq.h>
86 * Packed IRQ information:
88 * event channel - irq->event channel mapping
91 * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
92 * guest, or GSI (real passthrough IRQ) of the device.
110 unsigned irq; member
155 * IRQ-desc lock
162 /* IRQ <-> VIRQ mapping. */
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