1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
21da177e4SLinus Torvalds /*
31da177e4SLinus Torvalds * I/O SAPIC support.
41da177e4SLinus Torvalds *
51da177e4SLinus Torvalds * Copyright (C) 1999 Intel Corp.
61da177e4SLinus Torvalds * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
71da177e4SLinus Torvalds * Copyright (C) 2000-2002 J.I. Lee <jung-ik.lee@intel.com>
81da177e4SLinus Torvalds * Copyright (C) 1999-2000, 2002-2003 Hewlett-Packard Co.
91da177e4SLinus Torvalds * David Mosberger-Tang <davidm@hpl.hp.com>
101da177e4SLinus Torvalds * Copyright (C) 1999 VA Linux Systems
111da177e4SLinus Torvalds * Copyright (C) 1999,2000 Walt Drummond <drummond@valinux.com>
121da177e4SLinus Torvalds *
1346cba3dcSSatoru Takeuchi * 00/04/19 D. Mosberger Rewritten to mirror more closely the x86 I/O
1446cba3dcSSatoru Takeuchi * APIC code. In particular, we now have separate
1546cba3dcSSatoru Takeuchi * handlers for edge and level triggered
1646cba3dcSSatoru Takeuchi * interrupts.
1746cba3dcSSatoru Takeuchi * 00/10/27 Asit Mallick, Goutham Rao <goutham.rao@intel.com> IRQ vector
1846cba3dcSSatoru Takeuchi * allocation PCI to vector mapping, shared PCI
1946cba3dcSSatoru Takeuchi * interrupts.
2046cba3dcSSatoru Takeuchi * 00/10/27 D. Mosberger Document things a bit more to make them more
2146cba3dcSSatoru Takeuchi * understandable. Clean up much of the old
2246cba3dcSSatoru Takeuchi * IOSAPIC cruft.
2346cba3dcSSatoru Takeuchi * 01/07/27 J.I. Lee PCI irq routing, Platform/Legacy interrupts
2446cba3dcSSatoru Takeuchi * and fixes for ACPI S5(SoftOff) support.
251da177e4SLinus Torvalds * 02/01/23 J.I. Lee iosapic pgm fixes for PCI irq routing from _PRT
2646cba3dcSSatoru Takeuchi * 02/01/07 E. Focht <efocht@ess.nec.de> Redirectable interrupt
2746cba3dcSSatoru Takeuchi * vectors in iosapic_set_affinity(),
2846cba3dcSSatoru Takeuchi * initializations for /proc/irq/#/smp_affinity
291da177e4SLinus Torvalds * 02/04/02 P. Diefenbaugh Cleaned up ACPI PCI IRQ routing.
301da177e4SLinus Torvalds * 02/04/18 J.I. Lee bug fix in iosapic_init_pci_irq
3146cba3dcSSatoru Takeuchi * 02/04/30 J.I. Lee bug fix in find_iosapic to fix ACPI PCI IRQ to
3246cba3dcSSatoru Takeuchi * IOSAPIC mapping error
331da177e4SLinus Torvalds * 02/07/29 T. Kochi Allocate interrupt vectors dynamically
3446cba3dcSSatoru Takeuchi * 02/08/04 T. Kochi Cleaned up terminology (irq, global system
3546cba3dcSSatoru Takeuchi * interrupt, vector, etc.)
3646cba3dcSSatoru Takeuchi * 02/09/20 D. Mosberger Simplified by taking advantage of ACPI's
3746cba3dcSSatoru Takeuchi * pci_irq code.
381da177e4SLinus Torvalds * 03/02/19 B. Helgaas Make pcat_compat system-wide, not per-IOSAPIC.
3946cba3dcSSatoru Takeuchi * Remove iosapic_address & gsi_base from
4046cba3dcSSatoru Takeuchi * external interfaces. Rationalize
4146cba3dcSSatoru Takeuchi * __init/__devinit attributes.
421da177e4SLinus Torvalds * 04/12/04 Ashok Raj <ashok.raj@intel.com> Intel Corporation 2004
4346cba3dcSSatoru Takeuchi * Updated to work with irq migration necessary
4446cba3dcSSatoru Takeuchi * for CPU Hotplug
451da177e4SLinus Torvalds */
461da177e4SLinus Torvalds /*
4746cba3dcSSatoru Takeuchi * Here is what the interrupt logic between a PCI device and the kernel looks
4846cba3dcSSatoru Takeuchi * like:
491da177e4SLinus Torvalds *
5046cba3dcSSatoru Takeuchi * (1) A PCI device raises one of the four interrupt pins (INTA, INTB, INTC,
5146cba3dcSSatoru Takeuchi * INTD). The device is uniquely identified by its bus-, and slot-number
5246cba3dcSSatoru Takeuchi * (the function number does not matter here because all functions share
5346cba3dcSSatoru Takeuchi * the same interrupt lines).
541da177e4SLinus Torvalds *
5546cba3dcSSatoru Takeuchi * (2) The motherboard routes the interrupt line to a pin on a IOSAPIC
5646cba3dcSSatoru Takeuchi * controller. Multiple interrupt lines may have to share the same
5746cba3dcSSatoru Takeuchi * IOSAPIC pin (if they're level triggered and use the same polarity).
5846cba3dcSSatoru Takeuchi * Each interrupt line has a unique Global System Interrupt (GSI) number
5946cba3dcSSatoru Takeuchi * which can be calculated as the sum of the controller's base GSI number
6046cba3dcSSatoru Takeuchi * and the IOSAPIC pin number to which the line connects.
611da177e4SLinus Torvalds *
6246cba3dcSSatoru Takeuchi * (3) The IOSAPIC uses an internal routing table entries (RTEs) to map the
6346cba3dcSSatoru Takeuchi * IOSAPIC pin into the IA-64 interrupt vector. This interrupt vector is then
6446cba3dcSSatoru Takeuchi * sent to the CPU.
651da177e4SLinus Torvalds *
6646cba3dcSSatoru Takeuchi * (4) The kernel recognizes an interrupt as an IRQ. The IRQ interface is
6746cba3dcSSatoru Takeuchi * used as architecture-independent interrupt handling mechanism in Linux.
6846cba3dcSSatoru Takeuchi * As an IRQ is a number, we have to have
6946cba3dcSSatoru Takeuchi * IA-64 interrupt vector number <-> IRQ number mapping. On smaller
7005933aacSChristoph Hellwig * systems, we use one-to-one mapping between IA-64 vector and IRQ.
711da177e4SLinus Torvalds *
721da177e4SLinus Torvalds * To sum up, there are three levels of mappings involved:
731da177e4SLinus Torvalds *
741da177e4SLinus Torvalds * PCI pin -> global system interrupt (GSI) -> IA-64 vector <-> IRQ
751da177e4SLinus Torvalds *
7646cba3dcSSatoru Takeuchi * Note: The term "IRQ" is loosely used everywhere in Linux kernel to
7746cba3dcSSatoru Takeuchi * describe interrupts. Now we use "IRQ" only for Linux IRQ's. ISA IRQ
7846cba3dcSSatoru Takeuchi * (isa_irq) is the only exception in this source code.
791da177e4SLinus Torvalds */
801da177e4SLinus Torvalds
811da177e4SLinus Torvalds #include <linux/acpi.h>
821da177e4SLinus Torvalds #include <linux/init.h>
831da177e4SLinus Torvalds #include <linux/irq.h>
841da177e4SLinus Torvalds #include <linux/kernel.h>
851da177e4SLinus Torvalds #include <linux/list.h>
861da177e4SLinus Torvalds #include <linux/pci.h>
875a0e3ad6STejun Heo #include <linux/slab.h>
881da177e4SLinus Torvalds #include <linux/smp.h>
891da177e4SLinus Torvalds #include <linux/string.h>
9057c8a661SMike Rapoport #include <linux/memblock.h>
911da177e4SLinus Torvalds
921da177e4SLinus Torvalds #include <asm/delay.h>
931da177e4SLinus Torvalds #include <asm/hw_irq.h>
941da177e4SLinus Torvalds #include <asm/io.h>
951da177e4SLinus Torvalds #include <asm/iosapic.h>
961da177e4SLinus Torvalds #include <asm/processor.h>
971da177e4SLinus Torvalds #include <asm/ptrace.h>
98b3545192SPeter Zijlstra #include <asm/xtp.h>
991da177e4SLinus Torvalds
1001da177e4SLinus Torvalds #undef DEBUG_INTERRUPT_ROUTING
1011da177e4SLinus Torvalds
1021da177e4SLinus Torvalds #ifdef DEBUG_INTERRUPT_ROUTING
1031da177e4SLinus Torvalds #define DBG(fmt...) printk(fmt)
1041da177e4SLinus Torvalds #else
1051da177e4SLinus Torvalds #define DBG(fmt...)
1061da177e4SLinus Torvalds #endif
1071da177e4SLinus Torvalds
1081da177e4SLinus Torvalds static DEFINE_SPINLOCK(iosapic_lock);
1091da177e4SLinus Torvalds
11046cba3dcSSatoru Takeuchi /*
11146cba3dcSSatoru Takeuchi * These tables map IA-64 vectors to the IOSAPIC pin that generates this
11246cba3dcSSatoru Takeuchi * vector.
11346cba3dcSSatoru Takeuchi */
114e1b30a39SYasuaki Ishimatsu
115e1b30a39SYasuaki Ishimatsu #define NO_REF_RTE 0
116e1b30a39SYasuaki Ishimatsu
117c5e3f9e5SYasuaki Ishimatsu static struct iosapic {
118c5e3f9e5SYasuaki Ishimatsu char __iomem *addr; /* base address of IOSAPIC */
119c5e3f9e5SYasuaki Ishimatsu unsigned int gsi_base; /* GSI base */
120c5e3f9e5SYasuaki Ishimatsu unsigned short num_rte; /* # of RTEs on this IOSAPIC */
121c5e3f9e5SYasuaki Ishimatsu int rtes_inuse; /* # of RTEs in use on this IOSAPIC */
122c5e3f9e5SYasuaki Ishimatsu #ifdef CONFIG_NUMA
123c5e3f9e5SYasuaki Ishimatsu unsigned short node; /* numa node association via pxm */
124c5e3f9e5SYasuaki Ishimatsu #endif
125c1726d6fSYasuaki Ishimatsu spinlock_t lock; /* lock for indirect reg access */
126c5e3f9e5SYasuaki Ishimatsu } iosapic_lists[NR_IOSAPICS];
1271da177e4SLinus Torvalds
12824eeb568SKenji Kaneshige struct iosapic_rte_info {
129c5e3f9e5SYasuaki Ishimatsu struct list_head rte_list; /* RTEs sharing the same vector */
13024eeb568SKenji Kaneshige char rte_index; /* IOSAPIC RTE index */
13124eeb568SKenji Kaneshige int refcnt; /* reference counter */
132c5e3f9e5SYasuaki Ishimatsu struct iosapic *iosapic;
13324eeb568SKenji Kaneshige } ____cacheline_aligned;
13424eeb568SKenji Kaneshige
13524eeb568SKenji Kaneshige static struct iosapic_intr_info {
13646cba3dcSSatoru Takeuchi struct list_head rtes; /* RTEs using this vector (empty =>
13746cba3dcSSatoru Takeuchi * not an IOSAPIC interrupt) */
138c4c376f7SKenji Kaneshige int count; /* # of registered RTEs */
13946cba3dcSSatoru Takeuchi u32 low32; /* current value of low word of
14046cba3dcSSatoru Takeuchi * Redirection table entry */
14124eeb568SKenji Kaneshige unsigned int dest; /* destination CPU physical ID */
1421da177e4SLinus Torvalds unsigned char dmode : 3; /* delivery mode (see iosapic.h) */
14346cba3dcSSatoru Takeuchi unsigned char polarity: 1; /* interrupt polarity
14446cba3dcSSatoru Takeuchi * (see iosapic.h) */
1451da177e4SLinus Torvalds unsigned char trigger : 1; /* trigger mode (see iosapic.h) */
1464bbdec7aSYasuaki Ishimatsu } iosapic_intr_info[NR_IRQS];
1471da177e4SLinus Torvalds
1485b5e76e9SGreg Kroah-Hartman static unsigned char pcat_compat; /* 8259 compatibility flag */
1491da177e4SLinus Torvalds
150c1726d6fSYasuaki Ishimatsu static inline void
iosapic_write(struct iosapic * iosapic,unsigned int reg,u32 val)151c1726d6fSYasuaki Ishimatsu iosapic_write(struct iosapic *iosapic, unsigned int reg, u32 val)
152c1726d6fSYasuaki Ishimatsu {
153c1726d6fSYasuaki Ishimatsu unsigned long flags;
154c1726d6fSYasuaki Ishimatsu
155c1726d6fSYasuaki Ishimatsu spin_lock_irqsave(&iosapic->lock, flags);
156c1726d6fSYasuaki Ishimatsu __iosapic_write(iosapic->addr, reg, val);
157c1726d6fSYasuaki Ishimatsu spin_unlock_irqrestore(&iosapic->lock, flags);
158c1726d6fSYasuaki Ishimatsu }
159c1726d6fSYasuaki Ishimatsu
1601da177e4SLinus Torvalds /*
1611da177e4SLinus Torvalds * Find an IOSAPIC associated with a GSI
1621da177e4SLinus Torvalds */
1631da177e4SLinus Torvalds static inline int
find_iosapic(unsigned int gsi)1641da177e4SLinus Torvalds find_iosapic (unsigned int gsi)
1651da177e4SLinus Torvalds {
1661da177e4SLinus Torvalds int i;
1671da177e4SLinus Torvalds
1680e888adcSKenji Kaneshige for (i = 0; i < NR_IOSAPICS; i++) {
16946cba3dcSSatoru Takeuchi if ((unsigned) (gsi - iosapic_lists[i].gsi_base) <
17046cba3dcSSatoru Takeuchi iosapic_lists[i].num_rte)
1711da177e4SLinus Torvalds return i;
1721da177e4SLinus Torvalds }
1731da177e4SLinus Torvalds
1741da177e4SLinus Torvalds return -1;
1751da177e4SLinus Torvalds }
1761da177e4SLinus Torvalds
__gsi_to_irq(unsigned int gsi)1774bbdec7aSYasuaki Ishimatsu static inline int __gsi_to_irq(unsigned int gsi)
1781da177e4SLinus Torvalds {
1794bbdec7aSYasuaki Ishimatsu int irq;
1801da177e4SLinus Torvalds struct iosapic_intr_info *info;
18124eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
1821da177e4SLinus Torvalds
1834bbdec7aSYasuaki Ishimatsu for (irq = 0; irq < NR_IRQS; irq++) {
1844bbdec7aSYasuaki Ishimatsu info = &iosapic_intr_info[irq];
18524eeb568SKenji Kaneshige list_for_each_entry(rte, &info->rtes, rte_list)
186c5e3f9e5SYasuaki Ishimatsu if (rte->iosapic->gsi_base + rte->rte_index == gsi)
1874bbdec7aSYasuaki Ishimatsu return irq;
1884bbdec7aSYasuaki Ishimatsu }
1891da177e4SLinus Torvalds return -1;
1901da177e4SLinus Torvalds }
1911da177e4SLinus Torvalds
1921da177e4SLinus Torvalds int
gsi_to_irq(unsigned int gsi)1931da177e4SLinus Torvalds gsi_to_irq (unsigned int gsi)
1941da177e4SLinus Torvalds {
19524eeb568SKenji Kaneshige unsigned long flags;
19624eeb568SKenji Kaneshige int irq;
19724eeb568SKenji Kaneshige
1984bbdec7aSYasuaki Ishimatsu spin_lock_irqsave(&iosapic_lock, flags);
1994bbdec7aSYasuaki Ishimatsu irq = __gsi_to_irq(gsi);
2004bbdec7aSYasuaki Ishimatsu spin_unlock_irqrestore(&iosapic_lock, flags);
20124eeb568SKenji Kaneshige return irq;
20224eeb568SKenji Kaneshige }
20324eeb568SKenji Kaneshige
find_rte(unsigned int irq,unsigned int gsi)2044bbdec7aSYasuaki Ishimatsu static struct iosapic_rte_info *find_rte(unsigned int irq, unsigned int gsi)
20524eeb568SKenji Kaneshige {
20624eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
20724eeb568SKenji Kaneshige
2084bbdec7aSYasuaki Ishimatsu list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list)
209c5e3f9e5SYasuaki Ishimatsu if (rte->iosapic->gsi_base + rte->rte_index == gsi)
21024eeb568SKenji Kaneshige return rte;
21124eeb568SKenji Kaneshige return NULL;
2121da177e4SLinus Torvalds }
2131da177e4SLinus Torvalds
2141da177e4SLinus Torvalds static void
set_rte(unsigned int gsi,unsigned int irq,unsigned int dest,int mask)2154bbdec7aSYasuaki Ishimatsu set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask)
2161da177e4SLinus Torvalds {
2171da177e4SLinus Torvalds unsigned long pol, trigger, dmode;
2181da177e4SLinus Torvalds u32 low32, high32;
2191da177e4SLinus Torvalds int rte_index;
2201da177e4SLinus Torvalds char redir;
22124eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
2224bbdec7aSYasuaki Ishimatsu ia64_vector vector = irq_to_vector(irq);
2231da177e4SLinus Torvalds
2241da177e4SLinus Torvalds DBG(KERN_DEBUG"IOSAPIC: routing vector %d to 0x%x\n", vector, dest);
2251da177e4SLinus Torvalds
2264bbdec7aSYasuaki Ishimatsu rte = find_rte(irq, gsi);
22724eeb568SKenji Kaneshige if (!rte)
2281da177e4SLinus Torvalds return; /* not an IOSAPIC interrupt */
2291da177e4SLinus Torvalds
23024eeb568SKenji Kaneshige rte_index = rte->rte_index;
2314bbdec7aSYasuaki Ishimatsu pol = iosapic_intr_info[irq].polarity;
2324bbdec7aSYasuaki Ishimatsu trigger = iosapic_intr_info[irq].trigger;
2334bbdec7aSYasuaki Ishimatsu dmode = iosapic_intr_info[irq].dmode;
2341da177e4SLinus Torvalds
2351da177e4SLinus Torvalds redir = (dmode == IOSAPIC_LOWEST_PRIORITY) ? 1 : 0;
2361da177e4SLinus Torvalds
2371da177e4SLinus Torvalds #ifdef CONFIG_SMP
2384bbdec7aSYasuaki Ishimatsu set_irq_affinity_info(irq, (int)(dest & 0xffff), redir);
2391da177e4SLinus Torvalds #endif
2401da177e4SLinus Torvalds
2411da177e4SLinus Torvalds low32 = ((pol << IOSAPIC_POLARITY_SHIFT) |
2421da177e4SLinus Torvalds (trigger << IOSAPIC_TRIGGER_SHIFT) |
2431da177e4SLinus Torvalds (dmode << IOSAPIC_DELIVERY_SHIFT) |
2441da177e4SLinus Torvalds ((mask ? 1 : 0) << IOSAPIC_MASK_SHIFT) |
2451da177e4SLinus Torvalds vector);
2461da177e4SLinus Torvalds
2471da177e4SLinus Torvalds /* dest contains both id and eid */
2481da177e4SLinus Torvalds high32 = (dest << IOSAPIC_DEST_SHIFT);
2491da177e4SLinus Torvalds
250c1726d6fSYasuaki Ishimatsu iosapic_write(rte->iosapic, IOSAPIC_RTE_HIGH(rte_index), high32);
251c1726d6fSYasuaki Ishimatsu iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
2524bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].low32 = low32;
2534bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].dest = dest;
2541da177e4SLinus Torvalds }
2551da177e4SLinus Torvalds
2561da177e4SLinus Torvalds static void
iosapic_nop(struct irq_data * data)2579505ec08SMichael S. Tsirkin iosapic_nop (struct irq_data *data)
2581da177e4SLinus Torvalds {
2591da177e4SLinus Torvalds /* do nothing... */
2601da177e4SLinus Torvalds }
2611da177e4SLinus Torvalds
262a7956113SZou Nan hai
263a7956113SZou Nan hai #ifdef CONFIG_KEXEC
264a7956113SZou Nan hai void
kexec_disable_iosapic(void)265a7956113SZou Nan hai kexec_disable_iosapic(void)
266a7956113SZou Nan hai {
267a7956113SZou Nan hai struct iosapic_intr_info *info;
268a7956113SZou Nan hai struct iosapic_rte_info *rte;
2694bbdec7aSYasuaki Ishimatsu ia64_vector vec;
2704bbdec7aSYasuaki Ishimatsu int irq;
2714bbdec7aSYasuaki Ishimatsu
2724bbdec7aSYasuaki Ishimatsu for (irq = 0; irq < NR_IRQS; irq++) {
2734bbdec7aSYasuaki Ishimatsu info = &iosapic_intr_info[irq];
2744bbdec7aSYasuaki Ishimatsu vec = irq_to_vector(irq);
275a7956113SZou Nan hai list_for_each_entry(rte, &info->rtes,
276a7956113SZou Nan hai rte_list) {
277c1726d6fSYasuaki Ishimatsu iosapic_write(rte->iosapic,
278a7956113SZou Nan hai IOSAPIC_RTE_LOW(rte->rte_index),
279a7956113SZou Nan hai IOSAPIC_MASK|vec);
280c5e3f9e5SYasuaki Ishimatsu iosapic_eoi(rte->iosapic->addr, vec);
281a7956113SZou Nan hai }
282a7956113SZou Nan hai }
283a7956113SZou Nan hai }
284a7956113SZou Nan hai #endif
285a7956113SZou Nan hai
2861da177e4SLinus Torvalds static void
mask_irq(struct irq_data * data)2878fac171fSThomas Gleixner mask_irq (struct irq_data *data)
2881da177e4SLinus Torvalds {
2898fac171fSThomas Gleixner unsigned int irq = data->irq;
2901da177e4SLinus Torvalds u32 low32;
2911da177e4SLinus Torvalds int rte_index;
29224eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
2931da177e4SLinus Torvalds
294c4c376f7SKenji Kaneshige if (!iosapic_intr_info[irq].count)
2951da177e4SLinus Torvalds return; /* not an IOSAPIC interrupt! */
2961da177e4SLinus Torvalds
2971da177e4SLinus Torvalds /* set only the mask bit */
2984bbdec7aSYasuaki Ishimatsu low32 = iosapic_intr_info[irq].low32 |= IOSAPIC_MASK;
2994bbdec7aSYasuaki Ishimatsu list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) {
30024eeb568SKenji Kaneshige rte_index = rte->rte_index;
301c1726d6fSYasuaki Ishimatsu iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
3021da177e4SLinus Torvalds }
3031da177e4SLinus Torvalds }
3041da177e4SLinus Torvalds
3051da177e4SLinus Torvalds static void
unmask_irq(struct irq_data * data)3068fac171fSThomas Gleixner unmask_irq (struct irq_data *data)
3071da177e4SLinus Torvalds {
3088fac171fSThomas Gleixner unsigned int irq = data->irq;
3091da177e4SLinus Torvalds u32 low32;
3101da177e4SLinus Torvalds int rte_index;
31124eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
3121da177e4SLinus Torvalds
313c4c376f7SKenji Kaneshige if (!iosapic_intr_info[irq].count)
3141da177e4SLinus Torvalds return; /* not an IOSAPIC interrupt! */
3151da177e4SLinus Torvalds
3164bbdec7aSYasuaki Ishimatsu low32 = iosapic_intr_info[irq].low32 &= ~IOSAPIC_MASK;
3174bbdec7aSYasuaki Ishimatsu list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) {
31824eeb568SKenji Kaneshige rte_index = rte->rte_index;
319c1726d6fSYasuaki Ishimatsu iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
3201da177e4SLinus Torvalds }
3211da177e4SLinus Torvalds }
3221da177e4SLinus Torvalds
3231da177e4SLinus Torvalds
324d5dedd45SYinghai Lu static int
iosapic_set_affinity(struct irq_data * data,const struct cpumask * mask,bool force)3258fac171fSThomas Gleixner iosapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
3268fac171fSThomas Gleixner bool force)
3271da177e4SLinus Torvalds {
3281da177e4SLinus Torvalds #ifdef CONFIG_SMP
3298fac171fSThomas Gleixner unsigned int irq = data->irq;
3301da177e4SLinus Torvalds u32 high32, low32;
3310de26520SRusty Russell int cpu, dest, rte_index;
3321da177e4SLinus Torvalds int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0;
33324eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
334c1726d6fSYasuaki Ishimatsu struct iosapic *iosapic;
3351da177e4SLinus Torvalds
3361da177e4SLinus Torvalds irq &= (~IA64_IRQ_REDIRECTED);
3371da177e4SLinus Torvalds
3380de26520SRusty Russell cpu = cpumask_first_and(cpu_online_mask, mask);
3390de26520SRusty Russell if (cpu >= nr_cpu_ids)
340d5dedd45SYinghai Lu return -1;
3411da177e4SLinus Torvalds
3420de26520SRusty Russell if (irq_prepare_move(irq, cpu))
343d5dedd45SYinghai Lu return -1;
344cd378f18SYasuaki Ishimatsu
3450de26520SRusty Russell dest = cpu_physical_id(cpu);
3461da177e4SLinus Torvalds
347c4c376f7SKenji Kaneshige if (!iosapic_intr_info[irq].count)
348d5dedd45SYinghai Lu return -1; /* not an IOSAPIC interrupt */
3491da177e4SLinus Torvalds
3501da177e4SLinus Torvalds set_irq_affinity_info(irq, dest, redir);
3511da177e4SLinus Torvalds
3521da177e4SLinus Torvalds /* dest contains both id and eid */
3531da177e4SLinus Torvalds high32 = dest << IOSAPIC_DEST_SHIFT;
3541da177e4SLinus Torvalds
3554bbdec7aSYasuaki Ishimatsu low32 = iosapic_intr_info[irq].low32 & ~(7 << IOSAPIC_DELIVERY_SHIFT);
3561da177e4SLinus Torvalds if (redir)
3571da177e4SLinus Torvalds /* change delivery mode to lowest priority */
358e3a8f7b8SYasuaki Ishimatsu low32 |= (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
3591da177e4SLinus Torvalds else
3601da177e4SLinus Torvalds /* change delivery mode to fixed */
3611da177e4SLinus Torvalds low32 |= (IOSAPIC_FIXED << IOSAPIC_DELIVERY_SHIFT);
362cd378f18SYasuaki Ishimatsu low32 &= IOSAPIC_VECTOR_MASK;
363cd378f18SYasuaki Ishimatsu low32 |= irq_to_vector(irq);
3641da177e4SLinus Torvalds
3654bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].low32 = low32;
3664bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].dest = dest;
3674bbdec7aSYasuaki Ishimatsu list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) {
368c1726d6fSYasuaki Ishimatsu iosapic = rte->iosapic;
36924eeb568SKenji Kaneshige rte_index = rte->rte_index;
370c1726d6fSYasuaki Ishimatsu iosapic_write(iosapic, IOSAPIC_RTE_HIGH(rte_index), high32);
371c1726d6fSYasuaki Ishimatsu iosapic_write(iosapic, IOSAPIC_RTE_LOW(rte_index), low32);
3721da177e4SLinus Torvalds }
373d5dedd45SYinghai Lu
3741da177e4SLinus Torvalds #endif
375d5dedd45SYinghai Lu return 0;
3761da177e4SLinus Torvalds }
3771da177e4SLinus Torvalds
3781da177e4SLinus Torvalds /*
3791da177e4SLinus Torvalds * Handlers for level-triggered interrupts.
3801da177e4SLinus Torvalds */
3811da177e4SLinus Torvalds
3821da177e4SLinus Torvalds static unsigned int
iosapic_startup_level_irq(struct irq_data * data)3838fac171fSThomas Gleixner iosapic_startup_level_irq (struct irq_data *data)
3841da177e4SLinus Torvalds {
3858fac171fSThomas Gleixner unmask_irq(data);
3861da177e4SLinus Torvalds return 0;
3871da177e4SLinus Torvalds }
3881da177e4SLinus Torvalds
3891da177e4SLinus Torvalds static void
iosapic_unmask_level_irq(struct irq_data * data)3908fac171fSThomas Gleixner iosapic_unmask_level_irq (struct irq_data *data)
3911da177e4SLinus Torvalds {
3928fac171fSThomas Gleixner unsigned int irq = data->irq;
3931da177e4SLinus Torvalds ia64_vector vec = irq_to_vector(irq);
39424eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
395cd378f18SYasuaki Ishimatsu int do_unmask_irq = 0;
3961da177e4SLinus Torvalds
397a6cd6322SKenji Kaneshige irq_complete_move(irq);
39891ce72e0SThomas Gleixner if (unlikely(irqd_is_setaffinity_pending(data))) {
399cd378f18SYasuaki Ishimatsu do_unmask_irq = 1;
4008fac171fSThomas Gleixner mask_irq(data);
4015d4bff94STony Luck } else
4028fac171fSThomas Gleixner unmask_irq(data);
403cd378f18SYasuaki Ishimatsu
4044bbdec7aSYasuaki Ishimatsu list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list)
405c5e3f9e5SYasuaki Ishimatsu iosapic_eoi(rte->iosapic->addr, vec);
406cd378f18SYasuaki Ishimatsu
407cd378f18SYasuaki Ishimatsu if (unlikely(do_unmask_irq)) {
40891ce72e0SThomas Gleixner irq_move_masked_irq(data);
4098fac171fSThomas Gleixner unmask_irq(data);
410cd378f18SYasuaki Ishimatsu }
4111da177e4SLinus Torvalds }
4121da177e4SLinus Torvalds
4131da177e4SLinus Torvalds #define iosapic_shutdown_level_irq mask_irq
4141da177e4SLinus Torvalds #define iosapic_enable_level_irq unmask_irq
4151da177e4SLinus Torvalds #define iosapic_disable_level_irq mask_irq
4169505ec08SMichael S. Tsirkin #define iosapic_ack_level_irq iosapic_nop
4171da177e4SLinus Torvalds
4189e004ebdSSimon Horman static struct irq_chip irq_type_iosapic_level = {
41906344db3SIngo Molnar .name = "IO-SAPIC-level",
4208fac171fSThomas Gleixner .irq_startup = iosapic_startup_level_irq,
4218fac171fSThomas Gleixner .irq_shutdown = iosapic_shutdown_level_irq,
4228fac171fSThomas Gleixner .irq_enable = iosapic_enable_level_irq,
4238fac171fSThomas Gleixner .irq_disable = iosapic_disable_level_irq,
4248fac171fSThomas Gleixner .irq_ack = iosapic_ack_level_irq,
4258fac171fSThomas Gleixner .irq_mask = mask_irq,
4268fac171fSThomas Gleixner .irq_unmask = iosapic_unmask_level_irq,
4278fac171fSThomas Gleixner .irq_set_affinity = iosapic_set_affinity
4281da177e4SLinus Torvalds };
4291da177e4SLinus Torvalds
4301da177e4SLinus Torvalds /*
4311da177e4SLinus Torvalds * Handlers for edge-triggered interrupts.
4321da177e4SLinus Torvalds */
4331da177e4SLinus Torvalds
4341da177e4SLinus Torvalds static unsigned int
iosapic_startup_edge_irq(struct irq_data * data)4358fac171fSThomas Gleixner iosapic_startup_edge_irq (struct irq_data *data)
4361da177e4SLinus Torvalds {
4378fac171fSThomas Gleixner unmask_irq(data);
4381da177e4SLinus Torvalds /*
4391da177e4SLinus Torvalds * IOSAPIC simply drops interrupts pended while the
4401da177e4SLinus Torvalds * corresponding pin was masked, so we can't know if an
4411da177e4SLinus Torvalds * interrupt is pending already. Let's hope not...
4421da177e4SLinus Torvalds */
4431da177e4SLinus Torvalds return 0;
4441da177e4SLinus Torvalds }
4451da177e4SLinus Torvalds
4461da177e4SLinus Torvalds static void
iosapic_ack_edge_irq(struct irq_data * data)4478fac171fSThomas Gleixner iosapic_ack_edge_irq (struct irq_data *data)
4481da177e4SLinus Torvalds {
44991ce72e0SThomas Gleixner irq_complete_move(data->irq);
45091ce72e0SThomas Gleixner irq_move_irq(data);
4511da177e4SLinus Torvalds }
4521da177e4SLinus Torvalds
4531da177e4SLinus Torvalds #define iosapic_enable_edge_irq unmask_irq
4549505ec08SMichael S. Tsirkin #define iosapic_disable_edge_irq iosapic_nop
4551da177e4SLinus Torvalds
4569e004ebdSSimon Horman static struct irq_chip irq_type_iosapic_edge = {
45706344db3SIngo Molnar .name = "IO-SAPIC-edge",
4588fac171fSThomas Gleixner .irq_startup = iosapic_startup_edge_irq,
4598fac171fSThomas Gleixner .irq_shutdown = iosapic_disable_edge_irq,
4608fac171fSThomas Gleixner .irq_enable = iosapic_enable_edge_irq,
4618fac171fSThomas Gleixner .irq_disable = iosapic_disable_edge_irq,
4628fac171fSThomas Gleixner .irq_ack = iosapic_ack_edge_irq,
4638fac171fSThomas Gleixner .irq_mask = mask_irq,
4648fac171fSThomas Gleixner .irq_unmask = unmask_irq,
4658fac171fSThomas Gleixner .irq_set_affinity = iosapic_set_affinity
4661da177e4SLinus Torvalds };
4671da177e4SLinus Torvalds
4689e004ebdSSimon Horman static unsigned int
iosapic_version(char __iomem * addr)4691da177e4SLinus Torvalds iosapic_version (char __iomem *addr)
4701da177e4SLinus Torvalds {
4711da177e4SLinus Torvalds /*
4721da177e4SLinus Torvalds * IOSAPIC Version Register return 32 bit structure like:
4731da177e4SLinus Torvalds * {
4741da177e4SLinus Torvalds * unsigned int version : 8;
4751da177e4SLinus Torvalds * unsigned int reserved1 : 8;
4761da177e4SLinus Torvalds * unsigned int max_redir : 8;
4771da177e4SLinus Torvalds * unsigned int reserved2 : 8;
4781da177e4SLinus Torvalds * }
4791da177e4SLinus Torvalds */
480c1726d6fSYasuaki Ishimatsu return __iosapic_read(addr, IOSAPIC_VERSION);
4811da177e4SLinus Torvalds }
4821da177e4SLinus Torvalds
iosapic_find_sharable_irq(unsigned long trigger,unsigned long pol)4834bbdec7aSYasuaki Ishimatsu static int iosapic_find_sharable_irq(unsigned long trigger, unsigned long pol)
48424eeb568SKenji Kaneshige {
4854bbdec7aSYasuaki Ishimatsu int i, irq = -ENOSPC, min_count = -1;
48624eeb568SKenji Kaneshige struct iosapic_intr_info *info;
48724eeb568SKenji Kaneshige
48824eeb568SKenji Kaneshige /*
48924eeb568SKenji Kaneshige * shared vectors for edge-triggered interrupts are not
49024eeb568SKenji Kaneshige * supported yet
49124eeb568SKenji Kaneshige */
49224eeb568SKenji Kaneshige if (trigger == IOSAPIC_EDGE)
49340598cbeSYasuaki Ishimatsu return -EINVAL;
49424eeb568SKenji Kaneshige
4955b592397SRoel Kluin for (i = 0; i < NR_IRQS; i++) {
49624eeb568SKenji Kaneshige info = &iosapic_intr_info[i];
49724eeb568SKenji Kaneshige if (info->trigger == trigger && info->polarity == pol &&
498f8c087f3SYasuaki Ishimatsu (info->dmode == IOSAPIC_FIXED ||
499f8c087f3SYasuaki Ishimatsu info->dmode == IOSAPIC_LOWEST_PRIORITY) &&
500f8c087f3SYasuaki Ishimatsu can_request_irq(i, IRQF_SHARED)) {
50124eeb568SKenji Kaneshige if (min_count == -1 || info->count < min_count) {
5024bbdec7aSYasuaki Ishimatsu irq = i;
50324eeb568SKenji Kaneshige min_count = info->count;
50424eeb568SKenji Kaneshige }
50524eeb568SKenji Kaneshige }
50624eeb568SKenji Kaneshige }
5074bbdec7aSYasuaki Ishimatsu return irq;
50824eeb568SKenji Kaneshige }
50924eeb568SKenji Kaneshige
5101da177e4SLinus Torvalds /*
5111da177e4SLinus Torvalds * if the given vector is already owned by other,
5121da177e4SLinus Torvalds * assign a new vector for the other and make the vector available
5131da177e4SLinus Torvalds */
5141da177e4SLinus Torvalds static void __init
iosapic_reassign_vector(int irq)5154bbdec7aSYasuaki Ishimatsu iosapic_reassign_vector (int irq)
5161da177e4SLinus Torvalds {
5174bbdec7aSYasuaki Ishimatsu int new_irq;
5181da177e4SLinus Torvalds
519c4c376f7SKenji Kaneshige if (iosapic_intr_info[irq].count) {
5204bbdec7aSYasuaki Ishimatsu new_irq = create_irq();
5214bbdec7aSYasuaki Ishimatsu if (new_irq < 0)
522d4ed8084SHarvey Harrison panic("%s: out of interrupt vectors!\n", __func__);
52346cba3dcSSatoru Takeuchi printk(KERN_INFO "Reassigning vector %d to %d\n",
5244bbdec7aSYasuaki Ishimatsu irq_to_vector(irq), irq_to_vector(new_irq));
5254bbdec7aSYasuaki Ishimatsu memcpy(&iosapic_intr_info[new_irq], &iosapic_intr_info[irq],
5261da177e4SLinus Torvalds sizeof(struct iosapic_intr_info));
5274bbdec7aSYasuaki Ishimatsu INIT_LIST_HEAD(&iosapic_intr_info[new_irq].rtes);
5284bbdec7aSYasuaki Ishimatsu list_move(iosapic_intr_info[irq].rtes.next,
5294bbdec7aSYasuaki Ishimatsu &iosapic_intr_info[new_irq].rtes);
5304bbdec7aSYasuaki Ishimatsu memset(&iosapic_intr_info[irq], 0,
53146cba3dcSSatoru Takeuchi sizeof(struct iosapic_intr_info));
5324bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].low32 = IOSAPIC_MASK;
5334bbdec7aSYasuaki Ishimatsu INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes);
5341da177e4SLinus Torvalds }
5351da177e4SLinus Torvalds }
5361da177e4SLinus Torvalds
irq_is_shared(int irq)5374bbdec7aSYasuaki Ishimatsu static inline int irq_is_shared (int irq)
53824eeb568SKenji Kaneshige {
5394bbdec7aSYasuaki Ishimatsu return (iosapic_intr_info[irq].count > 1);
54024eeb568SKenji Kaneshige }
54124eeb568SKenji Kaneshige
54233b39e84SIsaku Yamahata struct irq_chip*
ia64_native_iosapic_get_irq_chip(unsigned long trigger)54333b39e84SIsaku Yamahata ia64_native_iosapic_get_irq_chip(unsigned long trigger)
54433b39e84SIsaku Yamahata {
54533b39e84SIsaku Yamahata if (trigger == IOSAPIC_EDGE)
54633b39e84SIsaku Yamahata return &irq_type_iosapic_edge;
54733b39e84SIsaku Yamahata else
54833b39e84SIsaku Yamahata return &irq_type_iosapic_level;
54933b39e84SIsaku Yamahata }
55033b39e84SIsaku Yamahata
55114454a1bSKenji Kaneshige static int
register_intr(unsigned int gsi,int irq,unsigned char delivery,unsigned long polarity,unsigned long trigger)5524bbdec7aSYasuaki Ishimatsu register_intr (unsigned int gsi, int irq, unsigned char delivery,
5531da177e4SLinus Torvalds unsigned long polarity, unsigned long trigger)
5541da177e4SLinus Torvalds {
555dea1078eSThomas Gleixner struct irq_chip *chip, *irq_type;
5561da177e4SLinus Torvalds int index;
55724eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
5581da177e4SLinus Torvalds
5591da177e4SLinus Torvalds index = find_iosapic(gsi);
5601da177e4SLinus Torvalds if (index < 0) {
56146cba3dcSSatoru Takeuchi printk(KERN_WARNING "%s: No IOSAPIC for GSI %u\n",
562d4ed8084SHarvey Harrison __func__, gsi);
56314454a1bSKenji Kaneshige return -ENODEV;
5641da177e4SLinus Torvalds }
5651da177e4SLinus Torvalds
5664bbdec7aSYasuaki Ishimatsu rte = find_rte(irq, gsi);
56724eeb568SKenji Kaneshige if (!rte) {
5684de0a759STony Luck rte = kzalloc(sizeof (*rte), GFP_ATOMIC);
56924eeb568SKenji Kaneshige if (!rte) {
57046cba3dcSSatoru Takeuchi printk(KERN_WARNING "%s: cannot allocate memory\n",
571d4ed8084SHarvey Harrison __func__);
57214454a1bSKenji Kaneshige return -ENOMEM;
57324eeb568SKenji Kaneshige }
57424eeb568SKenji Kaneshige
575c5e3f9e5SYasuaki Ishimatsu rte->iosapic = &iosapic_lists[index];
576c5e3f9e5SYasuaki Ishimatsu rte->rte_index = gsi - rte->iosapic->gsi_base;
57724eeb568SKenji Kaneshige rte->refcnt++;
5784bbdec7aSYasuaki Ishimatsu list_add_tail(&rte->rte_list, &iosapic_intr_info[irq].rtes);
5794bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].count++;
5800e888adcSKenji Kaneshige iosapic_lists[index].rtes_inuse++;
58124eeb568SKenji Kaneshige }
582e1b30a39SYasuaki Ishimatsu else if (rte->refcnt == NO_REF_RTE) {
5834bbdec7aSYasuaki Ishimatsu struct iosapic_intr_info *info = &iosapic_intr_info[irq];
584e1b30a39SYasuaki Ishimatsu if (info->count > 0 &&
585e1b30a39SYasuaki Ishimatsu (info->trigger != trigger || info->polarity != polarity)){
58646cba3dcSSatoru Takeuchi printk (KERN_WARNING
58746cba3dcSSatoru Takeuchi "%s: cannot override the interrupt\n",
588d4ed8084SHarvey Harrison __func__);
58914454a1bSKenji Kaneshige return -EINVAL;
59024eeb568SKenji Kaneshige }
591e1b30a39SYasuaki Ishimatsu rte->refcnt++;
592e1b30a39SYasuaki Ishimatsu iosapic_intr_info[irq].count++;
593e1b30a39SYasuaki Ishimatsu iosapic_lists[index].rtes_inuse++;
59424eeb568SKenji Kaneshige }
59524eeb568SKenji Kaneshige
5964bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].polarity = polarity;
5974bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].dmode = delivery;
5984bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].trigger = trigger;
5991da177e4SLinus Torvalds
60033b39e84SIsaku Yamahata irq_type = iosapic_get_irq_chip(trigger);
6011da177e4SLinus Torvalds
602dea1078eSThomas Gleixner chip = irq_get_chip(irq);
603dea1078eSThomas Gleixner if (irq_type != NULL && chip != irq_type) {
604dea1078eSThomas Gleixner if (chip != &no_irq_chip)
60546cba3dcSSatoru Takeuchi printk(KERN_WARNING
60646cba3dcSSatoru Takeuchi "%s: changing vector %d from %s to %s\n",
607d4ed8084SHarvey Harrison __func__, irq_to_vector(irq),
608dea1078eSThomas Gleixner chip->name, irq_type->name);
609dea1078eSThomas Gleixner chip = irq_type;
6101da177e4SLinus Torvalds }
61159fb3d58SThomas Gleixner irq_set_chip_handler_name_locked(irq_get_irq_data(irq), chip,
61259fb3d58SThomas Gleixner trigger == IOSAPIC_EDGE ? handle_edge_irq : handle_level_irq,
613dea1078eSThomas Gleixner NULL);
61414454a1bSKenji Kaneshige return 0;
6151da177e4SLinus Torvalds }
6161da177e4SLinus Torvalds
6171da177e4SLinus Torvalds static unsigned int
get_target_cpu(unsigned int gsi,int irq)6184bbdec7aSYasuaki Ishimatsu get_target_cpu (unsigned int gsi, int irq)
6191da177e4SLinus Torvalds {
6201da177e4SLinus Torvalds #ifdef CONFIG_SMP
6211da177e4SLinus Torvalds static int cpu = -1;
622ff741906SAshok Raj extern int cpe_vector;
6234994be1bSYasuaki Ishimatsu cpumask_t domain = irq_to_domain(irq);
6241da177e4SLinus Torvalds
6251da177e4SLinus Torvalds /*
62624eeb568SKenji Kaneshige * In case of vector shared by multiple RTEs, all RTEs that
62724eeb568SKenji Kaneshige * share the vector need to use the same destination CPU.
62824eeb568SKenji Kaneshige */
629c4c376f7SKenji Kaneshige if (iosapic_intr_info[irq].count)
6304bbdec7aSYasuaki Ishimatsu return iosapic_intr_info[irq].dest;
63124eeb568SKenji Kaneshige
63224eeb568SKenji Kaneshige /*
6331da177e4SLinus Torvalds * If the platform supports redirection via XTP, let it
6341da177e4SLinus Torvalds * distribute interrupts.
6351da177e4SLinus Torvalds */
6361da177e4SLinus Torvalds if (smp_int_redirect & SMP_IRQ_REDIRECTION)
6371da177e4SLinus Torvalds return cpu_physical_id(smp_processor_id());
6381da177e4SLinus Torvalds
6391da177e4SLinus Torvalds /*
6401da177e4SLinus Torvalds * Some interrupts (ACPI SCI, for instance) are registered
6411da177e4SLinus Torvalds * before the BSP is marked as online.
6421da177e4SLinus Torvalds */
6431da177e4SLinus Torvalds if (!cpu_online(smp_processor_id()))
6441da177e4SLinus Torvalds return cpu_physical_id(smp_processor_id());
6451da177e4SLinus Torvalds
6464bbdec7aSYasuaki Ishimatsu if (cpe_vector > 0 && irq_to_vector(irq) == IA64_CPEP_VECTOR)
647ff741906SAshok Raj return get_cpei_target_cpu();
648ff741906SAshok Raj
6491da177e4SLinus Torvalds #ifdef CONFIG_NUMA
6501da177e4SLinus Torvalds {
6511da177e4SLinus Torvalds int num_cpus, cpu_index, iosapic_index, numa_cpu, i = 0;
652fbb776c3SRusty Russell const struct cpumask *cpu_mask;
6531da177e4SLinus Torvalds
6541da177e4SLinus Torvalds iosapic_index = find_iosapic(gsi);
6551da177e4SLinus Torvalds if (iosapic_index < 0 ||
6561da177e4SLinus Torvalds iosapic_lists[iosapic_index].node == MAX_NUMNODES)
6571da177e4SLinus Torvalds goto skip_numa_setup;
6581da177e4SLinus Torvalds
659fbb776c3SRusty Russell cpu_mask = cpumask_of_node(iosapic_lists[iosapic_index].node);
660fbb776c3SRusty Russell num_cpus = 0;
661fbb776c3SRusty Russell for_each_cpu_and(numa_cpu, cpu_mask, &domain) {
662fbb776c3SRusty Russell if (cpu_online(numa_cpu))
663fbb776c3SRusty Russell num_cpus++;
6641da177e4SLinus Torvalds }
6651da177e4SLinus Torvalds
6661da177e4SLinus Torvalds if (!num_cpus)
6671da177e4SLinus Torvalds goto skip_numa_setup;
6681da177e4SLinus Torvalds
6694bbdec7aSYasuaki Ishimatsu /* Use irq assignment to distribute across cpus in node */
6704bbdec7aSYasuaki Ishimatsu cpu_index = irq % num_cpus;
6711da177e4SLinus Torvalds
672fbb776c3SRusty Russell for_each_cpu_and(numa_cpu, cpu_mask, &domain)
673fbb776c3SRusty Russell if (cpu_online(numa_cpu) && i++ >= cpu_index)
674fbb776c3SRusty Russell break;
6751da177e4SLinus Torvalds
676fbb776c3SRusty Russell if (numa_cpu < nr_cpu_ids)
6771da177e4SLinus Torvalds return cpu_physical_id(numa_cpu);
6781da177e4SLinus Torvalds }
6791da177e4SLinus Torvalds skip_numa_setup:
6801da177e4SLinus Torvalds #endif
6811da177e4SLinus Torvalds /*
6821da177e4SLinus Torvalds * Otherwise, round-robin interrupt vectors across all the
6831da177e4SLinus Torvalds * processors. (It'd be nice if we could be smarter in the
6841da177e4SLinus Torvalds * case of NUMA.)
6851da177e4SLinus Torvalds */
6861da177e4SLinus Torvalds do {
687fbb776c3SRusty Russell if (++cpu >= nr_cpu_ids)
6881da177e4SLinus Torvalds cpu = 0;
6895d2068daSRusty Russell } while (!cpu_online(cpu) || !cpumask_test_cpu(cpu, &domain));
6901da177e4SLinus Torvalds
6911da177e4SLinus Torvalds return cpu_physical_id(cpu);
69246cba3dcSSatoru Takeuchi #else /* CONFIG_SMP */
6931da177e4SLinus Torvalds return cpu_physical_id(smp_processor_id());
6941da177e4SLinus Torvalds #endif
6951da177e4SLinus Torvalds }
6961da177e4SLinus Torvalds
choose_dmode(void)697c9d059deSKenji Kaneshige static inline unsigned char choose_dmode(void)
698c9d059deSKenji Kaneshige {
699c9d059deSKenji Kaneshige #ifdef CONFIG_SMP
700c9d059deSKenji Kaneshige if (smp_int_redirect & SMP_IRQ_REDIRECTION)
701c9d059deSKenji Kaneshige return IOSAPIC_LOWEST_PRIORITY;
702c9d059deSKenji Kaneshige #endif
703c9d059deSKenji Kaneshige return IOSAPIC_FIXED;
704c9d059deSKenji Kaneshige }
705c9d059deSKenji Kaneshige
7061da177e4SLinus Torvalds /*
7071da177e4SLinus Torvalds * ACPI can describe IOSAPIC interrupts via static tables and namespace
7081da177e4SLinus Torvalds * methods. This provides an interface to register those interrupts and
7091da177e4SLinus Torvalds * program the IOSAPIC RTE.
7101da177e4SLinus Torvalds */
7111da177e4SLinus Torvalds int
iosapic_register_intr(unsigned int gsi,unsigned long polarity,unsigned long trigger)7121da177e4SLinus Torvalds iosapic_register_intr (unsigned int gsi,
7131da177e4SLinus Torvalds unsigned long polarity, unsigned long trigger)
7141da177e4SLinus Torvalds {
7154bbdec7aSYasuaki Ishimatsu int irq, mask = 1, err;
7161da177e4SLinus Torvalds unsigned int dest;
7171da177e4SLinus Torvalds unsigned long flags;
71824eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
71924eeb568SKenji Kaneshige u32 low32;
720c9d059deSKenji Kaneshige unsigned char dmode;
721dea1078eSThomas Gleixner struct irq_desc *desc;
72240598cbeSYasuaki Ishimatsu
7231da177e4SLinus Torvalds /*
7241da177e4SLinus Torvalds * If this GSI has already been registered (i.e., it's a
7251da177e4SLinus Torvalds * shared interrupt, or we lost a race to register it),
7261da177e4SLinus Torvalds * don't touch the RTE.
7271da177e4SLinus Torvalds */
7281da177e4SLinus Torvalds spin_lock_irqsave(&iosapic_lock, flags);
7294bbdec7aSYasuaki Ishimatsu irq = __gsi_to_irq(gsi);
7304bbdec7aSYasuaki Ishimatsu if (irq > 0) {
7314bbdec7aSYasuaki Ishimatsu rte = find_rte(irq, gsi);
732e1b30a39SYasuaki Ishimatsu if(iosapic_intr_info[irq].count == 0) {
733e1b30a39SYasuaki Ishimatsu assign_irq_vector(irq);
7344debd723SThomas Gleixner irq_init_desc(irq);
735e1b30a39SYasuaki Ishimatsu } else if (rte->refcnt != NO_REF_RTE) {
73624eeb568SKenji Kaneshige rte->refcnt++;
73740598cbeSYasuaki Ishimatsu goto unlock_iosapic_lock;
7381da177e4SLinus Torvalds }
739e1b30a39SYasuaki Ishimatsu } else
740e1b30a39SYasuaki Ishimatsu irq = create_irq();
7411da177e4SLinus Torvalds
74224eeb568SKenji Kaneshige /* If vector is running out, we try to find a sharable vector */
743eb21ab24SYasuaki Ishimatsu if (irq < 0) {
7444bbdec7aSYasuaki Ishimatsu irq = iosapic_find_sharable_irq(trigger, polarity);
7454bbdec7aSYasuaki Ishimatsu if (irq < 0)
74640598cbeSYasuaki Ishimatsu goto unlock_iosapic_lock;
7474bbdec7aSYasuaki Ishimatsu }
74824eeb568SKenji Kaneshige
749dea1078eSThomas Gleixner desc = irq_to_desc(irq);
750dea1078eSThomas Gleixner raw_spin_lock(&desc->lock);
7514bbdec7aSYasuaki Ishimatsu dest = get_target_cpu(gsi, irq);
752c9d059deSKenji Kaneshige dmode = choose_dmode();
753c9d059deSKenji Kaneshige err = register_intr(gsi, irq, dmode, polarity, trigger);
75414454a1bSKenji Kaneshige if (err < 0) {
755dea1078eSThomas Gleixner raw_spin_unlock(&desc->lock);
7564bbdec7aSYasuaki Ishimatsu irq = err;
757224685c0SKenji Kaneshige goto unlock_iosapic_lock;
75814454a1bSKenji Kaneshige }
7591da177e4SLinus Torvalds
76024eeb568SKenji Kaneshige /*
761e3a8f7b8SYasuaki Ishimatsu * If the vector is shared and already unmasked for other
762e3a8f7b8SYasuaki Ishimatsu * interrupt sources, don't mask it.
76324eeb568SKenji Kaneshige */
7644bbdec7aSYasuaki Ishimatsu low32 = iosapic_intr_info[irq].low32;
7654bbdec7aSYasuaki Ishimatsu if (irq_is_shared(irq) && !(low32 & IOSAPIC_MASK))
76624eeb568SKenji Kaneshige mask = 0;
7674bbdec7aSYasuaki Ishimatsu set_rte(gsi, irq, dest, mask);
7681da177e4SLinus Torvalds
7691da177e4SLinus Torvalds printk(KERN_INFO "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d\n",
7701da177e4SLinus Torvalds gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
7711da177e4SLinus Torvalds (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
7724bbdec7aSYasuaki Ishimatsu cpu_logical_id(dest), dest, irq_to_vector(irq));
773224685c0SKenji Kaneshige
774dea1078eSThomas Gleixner raw_spin_unlock(&desc->lock);
77540598cbeSYasuaki Ishimatsu unlock_iosapic_lock:
77640598cbeSYasuaki Ishimatsu spin_unlock_irqrestore(&iosapic_lock, flags);
7774bbdec7aSYasuaki Ishimatsu return irq;
7781da177e4SLinus Torvalds }
7791da177e4SLinus Torvalds
7801da177e4SLinus Torvalds void
iosapic_unregister_intr(unsigned int gsi)7811da177e4SLinus Torvalds iosapic_unregister_intr (unsigned int gsi)
7821da177e4SLinus Torvalds {
7831da177e4SLinus Torvalds unsigned long flags;
7844bbdec7aSYasuaki Ishimatsu int irq, index;
78524eeb568SKenji Kaneshige u32 low32;
7861da177e4SLinus Torvalds unsigned long trigger, polarity;
78724eeb568SKenji Kaneshige unsigned int dest;
78824eeb568SKenji Kaneshige struct iosapic_rte_info *rte;
7891da177e4SLinus Torvalds
7901da177e4SLinus Torvalds /*
7911da177e4SLinus Torvalds * If the irq associated with the gsi is not found,
7921da177e4SLinus Torvalds * iosapic_unregister_intr() is unbalanced. We need to check
7931da177e4SLinus Torvalds * this again after getting locks.
7941da177e4SLinus Torvalds */
7951da177e4SLinus Torvalds irq = gsi_to_irq(gsi);
7961da177e4SLinus Torvalds if (irq < 0) {
79746cba3dcSSatoru Takeuchi printk(KERN_ERR "iosapic_unregister_intr(%u) unbalanced\n",
79846cba3dcSSatoru Takeuchi gsi);
7991da177e4SLinus Torvalds WARN_ON(1);
8001da177e4SLinus Torvalds return;
8011da177e4SLinus Torvalds }
8021da177e4SLinus Torvalds
80340598cbeSYasuaki Ishimatsu spin_lock_irqsave(&iosapic_lock, flags);
8044bbdec7aSYasuaki Ishimatsu if ((rte = find_rte(irq, gsi)) == NULL) {
805e3a8f7b8SYasuaki Ishimatsu printk(KERN_ERR "iosapic_unregister_intr(%u) unbalanced\n",
80646cba3dcSSatoru Takeuchi gsi);
8071da177e4SLinus Torvalds WARN_ON(1);
80824eeb568SKenji Kaneshige goto out;
8091da177e4SLinus Torvalds }
8101da177e4SLinus Torvalds
81124eeb568SKenji Kaneshige if (--rte->refcnt > 0)
81224eeb568SKenji Kaneshige goto out;
8131da177e4SLinus Torvalds
814e1b30a39SYasuaki Ishimatsu rte->refcnt = NO_REF_RTE;
81540598cbeSYasuaki Ishimatsu
81624eeb568SKenji Kaneshige /* Mask the interrupt */
8174bbdec7aSYasuaki Ishimatsu low32 = iosapic_intr_info[irq].low32 | IOSAPIC_MASK;
818c1726d6fSYasuaki Ishimatsu iosapic_write(rte->iosapic, IOSAPIC_RTE_LOW(rte->rte_index), low32);
8191da177e4SLinus Torvalds
8204bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].count--;
8210e888adcSKenji Kaneshige index = find_iosapic(gsi);
8220e888adcSKenji Kaneshige iosapic_lists[index].rtes_inuse--;
8230e888adcSKenji Kaneshige WARN_ON(iosapic_lists[index].rtes_inuse < 0);
8241da177e4SLinus Torvalds
8254bbdec7aSYasuaki Ishimatsu trigger = iosapic_intr_info[irq].trigger;
8264bbdec7aSYasuaki Ishimatsu polarity = iosapic_intr_info[irq].polarity;
8274bbdec7aSYasuaki Ishimatsu dest = iosapic_intr_info[irq].dest;
82846cba3dcSSatoru Takeuchi printk(KERN_INFO
829e3a8f7b8SYasuaki Ishimatsu "GSI %u (%s, %s) -> CPU %d (0x%04x) vector %d unregistered\n",
83024eeb568SKenji Kaneshige gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
83124eeb568SKenji Kaneshige (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
8324bbdec7aSYasuaki Ishimatsu cpu_logical_id(dest), dest, irq_to_vector(irq));
8331da177e4SLinus Torvalds
834e1b30a39SYasuaki Ishimatsu if (iosapic_intr_info[irq].count == 0) {
835451fe00cSAlex Williamson #ifdef CONFIG_SMP
836451fe00cSAlex Williamson /* Clear affinity */
837*073352e9SSamuel Holland irq_data_update_affinity(irq_get_irq_data(irq), cpu_all_mask);
838451fe00cSAlex Williamson #endif
83924eeb568SKenji Kaneshige /* Clear the interrupt information */
840e1b30a39SYasuaki Ishimatsu iosapic_intr_info[irq].dest = 0;
841e1b30a39SYasuaki Ishimatsu iosapic_intr_info[irq].dmode = 0;
842e1b30a39SYasuaki Ishimatsu iosapic_intr_info[irq].polarity = 0;
843e1b30a39SYasuaki Ishimatsu iosapic_intr_info[irq].trigger = 0;
8444bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].low32 |= IOSAPIC_MASK;
84524eeb568SKenji Kaneshige
846e1b30a39SYasuaki Ishimatsu /* Destroy and reserve IRQ */
847e1b30a39SYasuaki Ishimatsu destroy_and_reserve_irq(irq);
84824eeb568SKenji Kaneshige }
84924eeb568SKenji Kaneshige out:
85040598cbeSYasuaki Ishimatsu spin_unlock_irqrestore(&iosapic_lock, flags);
8511da177e4SLinus Torvalds }
8521da177e4SLinus Torvalds
8531da177e4SLinus Torvalds /*
8541da177e4SLinus Torvalds * ACPI calls this when it finds an entry for a platform interrupt.
8551da177e4SLinus Torvalds */
8561da177e4SLinus Torvalds int __init
iosapic_register_platform_intr(u32 int_type,unsigned int gsi,int iosapic_vector,u16 eid,u16 id,unsigned long polarity,unsigned long trigger)8571da177e4SLinus Torvalds iosapic_register_platform_intr (u32 int_type, unsigned int gsi,
8581da177e4SLinus Torvalds int iosapic_vector, u16 eid, u16 id,
8591da177e4SLinus Torvalds unsigned long polarity, unsigned long trigger)
8601da177e4SLinus Torvalds {
8611da177e4SLinus Torvalds static const char * const name[] = {"unknown", "PMI", "INIT", "CPEI"};
8621da177e4SLinus Torvalds unsigned char delivery;
863eb21ab24SYasuaki Ishimatsu int irq, vector, mask = 0;
8641da177e4SLinus Torvalds unsigned int dest = ((id << 8) | eid) & 0xffff;
8651da177e4SLinus Torvalds
8661da177e4SLinus Torvalds switch (int_type) {
8671da177e4SLinus Torvalds case ACPI_INTERRUPT_PMI:
868e1b30a39SYasuaki Ishimatsu irq = vector = iosapic_vector;
8694994be1bSYasuaki Ishimatsu bind_irq_vector(irq, vector, CPU_MASK_ALL);
8701da177e4SLinus Torvalds /*
8711da177e4SLinus Torvalds * since PMI vector is alloc'd by FW(ACPI) not by kernel,
8721da177e4SLinus Torvalds * we need to make sure the vector is available
8731da177e4SLinus Torvalds */
8744bbdec7aSYasuaki Ishimatsu iosapic_reassign_vector(irq);
8751da177e4SLinus Torvalds delivery = IOSAPIC_PMI;
8761da177e4SLinus Torvalds break;
8771da177e4SLinus Torvalds case ACPI_INTERRUPT_INIT:
878eb21ab24SYasuaki Ishimatsu irq = create_irq();
879eb21ab24SYasuaki Ishimatsu if (irq < 0)
880d4ed8084SHarvey Harrison panic("%s: out of interrupt vectors!\n", __func__);
881eb21ab24SYasuaki Ishimatsu vector = irq_to_vector(irq);
8821da177e4SLinus Torvalds delivery = IOSAPIC_INIT;
8831da177e4SLinus Torvalds break;
8841da177e4SLinus Torvalds case ACPI_INTERRUPT_CPEI:
885e1b30a39SYasuaki Ishimatsu irq = vector = IA64_CPE_VECTOR;
8864994be1bSYasuaki Ishimatsu BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL));
887aa0ebec9SKenji Kaneshige delivery = IOSAPIC_FIXED;
8881da177e4SLinus Torvalds mask = 1;
8891da177e4SLinus Torvalds break;
8901da177e4SLinus Torvalds default:
891d4ed8084SHarvey Harrison printk(KERN_ERR "%s: invalid int type 0x%x\n", __func__,
89246cba3dcSSatoru Takeuchi int_type);
8931da177e4SLinus Torvalds return -1;
8941da177e4SLinus Torvalds }
8951da177e4SLinus Torvalds
8964bbdec7aSYasuaki Ishimatsu register_intr(gsi, irq, delivery, polarity, trigger);
8971da177e4SLinus Torvalds
89846cba3dcSSatoru Takeuchi printk(KERN_INFO
89946cba3dcSSatoru Takeuchi "PLATFORM int %s (0x%x): GSI %u (%s, %s) -> CPU %d (0x%04x)"
90046cba3dcSSatoru Takeuchi " vector %d\n",
9011da177e4SLinus Torvalds int_type < ARRAY_SIZE(name) ? name[int_type] : "unknown",
9021da177e4SLinus Torvalds int_type, gsi, (trigger == IOSAPIC_EDGE ? "edge" : "level"),
9031da177e4SLinus Torvalds (polarity == IOSAPIC_POL_HIGH ? "high" : "low"),
9041da177e4SLinus Torvalds cpu_logical_id(dest), dest, vector);
9051da177e4SLinus Torvalds
9064bbdec7aSYasuaki Ishimatsu set_rte(gsi, irq, dest, mask);
9071da177e4SLinus Torvalds return vector;
9081da177e4SLinus Torvalds }
9091da177e4SLinus Torvalds
9101da177e4SLinus Torvalds /*
9111da177e4SLinus Torvalds * ACPI calls this when it finds an entry for a legacy ISA IRQ override.
9121da177e4SLinus Torvalds */
iosapic_override_isa_irq(unsigned int isa_irq,unsigned int gsi,unsigned long polarity,unsigned long trigger)9135b5e76e9SGreg Kroah-Hartman void iosapic_override_isa_irq(unsigned int isa_irq, unsigned int gsi,
9145b5e76e9SGreg Kroah-Hartman unsigned long polarity, unsigned long trigger)
9151da177e4SLinus Torvalds {
9164bbdec7aSYasuaki Ishimatsu int vector, irq;
9171da177e4SLinus Torvalds unsigned int dest = cpu_physical_id(smp_processor_id());
918c9d059deSKenji Kaneshige unsigned char dmode;
9191da177e4SLinus Torvalds
920e1b30a39SYasuaki Ishimatsu irq = vector = isa_irq_to_vector(isa_irq);
9214994be1bSYasuaki Ishimatsu BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL));
922c9d059deSKenji Kaneshige dmode = choose_dmode();
923c9d059deSKenji Kaneshige register_intr(gsi, irq, dmode, polarity, trigger);
9241da177e4SLinus Torvalds
9251da177e4SLinus Torvalds DBG("ISA: IRQ %u -> GSI %u (%s,%s) -> CPU %d (0x%04x) vector %d\n",
9261da177e4SLinus Torvalds isa_irq, gsi, trigger == IOSAPIC_EDGE ? "edge" : "level",
9271da177e4SLinus Torvalds polarity == IOSAPIC_POL_HIGH ? "high" : "low",
9281da177e4SLinus Torvalds cpu_logical_id(dest), dest, vector);
9291da177e4SLinus Torvalds
9304bbdec7aSYasuaki Ishimatsu set_rte(gsi, irq, dest, 1);
9311da177e4SLinus Torvalds }
9321da177e4SLinus Torvalds
9331da177e4SLinus Torvalds void __init
ia64_native_iosapic_pcat_compat_init(void)93433b39e84SIsaku Yamahata ia64_native_iosapic_pcat_compat_init(void)
93533b39e84SIsaku Yamahata {
93633b39e84SIsaku Yamahata if (pcat_compat) {
93733b39e84SIsaku Yamahata /*
93833b39e84SIsaku Yamahata * Disable the compatibility mode interrupts (8259 style),
93933b39e84SIsaku Yamahata * needs IN/OUT support enabled.
94033b39e84SIsaku Yamahata */
94133b39e84SIsaku Yamahata printk(KERN_INFO
94233b39e84SIsaku Yamahata "%s: Disabling PC-AT compatible 8259 interrupts\n",
94333b39e84SIsaku Yamahata __func__);
94433b39e84SIsaku Yamahata outb(0xff, 0xA1);
94533b39e84SIsaku Yamahata outb(0xff, 0x21);
94633b39e84SIsaku Yamahata }
94733b39e84SIsaku Yamahata }
94833b39e84SIsaku Yamahata
94933b39e84SIsaku Yamahata void __init
iosapic_system_init(int system_pcat_compat)9501da177e4SLinus Torvalds iosapic_system_init (int system_pcat_compat)
9511da177e4SLinus Torvalds {
9524bbdec7aSYasuaki Ishimatsu int irq;
9531da177e4SLinus Torvalds
9544bbdec7aSYasuaki Ishimatsu for (irq = 0; irq < NR_IRQS; ++irq) {
9554bbdec7aSYasuaki Ishimatsu iosapic_intr_info[irq].low32 = IOSAPIC_MASK;
95646cba3dcSSatoru Takeuchi /* mark as unused */
9574bbdec7aSYasuaki Ishimatsu INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes);
958e1b30a39SYasuaki Ishimatsu
959e1b30a39SYasuaki Ishimatsu iosapic_intr_info[irq].count = 0;
96024eeb568SKenji Kaneshige }
9611da177e4SLinus Torvalds
9621da177e4SLinus Torvalds pcat_compat = system_pcat_compat;
96333b39e84SIsaku Yamahata if (pcat_compat)
96433b39e84SIsaku Yamahata iosapic_pcat_compat_init();
9651da177e4SLinus Torvalds }
9661da177e4SLinus Torvalds
9670e888adcSKenji Kaneshige static inline int
iosapic_alloc(void)9680e888adcSKenji Kaneshige iosapic_alloc (void)
9690e888adcSKenji Kaneshige {
9700e888adcSKenji Kaneshige int index;
9710e888adcSKenji Kaneshige
9720e888adcSKenji Kaneshige for (index = 0; index < NR_IOSAPICS; index++)
9730e888adcSKenji Kaneshige if (!iosapic_lists[index].addr)
9740e888adcSKenji Kaneshige return index;
9750e888adcSKenji Kaneshige
976d4ed8084SHarvey Harrison printk(KERN_WARNING "%s: failed to allocate iosapic\n", __func__);
9770e888adcSKenji Kaneshige return -1;
9780e888adcSKenji Kaneshige }
9790e888adcSKenji Kaneshige
9800e888adcSKenji Kaneshige static inline void
iosapic_free(int index)9810e888adcSKenji Kaneshige iosapic_free (int index)
9820e888adcSKenji Kaneshige {
9830e888adcSKenji Kaneshige memset(&iosapic_lists[index], 0, sizeof(iosapic_lists[0]));
9840e888adcSKenji Kaneshige }
9850e888adcSKenji Kaneshige
9860e888adcSKenji Kaneshige static inline int
iosapic_check_gsi_range(unsigned int gsi_base,unsigned int ver)9870e888adcSKenji Kaneshige iosapic_check_gsi_range (unsigned int gsi_base, unsigned int ver)
9880e888adcSKenji Kaneshige {
9890e888adcSKenji Kaneshige int index;
9900e888adcSKenji Kaneshige unsigned int gsi_end, base, end;
9910e888adcSKenji Kaneshige
9920e888adcSKenji Kaneshige /* check gsi range */
9930e888adcSKenji Kaneshige gsi_end = gsi_base + ((ver >> 16) & 0xff);
9940e888adcSKenji Kaneshige for (index = 0; index < NR_IOSAPICS; index++) {
9950e888adcSKenji Kaneshige if (!iosapic_lists[index].addr)
9960e888adcSKenji Kaneshige continue;
9970e888adcSKenji Kaneshige
9980e888adcSKenji Kaneshige base = iosapic_lists[index].gsi_base;
9990e888adcSKenji Kaneshige end = base + iosapic_lists[index].num_rte - 1;
10000e888adcSKenji Kaneshige
1001e6d1ba5cSSatoru Takeuchi if (gsi_end < base || end < gsi_base)
10020e888adcSKenji Kaneshige continue; /* OK */
10030e888adcSKenji Kaneshige
10040e888adcSKenji Kaneshige return -EBUSY;
10050e888adcSKenji Kaneshige }
10060e888adcSKenji Kaneshige return 0;
10070e888adcSKenji Kaneshige }
10080e888adcSKenji Kaneshige
1009ffa90955SHanjun Guo static int
iosapic_delete_rte(unsigned int irq,unsigned int gsi)1010ffa90955SHanjun Guo iosapic_delete_rte(unsigned int irq, unsigned int gsi)
1011ffa90955SHanjun Guo {
1012ffa90955SHanjun Guo struct iosapic_rte_info *rte, *temp;
1013ffa90955SHanjun Guo
1014ffa90955SHanjun Guo list_for_each_entry_safe(rte, temp, &iosapic_intr_info[irq].rtes,
1015ffa90955SHanjun Guo rte_list) {
1016ffa90955SHanjun Guo if (rte->iosapic->gsi_base + rte->rte_index == gsi) {
1017ffa90955SHanjun Guo if (rte->refcnt)
1018ffa90955SHanjun Guo return -EBUSY;
1019ffa90955SHanjun Guo
1020ffa90955SHanjun Guo list_del(&rte->rte_list);
1021ffa90955SHanjun Guo kfree(rte);
1022ffa90955SHanjun Guo return 0;
1023ffa90955SHanjun Guo }
1024ffa90955SHanjun Guo }
1025ffa90955SHanjun Guo
1026ffa90955SHanjun Guo return -EINVAL;
1027ffa90955SHanjun Guo }
1028ffa90955SHanjun Guo
iosapic_init(unsigned long phys_addr,unsigned int gsi_base)10295b5e76e9SGreg Kroah-Hartman int iosapic_init(unsigned long phys_addr, unsigned int gsi_base)
10301da177e4SLinus Torvalds {
10310e888adcSKenji Kaneshige int num_rte, err, index;
10321da177e4SLinus Torvalds unsigned int isa_irq, ver;
10331da177e4SLinus Torvalds char __iomem *addr;
10340e888adcSKenji Kaneshige unsigned long flags;
10351da177e4SLinus Torvalds
10360e888adcSKenji Kaneshige spin_lock_irqsave(&iosapic_lock, flags);
1037c1726d6fSYasuaki Ishimatsu index = find_iosapic(gsi_base);
1038c1726d6fSYasuaki Ishimatsu if (index >= 0) {
1039c1726d6fSYasuaki Ishimatsu spin_unlock_irqrestore(&iosapic_lock, flags);
1040c1726d6fSYasuaki Ishimatsu return -EBUSY;
1041c1726d6fSYasuaki Ishimatsu }
1042c1726d6fSYasuaki Ishimatsu
10431da177e4SLinus Torvalds addr = ioremap(phys_addr, 0);
1044e7369e01SRoel Kluin if (addr == NULL) {
1045e7369e01SRoel Kluin spin_unlock_irqrestore(&iosapic_lock, flags);
1046e7369e01SRoel Kluin return -ENOMEM;
1047e7369e01SRoel Kluin }
10481da177e4SLinus Torvalds ver = iosapic_version(addr);
10490e888adcSKenji Kaneshige if ((err = iosapic_check_gsi_range(gsi_base, ver))) {
10500e888adcSKenji Kaneshige iounmap(addr);
10510e888adcSKenji Kaneshige spin_unlock_irqrestore(&iosapic_lock, flags);
10520e888adcSKenji Kaneshige return err;
10530e888adcSKenji Kaneshige }
10540e888adcSKenji Kaneshige
10551da177e4SLinus Torvalds /*
1056e3a8f7b8SYasuaki Ishimatsu * The MAX_REDIR register holds the highest input pin number
1057e3a8f7b8SYasuaki Ishimatsu * (starting from 0). We add 1 so that we can use it for
1058e3a8f7b8SYasuaki Ishimatsu * number of pins (= RTEs)
10591da177e4SLinus Torvalds */
10601da177e4SLinus Torvalds num_rte = ((ver >> 16) & 0xff) + 1;
10611da177e4SLinus Torvalds
10620e888adcSKenji Kaneshige index = iosapic_alloc();
10630e888adcSKenji Kaneshige iosapic_lists[index].addr = addr;
10640e888adcSKenji Kaneshige iosapic_lists[index].gsi_base = gsi_base;
10650e888adcSKenji Kaneshige iosapic_lists[index].num_rte = num_rte;
10661da177e4SLinus Torvalds #ifdef CONFIG_NUMA
10670e888adcSKenji Kaneshige iosapic_lists[index].node = MAX_NUMNODES;
10681da177e4SLinus Torvalds #endif
1069c1726d6fSYasuaki Ishimatsu spin_lock_init(&iosapic_lists[index].lock);
10700e888adcSKenji Kaneshige spin_unlock_irqrestore(&iosapic_lock, flags);
10711da177e4SLinus Torvalds
10721da177e4SLinus Torvalds if ((gsi_base == 0) && pcat_compat) {
10731da177e4SLinus Torvalds /*
107446cba3dcSSatoru Takeuchi * Map the legacy ISA devices into the IOSAPIC data. Some of
107546cba3dcSSatoru Takeuchi * these may get reprogrammed later on with data from the ACPI
107646cba3dcSSatoru Takeuchi * Interrupt Source Override table.
10771da177e4SLinus Torvalds */
10781da177e4SLinus Torvalds for (isa_irq = 0; isa_irq < 16; ++isa_irq)
107946cba3dcSSatoru Takeuchi iosapic_override_isa_irq(isa_irq, isa_irq,
108046cba3dcSSatoru Takeuchi IOSAPIC_POL_HIGH,
108146cba3dcSSatoru Takeuchi IOSAPIC_EDGE);
10821da177e4SLinus Torvalds }
10830e888adcSKenji Kaneshige return 0;
10841da177e4SLinus Torvalds }
10851da177e4SLinus Torvalds
iosapic_remove(unsigned int gsi_base)10865b5e76e9SGreg Kroah-Hartman int iosapic_remove(unsigned int gsi_base)
10870e888adcSKenji Kaneshige {
1088ffa90955SHanjun Guo int i, irq, index, err = 0;
10890e888adcSKenji Kaneshige unsigned long flags;
10900e888adcSKenji Kaneshige
10910e888adcSKenji Kaneshige spin_lock_irqsave(&iosapic_lock, flags);
10920e888adcSKenji Kaneshige index = find_iosapic(gsi_base);
10930e888adcSKenji Kaneshige if (index < 0) {
10940e888adcSKenji Kaneshige printk(KERN_WARNING "%s: No IOSAPIC for GSI base %u\n",
1095d4ed8084SHarvey Harrison __func__, gsi_base);
10960e888adcSKenji Kaneshige goto out;
10970e888adcSKenji Kaneshige }
10980e888adcSKenji Kaneshige
10990e888adcSKenji Kaneshige if (iosapic_lists[index].rtes_inuse) {
11000e888adcSKenji Kaneshige err = -EBUSY;
1101e3a8f7b8SYasuaki Ishimatsu printk(KERN_WARNING "%s: IOSAPIC for GSI base %u is busy\n",
1102d4ed8084SHarvey Harrison __func__, gsi_base);
11030e888adcSKenji Kaneshige goto out;
11040e888adcSKenji Kaneshige }
11050e888adcSKenji Kaneshige
1106ffa90955SHanjun Guo for (i = gsi_base; i < gsi_base + iosapic_lists[index].num_rte; i++) {
1107ffa90955SHanjun Guo irq = __gsi_to_irq(i);
1108ffa90955SHanjun Guo if (irq < 0)
1109ffa90955SHanjun Guo continue;
1110ffa90955SHanjun Guo
1111ffa90955SHanjun Guo err = iosapic_delete_rte(irq, i);
1112ffa90955SHanjun Guo if (err)
1113ffa90955SHanjun Guo goto out;
1114ffa90955SHanjun Guo }
1115ffa90955SHanjun Guo
11160e888adcSKenji Kaneshige iounmap(iosapic_lists[index].addr);
11170e888adcSKenji Kaneshige iosapic_free(index);
11180e888adcSKenji Kaneshige out:
11190e888adcSKenji Kaneshige spin_unlock_irqrestore(&iosapic_lock, flags);
11200e888adcSKenji Kaneshige return err;
11210e888adcSKenji Kaneshige }
11220e888adcSKenji Kaneshige
11231da177e4SLinus Torvalds #ifdef CONFIG_NUMA
map_iosapic_to_node(unsigned int gsi_base,int node)11245b5e76e9SGreg Kroah-Hartman void map_iosapic_to_node(unsigned int gsi_base, int node)
11251da177e4SLinus Torvalds {
11261da177e4SLinus Torvalds int index;
11271da177e4SLinus Torvalds
11281da177e4SLinus Torvalds index = find_iosapic(gsi_base);
11291da177e4SLinus Torvalds if (index < 0) {
11301da177e4SLinus Torvalds printk(KERN_WARNING "%s: No IOSAPIC for GSI %u\n",
1131d4ed8084SHarvey Harrison __func__, gsi_base);
11321da177e4SLinus Torvalds return;
11331da177e4SLinus Torvalds }
11341da177e4SLinus Torvalds iosapic_lists[index].node = node;
11351da177e4SLinus Torvalds return;
11361da177e4SLinus Torvalds }
11371da177e4SLinus Torvalds #endif
1138