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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmscc,ocelot-icpu-intr.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/mscc,ocelot-icpu-intr.yaml#
7 title: Microsemi Ocelot SoC ICPU Interrupt Controller
17 ICPU. It is connected directly to the MIPS core interrupt
24 - mscc,jaguar2-icpu-intr
25 - mscc,luton-icpu-intr
26 - mscc,ocelot-icpu-intr
27 - mscc,serval-icpu-intr
56 compatible = "mscc,ocelot-icpu-intr";
/openbmc/linux/kernel/irq/
H A Dipi-mux.c31 struct ipi_mux_cpu *icpu = this_cpu_ptr(ipi_mux_pcpu); in ipi_mux_mask() local
33 atomic_andnot(BIT(irqd_to_hwirq(d)), &icpu->enable); in ipi_mux_mask()
38 struct ipi_mux_cpu *icpu = this_cpu_ptr(ipi_mux_pcpu); in ipi_mux_unmask() local
41 atomic_or(ibit, &icpu->enable); in ipi_mux_unmask()
50 if (atomic_read(&icpu->bits) & ibit) in ipi_mux_unmask()
56 struct ipi_mux_cpu *icpu = this_cpu_ptr(ipi_mux_pcpu); in ipi_mux_send_mask() local
62 icpu = per_cpu_ptr(ipi_mux_pcpu, cpu); in ipi_mux_send_mask()
71 pending = atomic_fetch_or_release(ibit, &icpu->bits); in ipi_mux_send_mask()
86 if (!(pending & ibit) && (atomic_read(&icpu->enable) & ibit)) in ipi_mux_send_mask()
122 struct ipi_mux_cpu *icpu = this_cpu_ptr(ipi_mux_pcpu); in ipi_mux_process() local
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/openbmc/linux/drivers/irqchip/
H A Dirq-mscc-ocelot.c137 "icpu", handle_level_irq, in vcoreiii_irq_init()
194 IRQCHIP_DECLARE(ocelot_icpu, "mscc,ocelot-icpu-intr", ocelot_irq_init);
202 IRQCHIP_DECLARE(serval_icpu, "mscc,serval-icpu-intr", serval_irq_init);
210 IRQCHIP_DECLARE(luton_icpu, "mscc,luton-icpu-intr", luton_irq_init);
218 IRQCHIP_DECLARE(jaguar2_icpu, "mscc,jaguar2-icpu-intr", jaguar2_irq_init);
/openbmc/linux/drivers/idle/
H A Dintel_idle.c97 static const struct idle_cpu *icpu __initdata;
1935 ((icpu->use_acpi || force_use_acpi) && in intel_idle_init_cstates_icpu()
1946 if (icpu->byt_auto_demotion_disable_flag) { in intel_idle_init_cstates_icpu()
1965 if (icpu) in intel_idle_cpuidle_driver_init()
2097 icpu = (const struct idle_cpu *)id->driver_data; in intel_idle_init()
2098 if (icpu) { in intel_idle_init()
2099 cpuidle_state_table = icpu->state_table; in intel_idle_init()
2100 auto_demotion_disable_flags = icpu->auto_demotion_disable_flags; in intel_idle_init()
2101 if (icpu->disable_promotion_to_c1e) in intel_idle_init()
2103 if (icpu in intel_idle_init()
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/openbmc/linux/drivers/net/dsa/
H A Dvitesse-vsc73xx-core.c468 dev_err(vsc->dev, "unable to read iCPU control\n"); in vsc73xx_detect()
472 /* The iCPU can always be used but can boot in different ways. in vsc73xx_detect()
482 "iCPU enabled boots from SI, has external memory\n"); in vsc73xx_detect()
488 "iCPU enabled boots from PI/SI, no external memory\n"); in vsc73xx_detect()
493 "iCPU enabled, boots from PI external memory\n"); in vsc73xx_detect()
498 dev_info(vsc->dev, "iCPU disabled, no external memory\n"); in vsc73xx_detect()
/openbmc/linux/arch/mips/boot/dts/mscc/
H A Dluton.dtsi60 compatible = "mscc,luton-icpu-intr";
H A Dserval.dtsi63 compatible = "mscc,serval-icpu-intr";
H A Djaguar2.dtsi64 compatible = "mscc,jaguar2-icpu-intr";
H A Docelot.dtsi60 compatible = "mscc,ocelot-icpu-intr";
/openbmc/u-boot/arch/mips/dts/
H A Dmscc,serval.dtsi66 compatible = "mscc,serval-icpu-intr";
H A Dmscc,servalt.dtsi66 compatible = "mscc,servalt-icpu-intr";
H A Dmscc,jr2.dtsi60 compatible = "mscc,jr2-icpu-intr";
H A Dmscc,ocelot.dtsi66 compatible = "mscc,ocelot-icpu-intr";
/openbmc/linux/
H A Dopengrok2.0.log[all...]