/openbmc/linux/arch/arm64/boot/dts/hisilicon/ |
H A D | hip07-d05.dts | 10 #include "hip07.dtsi" 13 model = "Hisilicon Hip07 D05 Development Board"; 14 compatible = "hisilicon,hip07-d05";
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H A D | Makefile | 8 dtb-$(CONFIG_ARCH_HISI) += hip07-d05.dtb
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H A D | hip07.dtsi | 11 compatible = "hisilicon,hip07-d05"; 1183 * of HiSilicon platforms hip06/hip07 to support the SMMUv3 1192 * hip07 is disabled as this will break the PCIe functionality 1260 compatible = "hisilicon,hip07-lpc"; 1604 compatible = "hisilicon,hip07-sas-v2"; 1645 compatible = "hisilicon,hip07-sas-v2"; 1687 compatible = "hisilicon,hip07-sas-v2"; 1728 compatible = "hisilicon,hip07-pcie-ecam"; 1749 compatible = "hisilicon,hip07-sec"; 1790 compatible = "hisilicon,hip07-sec"; [all …]
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H A D | hip06.dtsi | 328 * of HiSilicon platforms hip06/hip07 to support the SMMUv3
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/openbmc/linux/Documentation/devicetree/bindings/crypto/ |
H A D | hisilicon,hip07-sec.txt | 1 * Hisilicon hip07 Security Accelerator (SEC) 6 - "hisilicon,hip07-sec" 28 compatible = "hisilicon,hip07-sec";
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/openbmc/linux/Documentation/devicetree/bindings/arm/hisilicon/ |
H A D | hisilicon.yaml | 59 - description: HiP07 D05 Board 61 - const: hisilicon,hip07-d05
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H A D | low-pin-count.yaml | 29 - hisilicon,hip07-lpc
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/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | host-generic-pci.yaml | 60 HiSilicon Hip06/Hip07 PCIe host bridge in almost-ECAM mode. Some 65 - hisilicon,hip07-pcie-ecam 137 - hisilicon,hip07-pcie-ecam
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/openbmc/linux/drivers/acpi/ |
H A D | pci_mcfg.c | 78 HISI_QUAD_DOM("HIP07 ", 0, &hisi_pcie_ops), 79 HISI_QUAD_DOM("HIP07 ", 4, &hisi_pcie_ops), 80 HISI_QUAD_DOM("HIP07 ", 8, &hisi_pcie_ops), 81 HISI_QUAD_DOM("HIP07 ", 12, &hisi_pcie_ops),
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/openbmc/linux/Documentation/devicetree/bindings/scsi/ |
H A D | hisilicon-sas.txt | 9 (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset
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/openbmc/linux/drivers/crypto/hisilicon/ |
H A D | Kconfig | 12 Support for Hisilicon SEC Engine in Hip06 and Hip07
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/openbmc/linux/drivers/pci/controller/dwc/ |
H A D | pcie-hisi.c | 163 .compatible = "hisilicon,hip07-pcie-ecam",
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/openbmc/linux/drivers/crypto/hisilicon/sec/ |
H A D | sec_drv.c | 3 * Driver for the HiSilicon SEC units found on Hip06 Hip07 1296 { .compatible = "hisilicon,hip07-sec" },
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/openbmc/linux/drivers/bus/ |
H A D | hisi_lpc.c | 678 { .compatible = "hisilicon,hip07-lpc", },
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/openbmc/linux/drivers/cpufreq/ |
H A D | cppc_cpufreq.c | 48 .oem_table_id = "HIP07 ",
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/openbmc/linux/arch/arm64/ |
H A D | Kconfig | 1209 bool "Hip07 161600802: Erroneous redistributor VLPI base" 1212 The HiSilicon Hip07 SoC uses the wrong redistributor base
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/openbmc/linux/drivers/irqchip/ |
H A D | irq-gic-v3.c | 1803 * HIP07 doesn't even have a proper IIDR, and still pretends to in gic_enable_quirk_hip06_07() 1898 .desc = "GICv3: HIP07 erratum 161010803",
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H A D | irq-gic-v3-its.c | 4738 * Hip07 insists on using the wrong address for the VLPI in its_enable_quirk_hip07_161600802() 4807 .desc = "ITS: Hip07 erratum 161600802",
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/openbmc/linux/drivers/clocksource/ |
H A D | arm_arch_timer.c | 351 .oem_table_id = "HIP07 ",
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/openbmc/linux/Documentation/arch/arm64/ |
H A D | silicon-errata.rst | 243 | Hisilicon | Hip07 | #161600802 | HISILICON_ERRATUM_161600802 |
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/openbmc/linux/drivers/scsi/hisi_sas/ |
H A D | hisi_sas_v2_hw.c | 3630 { .compatible = "hisilicon,hip07-sas-v2",},
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/openbmc/linux/ |
H A D | opengrok2.0.log | [all...] |
H A D | opengrok0.0.log | [all...] |
H A D | opengrok1.0.log | [all...] |