1cb849fc5SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2935c760eSTomasz Nowicki /*
3935c760eSTomasz Nowicki * Copyright (C) 2016 Broadcom
4935c760eSTomasz Nowicki * Author: Jayachandran C <jchandra@broadcom.com>
5935c760eSTomasz Nowicki * Copyright (C) 2016 Semihalf
6935c760eSTomasz Nowicki * Author: Tomasz Nowicki <tn@semihalf.com>
7935c760eSTomasz Nowicki */
8935c760eSTomasz Nowicki
9935c760eSTomasz Nowicki #define pr_fmt(fmt) "ACPI: " fmt
10935c760eSTomasz Nowicki
11935c760eSTomasz Nowicki #include <linux/kernel.h>
12935c760eSTomasz Nowicki #include <linux/pci.h>
13935c760eSTomasz Nowicki #include <linux/pci-acpi.h>
1413983eb8STomasz Nowicki #include <linux/pci-ecam.h>
15935c760eSTomasz Nowicki
16935c760eSTomasz Nowicki /* Structure to hold entries from the MCFG table */
17935c760eSTomasz Nowicki struct mcfg_entry {
18935c760eSTomasz Nowicki struct list_head list;
19935c760eSTomasz Nowicki phys_addr_t addr;
20935c760eSTomasz Nowicki u16 segment;
21935c760eSTomasz Nowicki u8 bus_start;
22935c760eSTomasz Nowicki u8 bus_end;
23935c760eSTomasz Nowicki };
24935c760eSTomasz Nowicki
255b69b85bSTomasz Nowicki #ifdef CONFIG_PCI_QUIRKS
265b69b85bSTomasz Nowicki struct mcfg_fixup {
275b69b85bSTomasz Nowicki char oem_id[ACPI_OEM_ID_SIZE + 1];
285b69b85bSTomasz Nowicki char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
295b69b85bSTomasz Nowicki u32 oem_revision;
305b69b85bSTomasz Nowicki u16 segment;
315b69b85bSTomasz Nowicki struct resource bus_range;
320b104773SRob Herring const struct pci_ecam_ops *ops;
335b69b85bSTomasz Nowicki struct resource cfgres;
345b69b85bSTomasz Nowicki };
355b69b85bSTomasz Nowicki
365b69b85bSTomasz Nowicki #define MCFG_BUS_RANGE(start, end) DEFINE_RES_NAMED((start), \
375b69b85bSTomasz Nowicki ((end) - (start) + 1), \
385b69b85bSTomasz Nowicki NULL, IORESOURCE_BUS)
395b69b85bSTomasz Nowicki #define MCFG_BUS_ANY MCFG_BUS_RANGE(0x0, 0xff)
405b69b85bSTomasz Nowicki
415b69b85bSTomasz Nowicki static struct mcfg_fixup mcfg_quirks[] = {
425b69b85bSTomasz Nowicki /* { OEM_ID, OEM_TABLE_ID, REV, SEGMENT, BUS_RANGE, ops, cfgres }, */
432ca5b8ddSChristopher Covington
4440a6cc14SHuacai Chen #ifdef CONFIG_ARM64
4540a6cc14SHuacai Chen
464166bfe5SJonathan Chocron #define AL_ECAM(table_id, rev, seg, ops) \
474166bfe5SJonathan Chocron { "AMAZON", table_id, rev, seg, MCFG_BUS_ANY, ops }
484166bfe5SJonathan Chocron
494166bfe5SJonathan Chocron AL_ECAM("GRAVITON", 0, 0, &al_pcie_ops),
504166bfe5SJonathan Chocron AL_ECAM("GRAVITON", 0, 1, &al_pcie_ops),
514166bfe5SJonathan Chocron AL_ECAM("GRAVITON", 0, 2, &al_pcie_ops),
524166bfe5SJonathan Chocron AL_ECAM("GRAVITON", 0, 3, &al_pcie_ops),
534166bfe5SJonathan Chocron AL_ECAM("GRAVITON", 0, 4, &al_pcie_ops),
544166bfe5SJonathan Chocron AL_ECAM("GRAVITON", 0, 5, &al_pcie_ops),
554166bfe5SJonathan Chocron AL_ECAM("GRAVITON", 0, 6, &al_pcie_ops),
564166bfe5SJonathan Chocron AL_ECAM("GRAVITON", 0, 7, &al_pcie_ops),
574166bfe5SJonathan Chocron
582ca5b8ddSChristopher Covington #define QCOM_ECAM32(seg) \
592ca5b8ddSChristopher Covington { "QCOM ", "QDF2432 ", 1, seg, MCFG_BUS_ANY, &pci_32b_ops }
60ced414a1SBjorn Helgaas
612ca5b8ddSChristopher Covington QCOM_ECAM32(0),
622ca5b8ddSChristopher Covington QCOM_ECAM32(1),
632ca5b8ddSChristopher Covington QCOM_ECAM32(2),
642ca5b8ddSChristopher Covington QCOM_ECAM32(3),
652ca5b8ddSChristopher Covington QCOM_ECAM32(4),
662ca5b8ddSChristopher Covington QCOM_ECAM32(5),
672ca5b8ddSChristopher Covington QCOM_ECAM32(6),
682ca5b8ddSChristopher Covington QCOM_ECAM32(7),
695f00f1a0SDongdong Liu
705f00f1a0SDongdong Liu #define HISI_QUAD_DOM(table_id, seg, ops) \
715f00f1a0SDongdong Liu { "HISI ", table_id, 0, (seg) + 0, MCFG_BUS_ANY, ops }, \
725f00f1a0SDongdong Liu { "HISI ", table_id, 0, (seg) + 1, MCFG_BUS_ANY, ops }, \
735f00f1a0SDongdong Liu { "HISI ", table_id, 0, (seg) + 2, MCFG_BUS_ANY, ops }, \
745f00f1a0SDongdong Liu { "HISI ", table_id, 0, (seg) + 3, MCFG_BUS_ANY, ops }
75ced414a1SBjorn Helgaas
765f00f1a0SDongdong Liu HISI_QUAD_DOM("HIP05 ", 0, &hisi_pcie_ops),
775f00f1a0SDongdong Liu HISI_QUAD_DOM("HIP06 ", 0, &hisi_pcie_ops),
785f00f1a0SDongdong Liu HISI_QUAD_DOM("HIP07 ", 0, &hisi_pcie_ops),
795f00f1a0SDongdong Liu HISI_QUAD_DOM("HIP07 ", 4, &hisi_pcie_ops),
805f00f1a0SDongdong Liu HISI_QUAD_DOM("HIP07 ", 8, &hisi_pcie_ops),
815f00f1a0SDongdong Liu HISI_QUAD_DOM("HIP07 ", 12, &hisi_pcie_ops),
8244f22bd9STomasz Nowicki
8344f22bd9STomasz Nowicki #define THUNDER_PEM_RES(addr, node) \
8444f22bd9STomasz Nowicki DEFINE_RES_MEM((addr) + ((u64) (node) << 44), 0x39 * SZ_16M)
85ced414a1SBjorn Helgaas
8644f22bd9STomasz Nowicki #define THUNDER_PEM_QUIRK(rev, node) \
8744f22bd9STomasz Nowicki { "CAVIUM", "THUNDERX", rev, 4 + (10 * (node)), MCFG_BUS_ANY, \
8844f22bd9STomasz Nowicki &thunder_pem_ecam_ops, THUNDER_PEM_RES(0x88001f000000UL, node) }, \
8944f22bd9STomasz Nowicki { "CAVIUM", "THUNDERX", rev, 5 + (10 * (node)), MCFG_BUS_ANY, \
9044f22bd9STomasz Nowicki &thunder_pem_ecam_ops, THUNDER_PEM_RES(0x884057000000UL, node) }, \
9144f22bd9STomasz Nowicki { "CAVIUM", "THUNDERX", rev, 6 + (10 * (node)), MCFG_BUS_ANY, \
9244f22bd9STomasz Nowicki &thunder_pem_ecam_ops, THUNDER_PEM_RES(0x88808f000000UL, node) }, \
9344f22bd9STomasz Nowicki { "CAVIUM", "THUNDERX", rev, 7 + (10 * (node)), MCFG_BUS_ANY, \
9444f22bd9STomasz Nowicki &thunder_pem_ecam_ops, THUNDER_PEM_RES(0x89001f000000UL, node) }, \
9544f22bd9STomasz Nowicki { "CAVIUM", "THUNDERX", rev, 8 + (10 * (node)), MCFG_BUS_ANY, \
9644f22bd9STomasz Nowicki &thunder_pem_ecam_ops, THUNDER_PEM_RES(0x894057000000UL, node) }, \
9744f22bd9STomasz Nowicki { "CAVIUM", "THUNDERX", rev, 9 + (10 * (node)), MCFG_BUS_ANY, \
9844f22bd9STomasz Nowicki &thunder_pem_ecam_ops, THUNDER_PEM_RES(0x89808f000000UL, node) }
99648d93fcSTomasz Nowicki
100648d93fcSTomasz Nowicki #define THUNDER_ECAM_QUIRK(rev, seg) \
101648d93fcSTomasz Nowicki { "CAVIUM", "THUNDERX", rev, seg, MCFG_BUS_ANY, \
102648d93fcSTomasz Nowicki &pci_thunder_ecam_ops }
103ced414a1SBjorn Helgaas
104ced414a1SBjorn Helgaas /* SoC pass2.x */
105ced414a1SBjorn Helgaas THUNDER_PEM_QUIRK(1, 0),
106ced414a1SBjorn Helgaas THUNDER_PEM_QUIRK(1, 1),
107cd183740STomasz Nowicki THUNDER_ECAM_QUIRK(1, 10),
108ced414a1SBjorn Helgaas
109648d93fcSTomasz Nowicki /* SoC pass1.x */
110648d93fcSTomasz Nowicki THUNDER_PEM_QUIRK(2, 0), /* off-chip devices */
111648d93fcSTomasz Nowicki THUNDER_PEM_QUIRK(2, 1), /* off-chip devices */
112648d93fcSTomasz Nowicki THUNDER_ECAM_QUIRK(2, 0),
113648d93fcSTomasz Nowicki THUNDER_ECAM_QUIRK(2, 1),
114648d93fcSTomasz Nowicki THUNDER_ECAM_QUIRK(2, 2),
115648d93fcSTomasz Nowicki THUNDER_ECAM_QUIRK(2, 3),
116648d93fcSTomasz Nowicki THUNDER_ECAM_QUIRK(2, 10),
117648d93fcSTomasz Nowicki THUNDER_ECAM_QUIRK(2, 11),
118648d93fcSTomasz Nowicki THUNDER_ECAM_QUIRK(2, 12),
119648d93fcSTomasz Nowicki THUNDER_ECAM_QUIRK(2, 13),
120c5d46039SDuc Dang
1217f100744SVidya Sagar { "NVIDIA", "TEGRA194", 1, 0, MCFG_BUS_ANY, &tegra194_pcie_ops},
1227f100744SVidya Sagar { "NVIDIA", "TEGRA194", 1, 1, MCFG_BUS_ANY, &tegra194_pcie_ops},
1237f100744SVidya Sagar { "NVIDIA", "TEGRA194", 1, 2, MCFG_BUS_ANY, &tegra194_pcie_ops},
1247f100744SVidya Sagar { "NVIDIA", "TEGRA194", 1, 3, MCFG_BUS_ANY, &tegra194_pcie_ops},
1257f100744SVidya Sagar { "NVIDIA", "TEGRA194", 1, 4, MCFG_BUS_ANY, &tegra194_pcie_ops},
1267f100744SVidya Sagar { "NVIDIA", "TEGRA194", 1, 5, MCFG_BUS_ANY, &tegra194_pcie_ops},
1277f100744SVidya Sagar
128c5d46039SDuc Dang #define XGENE_V1_ECAM_MCFG(rev, seg) \
129c5d46039SDuc Dang {"APM ", "XGENE ", rev, seg, MCFG_BUS_ANY, \
130c5d46039SDuc Dang &xgene_v1_pcie_ecam_ops }
131ced414a1SBjorn Helgaas
132c5d46039SDuc Dang #define XGENE_V2_ECAM_MCFG(rev, seg) \
133c5d46039SDuc Dang {"APM ", "XGENE ", rev, seg, MCFG_BUS_ANY, \
134c5d46039SDuc Dang &xgene_v2_pcie_ecam_ops }
135ced414a1SBjorn Helgaas
136c5d46039SDuc Dang /* X-Gene SoC with v1 PCIe controller */
137c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(1, 0),
138c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(1, 1),
139c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(1, 2),
140c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(1, 3),
141c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(1, 4),
142c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(2, 0),
143c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(2, 1),
144c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(2, 2),
145c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(2, 3),
146c5d46039SDuc Dang XGENE_V1_ECAM_MCFG(2, 4),
147c5d46039SDuc Dang /* X-Gene SoC with v2.1 PCIe controller */
148c5d46039SDuc Dang XGENE_V2_ECAM_MCFG(3, 0),
149c5d46039SDuc Dang XGENE_V2_ECAM_MCFG(3, 1),
150c5d46039SDuc Dang /* X-Gene SoC with v2.2 PCIe controller */
151c5d46039SDuc Dang XGENE_V2_ECAM_MCFG(4, 0),
152c5d46039SDuc Dang XGENE_V2_ECAM_MCFG(4, 1),
153c5d46039SDuc Dang XGENE_V2_ECAM_MCFG(4, 2),
154877c1a5fSTuan Phan
155877c1a5fSTuan Phan #define ALTRA_ECAM_QUIRK(rev, seg) \
156877c1a5fSTuan Phan { "Ampere", "Altra ", rev, seg, MCFG_BUS_ANY, &pci_32b_read_ops }
157877c1a5fSTuan Phan
158877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 0),
159877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 1),
160877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 2),
161877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 3),
162877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 4),
163877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 5),
164877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 6),
165877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 7),
166877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 8),
167877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 9),
168877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 10),
169877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 11),
170877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 12),
171877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 13),
172877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 14),
173877c1a5fSTuan Phan ALTRA_ECAM_QUIRK(1, 15),
17440a6cc14SHuacai Chen #endif /* ARM64 */
175*cd89eddaSHuacai Chen
176*cd89eddaSHuacai Chen #ifdef CONFIG_LOONGARCH
177*cd89eddaSHuacai Chen #define LOONGSON_ECAM_MCFG(table_id, seg) \
178*cd89eddaSHuacai Chen { "LOONGS", table_id, 1, seg, MCFG_BUS_ANY, &loongson_pci_ecam_ops }
179*cd89eddaSHuacai Chen
180*cd89eddaSHuacai Chen LOONGSON_ECAM_MCFG("\0", 0),
181*cd89eddaSHuacai Chen LOONGSON_ECAM_MCFG("LOONGSON", 0),
182*cd89eddaSHuacai Chen LOONGSON_ECAM_MCFG("\0", 1),
183*cd89eddaSHuacai Chen LOONGSON_ECAM_MCFG("LOONGSON", 1),
184*cd89eddaSHuacai Chen #endif /* LOONGARCH */
1855b69b85bSTomasz Nowicki };
1865b69b85bSTomasz Nowicki
1875b69b85bSTomasz Nowicki static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
1885b69b85bSTomasz Nowicki static char mcfg_oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
1895b69b85bSTomasz Nowicki static u32 mcfg_oem_revision;
1905b69b85bSTomasz Nowicki
pci_mcfg_quirk_matches(struct mcfg_fixup * f,u16 segment,struct resource * bus_range)1915b69b85bSTomasz Nowicki static int pci_mcfg_quirk_matches(struct mcfg_fixup *f, u16 segment,
1925b69b85bSTomasz Nowicki struct resource *bus_range)
1935b69b85bSTomasz Nowicki {
1945b69b85bSTomasz Nowicki if (!memcmp(f->oem_id, mcfg_oem_id, ACPI_OEM_ID_SIZE) &&
1955b69b85bSTomasz Nowicki !memcmp(f->oem_table_id, mcfg_oem_table_id,
1965b69b85bSTomasz Nowicki ACPI_OEM_TABLE_ID_SIZE) &&
1975b69b85bSTomasz Nowicki f->oem_revision == mcfg_oem_revision &&
1985b69b85bSTomasz Nowicki f->segment == segment &&
1995b69b85bSTomasz Nowicki resource_contains(&f->bus_range, bus_range))
2005b69b85bSTomasz Nowicki return 1;
2015b69b85bSTomasz Nowicki
2025b69b85bSTomasz Nowicki return 0;
2035b69b85bSTomasz Nowicki }
2045b69b85bSTomasz Nowicki #endif
2055b69b85bSTomasz Nowicki
pci_mcfg_apply_quirks(struct acpi_pci_root * root,struct resource * cfgres,const struct pci_ecam_ops ** ecam_ops)2065b69b85bSTomasz Nowicki static void pci_mcfg_apply_quirks(struct acpi_pci_root *root,
2075b69b85bSTomasz Nowicki struct resource *cfgres,
2080b104773SRob Herring const struct pci_ecam_ops **ecam_ops)
2095b69b85bSTomasz Nowicki {
2105b69b85bSTomasz Nowicki #ifdef CONFIG_PCI_QUIRKS
2115b69b85bSTomasz Nowicki u16 segment = root->segment;
2125b69b85bSTomasz Nowicki struct resource *bus_range = &root->secondary;
2135b69b85bSTomasz Nowicki struct mcfg_fixup *f;
2145b69b85bSTomasz Nowicki int i;
2155b69b85bSTomasz Nowicki
2165b69b85bSTomasz Nowicki for (i = 0, f = mcfg_quirks; i < ARRAY_SIZE(mcfg_quirks); i++, f++) {
2175b69b85bSTomasz Nowicki if (pci_mcfg_quirk_matches(f, segment, bus_range)) {
2185b69b85bSTomasz Nowicki if (f->cfgres.start)
2195b69b85bSTomasz Nowicki *cfgres = f->cfgres;
2205b69b85bSTomasz Nowicki if (f->ops)
2215b69b85bSTomasz Nowicki *ecam_ops = f->ops;
2225b69b85bSTomasz Nowicki dev_info(&root->device->dev, "MCFG quirk: ECAM at %pR for %pR with %ps\n",
2235b69b85bSTomasz Nowicki cfgres, bus_range, *ecam_ops);
2245b69b85bSTomasz Nowicki return;
2255b69b85bSTomasz Nowicki }
2265b69b85bSTomasz Nowicki }
2275b69b85bSTomasz Nowicki #endif
2285b69b85bSTomasz Nowicki }
2295b69b85bSTomasz Nowicki
230935c760eSTomasz Nowicki /* List to save MCFG entries */
231935c760eSTomasz Nowicki static LIST_HEAD(pci_mcfg_list);
232935c760eSTomasz Nowicki
pci_mcfg_lookup(struct acpi_pci_root * root,struct resource * cfgres,const struct pci_ecam_ops ** ecam_ops)23313983eb8STomasz Nowicki int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
2340b104773SRob Herring const struct pci_ecam_ops **ecam_ops)
235935c760eSTomasz Nowicki {
2360b104773SRob Herring const struct pci_ecam_ops *ops = &pci_generic_ecam_ops;
23713983eb8STomasz Nowicki struct resource *bus_res = &root->secondary;
23813983eb8STomasz Nowicki u16 seg = root->segment;
239935c760eSTomasz Nowicki struct mcfg_entry *e;
24013983eb8STomasz Nowicki struct resource res;
24113983eb8STomasz Nowicki
24213983eb8STomasz Nowicki /* Use address from _CBA if present, otherwise lookup MCFG */
24313983eb8STomasz Nowicki if (root->mcfg_addr)
24413983eb8STomasz Nowicki goto skip_lookup;
245935c760eSTomasz Nowicki
246935c760eSTomasz Nowicki /*
24753762ba8SZhou Wang * We expect the range in bus_res in the coverage of MCFG bus range.
248935c760eSTomasz Nowicki */
249935c760eSTomasz Nowicki list_for_each_entry(e, &pci_mcfg_list, list) {
25053762ba8SZhou Wang if (e->segment == seg && e->bus_start <= bus_res->start &&
25113983eb8STomasz Nowicki e->bus_end >= bus_res->end) {
25213983eb8STomasz Nowicki root->mcfg_addr = e->addr;
253935c760eSTomasz Nowicki }
254935c760eSTomasz Nowicki
25513983eb8STomasz Nowicki }
25613983eb8STomasz Nowicki
25713983eb8STomasz Nowicki skip_lookup:
25813983eb8STomasz Nowicki memset(&res, 0, sizeof(res));
2595b69b85bSTomasz Nowicki if (root->mcfg_addr) {
26013983eb8STomasz Nowicki res.start = root->mcfg_addr + (bus_res->start << 20);
26113983eb8STomasz Nowicki res.end = res.start + (resource_size(bus_res) << 20) - 1;
26213983eb8STomasz Nowicki res.flags = IORESOURCE_MEM;
2635b69b85bSTomasz Nowicki }
2645b69b85bSTomasz Nowicki
2655b69b85bSTomasz Nowicki /*
2665b69b85bSTomasz Nowicki * Allow quirks to override default ECAM ops and CFG resource
2675b69b85bSTomasz Nowicki * range. This may even fabricate a CFG resource range in case
2685b69b85bSTomasz Nowicki * MCFG does not have it. Invalid CFG start address means MCFG
2695b69b85bSTomasz Nowicki * firmware bug or we need another quirk in array.
2705b69b85bSTomasz Nowicki */
2715b69b85bSTomasz Nowicki pci_mcfg_apply_quirks(root, &res, &ops);
2725b69b85bSTomasz Nowicki if (!res.start)
2735b69b85bSTomasz Nowicki return -ENXIO;
2745b69b85bSTomasz Nowicki
27513983eb8STomasz Nowicki *cfgres = res;
27613983eb8STomasz Nowicki *ecam_ops = ops;
277935c760eSTomasz Nowicki return 0;
278935c760eSTomasz Nowicki }
279935c760eSTomasz Nowicki
pci_mcfg_parse(struct acpi_table_header * header)280935c760eSTomasz Nowicki static __init int pci_mcfg_parse(struct acpi_table_header *header)
281935c760eSTomasz Nowicki {
282935c760eSTomasz Nowicki struct acpi_table_mcfg *mcfg;
283935c760eSTomasz Nowicki struct acpi_mcfg_allocation *mptr;
284935c760eSTomasz Nowicki struct mcfg_entry *e, *arr;
285935c760eSTomasz Nowicki int i, n;
286935c760eSTomasz Nowicki
287935c760eSTomasz Nowicki if (header->length < sizeof(struct acpi_table_mcfg))
288935c760eSTomasz Nowicki return -EINVAL;
289935c760eSTomasz Nowicki
290935c760eSTomasz Nowicki n = (header->length - sizeof(struct acpi_table_mcfg)) /
291935c760eSTomasz Nowicki sizeof(struct acpi_mcfg_allocation);
292935c760eSTomasz Nowicki mcfg = (struct acpi_table_mcfg *)header;
293935c760eSTomasz Nowicki mptr = (struct acpi_mcfg_allocation *) &mcfg[1];
294935c760eSTomasz Nowicki
295935c760eSTomasz Nowicki arr = kcalloc(n, sizeof(*arr), GFP_KERNEL);
296935c760eSTomasz Nowicki if (!arr)
297935c760eSTomasz Nowicki return -ENOMEM;
298935c760eSTomasz Nowicki
299935c760eSTomasz Nowicki for (i = 0, e = arr; i < n; i++, mptr++, e++) {
300935c760eSTomasz Nowicki e->segment = mptr->pci_segment;
301935c760eSTomasz Nowicki e->addr = mptr->address;
302935c760eSTomasz Nowicki e->bus_start = mptr->start_bus_number;
303935c760eSTomasz Nowicki e->bus_end = mptr->end_bus_number;
304935c760eSTomasz Nowicki list_add(&e->list, &pci_mcfg_list);
305935c760eSTomasz Nowicki }
306935c760eSTomasz Nowicki
3075b69b85bSTomasz Nowicki #ifdef CONFIG_PCI_QUIRKS
3085b69b85bSTomasz Nowicki /* Save MCFG IDs and revision for quirks matching */
3095b69b85bSTomasz Nowicki memcpy(mcfg_oem_id, header->oem_id, ACPI_OEM_ID_SIZE);
3105b69b85bSTomasz Nowicki memcpy(mcfg_oem_table_id, header->oem_table_id, ACPI_OEM_TABLE_ID_SIZE);
3115b69b85bSTomasz Nowicki mcfg_oem_revision = header->oem_revision;
3125b69b85bSTomasz Nowicki #endif
3135b69b85bSTomasz Nowicki
314935c760eSTomasz Nowicki pr_info("MCFG table detected, %d entries\n", n);
315935c760eSTomasz Nowicki return 0;
316935c760eSTomasz Nowicki }
317935c760eSTomasz Nowicki
318935c760eSTomasz Nowicki /* Interface called by ACPI - parse and save MCFG table */
pci_mmcfg_late_init(void)319935c760eSTomasz Nowicki void __init pci_mmcfg_late_init(void)
320935c760eSTomasz Nowicki {
321935c760eSTomasz Nowicki int err = acpi_table_parse(ACPI_SIG_MCFG, pci_mcfg_parse);
322935c760eSTomasz Nowicki if (err)
323d24e1245SJeremy Linton pr_debug("Failed to parse MCFG (%d)\n", err);
324935c760eSTomasz Nowicki }
325