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/openbmc/linux/drivers/cpufreq/
H A Dhighbank-cpufreq.c6 * the cpufreq-dt driver changes to frequency to alert the highbank
66 if ((!of_machine_is_compatible("calxeda,highbank")) && in hb_cpufreq_driver_init()
72 pr_err("failed to get highbank cpufreq device\n"); in hb_cpufreq_driver_init()
78 pr_err("failed to find highbank cpufreq node\n"); in hb_cpufreq_driver_init()
105 { .compatible = "calxeda,highbank" },
112 MODULE_DESCRIPTION("Calxeda Highbank cpufreq driver");
H A DKconfig.arm103 tristate "Calxeda Highbank-based"
107 This adds the CPUFreq driver for Calxeda Highbank SoC
/openbmc/qemu/hw/arm/
H A Dhighbank.c2 * Calxeda Highbank SoC emulation
68 "highbank: bad write offset 0x%" HWADDR_PRIx "\n", offset); in hb_regs_write()
82 "highbank: bad read offset 0x%" HWADDR_PRIx "\n", offset); in hb_regs_read()
100 #define TYPE_HIGHBANK_REGISTERS "highbank-regs"
113 .name = "highbank-regs",
146 dc->desc = "Calxeda Highbank registers"; in highbank_regs_class_init()
174 * device tree (linux/arch/arm/boot/dts/highbank.dts), which is
232 memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000, in calxeda_init()
322 /* highbank requires a dtb in order to boot, and the dtb will override in calxeda_init()
352 mc->desc = "Calxeda Highbank (ECX-1000)"; in highbank_class_init()
[all …]
/openbmc/qemu/docs/system/arm/
H A Dhighbank.rst1 Calxeda Highbank and Midway (``highbank``, ``midway``)
4 ``highbank`` is a model of the Calxeda Highbank (ECX-1000) system,
/openbmc/u-boot/arch/arm/mach-highbank/
H A DKconfig4 default "highbank"
7 default "highbank"
10 default "highbank"
/openbmc/u-boot/board/highbank/
H A DMAINTAINERS1 HIGHBANK BOARD
4 F: board/highbank/
5 F: include/configs/highbank.h
H A DMakefile6 obj-y := highbank.o ahci.o
/openbmc/linux/arch/arm/mach-highbank/
H A Dhighbank.c47 WARN_ONCE(1, "Highbank L2C310: ignoring write to reg 0x%x\n", in highbank_l2c310_write_sec()
159 "calxeda,highbank",
164 DT_MACHINE_START(HIGHBANK, "Highbank")
H A DMakefile2 obj-y := highbank.o system.o smc.o
H A DKconfig3 bool "Calxeda ECX-1000/2000 (Highbank/Midway)"
/openbmc/linux/arch/arm/boot/dts/calxeda/
H A DMakefile3 highbank.dtb \
6 highbank.dtb \
H A Dhighbank.dts12 model = "Calxeda Highbank";
13 compatible = "calxeda,highbank";
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Dcalxeda.yaml12 Bindings for boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC
21 - calxeda,highbank
/openbmc/linux/Documentation/devicetree/bindings/arm/calxeda/
H A Dl2ecc.yaml7 title: Calxeda Highbank L2 cache ECC
10 Binding for the Calxeda Highbank L2 cache controller ECC device.
H A Dhb-sregs.yaml7 title: Calxeda Highbank system registers
10 The Calxeda Highbank system has a block of MMIO registers controlling
/openbmc/linux/drivers/net/ethernet/calxeda/
H A DKconfig9 Highbank platforms.
/openbmc/linux/drivers/edac/
H A DKconfig350 tristate "Highbank Memory Controller"
354 Calxeda Highbank memory controller.
357 tristate "Highbank L2 Cache"
361 Calxeda Highbank memory controller.
/openbmc/linux/drivers/clk/socfpga/
H A Dclk.c6 * Based from clk-highbank.c
H A Dclk-periph.c6 * Based from clk-highbank.c
H A Dclk-pll.c6 * Based from clk-highbank.c
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dcalxeda-xgmac.yaml7 title: Calxeda Highbank 10Gb XGMAC Ethernet controller
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dcalxeda-combophy.yaml7 title: Calxeda Highbank Combination PHYs for SATA
/openbmc/linux/drivers/ata/
H A Dsata_highbank.c3 * Calxeda Highbank AHCI SATA platform driver
620 .name = "highbank-ahci",
629 MODULE_DESCRIPTION("Calxeda Highbank AHCI SATA platform driver");
632 MODULE_ALIAS("sata:highbank");
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dcalxeda.yaml7 title: Calxeda highbank platform Clock Controller
/openbmc/linux/drivers/mailbox/
H A DKconfig59 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
60 send short messages between Highbank's A9 cores and the EnergyCore

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