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Searched full:gpll0_out_main (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,msm8998-gpucc.yaml65 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0_OUT_MAIN>;
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-msm8998.c67 static struct clk_alpha_pll_postdiv gpll0_out_main = { variable
71 .name = "gpll0_out_main",
407 { .hw = &gpll0_out_main.clkr.hw },
408 { .hw = &gpll0_out_main.clkr.hw },
418 { .hw = &gpll0_out_main.clkr.hw },
430 { .hw = &gpll0_out_main.clkr.hw },
432 { .hw = &gpll0_out_main.clkr.hw },
453 { .hw = &gpll0_out_main.clkr.hw },
465 { .hw = &gpll0_out_main.clkr.hw },
1380 &gpll0_out_main.clkr.hw,
[all …]
H A Dgcc-qcs404.c83 static struct clk_alpha_pll gpll0_out_main = { variable
91 .name = "gpll0_out_main",
214 { .hw = &gpll0_out_main.clkr.hw },
231 { .hw = &gpll0_out_main.clkr.hw },
244 { .hw = &gpll0_out_main.clkr.hw },
287 { .hw = &gpll0_out_main.clkr.hw },
311 { .hw = &gpll0_out_main.clkr.hw },
355 { .hw = &gpll0_out_main.clkr.hw },
367 { .hw = &gpll0_out_main.clkr.hw },
385 { .hw = &gpll0_out_main.clkr.hw },
[all …]
H A Dgcc-sm6115.c101 static struct clk_alpha_pll_postdiv gpll0_out_main = { variable
109 .name = "gpll0_out_main",
3419 [GPLL0_OUT_MAIN] = &gpll0_out_main.clkr,
H A Dgcc-sm6125.c71 static struct clk_fixed_factor gpll0_out_main = { variable
75 .name = "gpll0_out_main",
3868 [GPLL0_OUT_MAIN] = &gpll0_out_main.hw,
/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sm6115.h12 #define GPLL0_OUT_MAIN 2 macro
H A Dqcom,gcc-sm6125.h10 #define GPLL0_OUT_MAIN 1 macro
H A Dqcom,gcc-sdm845.h177 #define GPLL0_OUT_MAIN 167 macro
H A Dqcom,gcc-msm8998.h136 #define GPLL0_OUT_MAIN 127 macro