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/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Dqcom,inline-crypto-engine.yaml41 clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
/openbmc/linux/include/dt-bindings/clock/
H A Dqcom,gcc-sc7180.h111 #define GCC_UFS_PHY_ICE_CORE_CLK 101 macro
H A Dqcom,gcc-sm6350.h125 #define GCC_UFS_PHY_ICE_CORE_CLK 114 macro
H A Dqcom,sm7150-gcc.h130 #define GCC_UFS_PHY_ICE_CORE_CLK 118 macro
H A Dqcom,gcc-sm6115.h128 #define GCC_UFS_PHY_ICE_CORE_CLK 120 macro
H A Dqcom,gcc-sc7280.h137 #define GCC_UFS_PHY_ICE_CORE_CLK 127 macro
H A Dqcom,sm6375-gcc.h171 #define GCC_UFS_PHY_ICE_CORE_CLK 160 macro
H A Dqcom,gcc-sm6125.h186 #define GCC_UFS_PHY_ICE_CORE_CLK 177 macro
H A Dqcom,sm8550-gcc.h152 #define GCC_UFS_PHY_ICE_CORE_CLK 141 macro
H A Dqcom,gcc-sm8450.h166 #define GCC_UFS_PHY_ICE_CORE_CLK 154 macro
H A Dqcom,gcc-sm8150.h170 #define GCC_UFS_PHY_ICE_CORE_CLK 160 macro
H A Dqcom,gcc-sdm845.h142 #define GCC_UFS_PHY_ICE_CORE_CLK 132 macro
H A Dqcom,gcc-sm8350.h170 #define GCC_UFS_PHY_ICE_CORE_CLK 158 macro
H A Dqcom,gcc-sm8250.h174 #define GCC_UFS_PHY_ICE_CORE_CLK 164 macro
H A Dqcom,gcc-sc8180x.h195 #define GCC_UFS_PHY_ICE_CORE_CLK 185 macro
H A Dqcom,sa8775p-gcc.h210 #define GCC_UFS_PHY_ICE_CORE_CLK 199 macro
H A Dqcom,gcc-sc8280xp.h282 #define GCC_UFS_PHY_ICE_CORE_CLK 271 macro
/openbmc/linux/drivers/clk/qcom/
H A Dgcc-sm7150.c2292 static struct clk_branch gcc_ufs_phy_ice_core_clk = { variable
2301 .name = "gcc_ufs_phy_ice_core_clk",
2323 &gcc_ufs_phy_ice_core_clk.clkr.hw,
2870 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,
H A Dgcc-sm8450.c2650 static struct clk_branch gcc_ufs_phy_ice_core_clk = { variable
2659 .name = "gcc_ufs_phy_ice_core_clk",
3140 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,
3281 regmap_update_bits(regmap, gcc_ufs_phy_ice_core_clk.halt_reg, BIT(14), BIT(14)); in gcc_sm8450_probe()
H A Dgcc-sc7180.c1863 static struct clk_branch gcc_ufs_phy_ice_core_clk = { variable
1872 .name = "gcc_ufs_phy_ice_core_clk",
2335 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,
H A Dgcc-sm6350.c1989 static struct clk_branch gcc_ufs_phy_ice_core_clk = { variable
1998 .name = "gcc_ufs_phy_ice_core_clk",
2450 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,
H A Dgcc-sdm845.c2888 static struct clk_branch gcc_ufs_phy_ice_core_clk = { variable
2897 .name = "gcc_ufs_phy_ice_core_clk",
3634 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,
3815 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,
H A Dgcc-sc7280.c2623 static struct clk_branch gcc_ufs_phy_ice_core_clk = { variable
2632 .name = "gcc_ufs_phy_ice_core_clk",
3309 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,
3471 qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true); in gcc_sc7280_probe()
H A Dgcc-sm8550.c2690 static struct clk_branch gcc_ufs_phy_ice_core_clk = { variable
2699 .name = "gcc_ufs_phy_ice_core_clk",
3215 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,
3353 regmap_update_bits(regmap, gcc_ufs_phy_ice_core_clk.halt_reg, BIT(14), BIT(14)); in gcc_sm8550_probe()
H A Dgcc-sm8150.c2994 static struct clk_branch gcc_ufs_phy_ice_core_clk = { variable
3003 .name = "gcc_ufs_phy_ice_core_clk",
3024 &gcc_ufs_phy_ice_core_clk.clkr.hw },
3663 [GCC_UFS_PHY_ICE_CORE_CLK] = &gcc_ufs_phy_ice_core_clk.clkr,

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