| /openbmc/linux/drivers/mtd/spi-nor/ |
| H A D | Kconfig | 32 bool "Disable SWP on any flashes (legacy behavior)"
35 flashes at boot-up.
44 bool "Disable SWP on flashes w/ volatile protection bits"
46 Some SPI flashes have volatile block protection bits, ie. after a
51 of flashes while keeping it enabled for any other SPI flashes
64 SPI flashes will not be changed. If your flash is software write
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| H A D | otp.c | 3 * OTP support for SPI NOR flashes
30 * This method is used on GigaDevice and Winbond flashes.
77 * This method is used on GigaDevice and Winbond flashes.
102 * flashes only have one page per security register. in spi_nor_otp_write_secr()
133 * This method is used on GigaDevice and Winbond flashes.
171 * GigaDevice and Winbond flashes.
203 * method is used on GigaDevice and Winbond flashes.
496 * Some SPI NOR flashes like Macronix ones can be ordered in two in spi_nor_set_mtd_otp_ops()
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| H A D | xilinx.c | 70 * xilinx_nor_read_sr() - Read the Status Register on S3AN flashes.
132 * This flashes have a page size of 264 or 528 bytes (known as in xilinx_nor_setup()
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| /openbmc/u-boot/drivers/mtd/ubi/ |
| H A D | Kconfig | 35 The default value should be OK for SLC NAND flashes, NOR flashes and
36 other flashes which have eraseblock life-cycle 100000 or more.
37 However, in case of MLC NAND flashes which typically have eraseblock
52 Valid Blocks) for the flashes' endurance lifetime. The maximum
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| /openbmc/linux/drivers/mtd/ubi/ |
| H A D | Kconfig | 25 The default value should be OK for SLC NAND flashes, NOR flashes and
26 other flashes which have eraseblock life-cycle 100000 or more.
27 However, in case of MLC NAND flashes which typically have eraseblock
42 Valid Blocks) for the flashes' endurance lifetime. The maximum
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| /openbmc/linux/drivers/mtd/devices/ |
| H A D | bcm47xxsflash.h | 9 /* Used for ST flashes only. */
24 /* Used for Atmel flashes only. */
45 /* Status register bits for ST flashes */
52 /* Status register bits for Atmel flashes */
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| /openbmc/u-boot/doc/device-tree-bindings/leds/ |
| H A D | common.txt | 13 "heartbeat" - LED "double" flashes at a load average based rate
15 "timer" - LED flashes at a fixed, configurable rate
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| /openbmc/linux/Documentation/devicetree/bindings/mtd/ |
| H A D | mtd.yaml | 50 An OTP memory region. Some flashes provide a one-time-programmable
52 pre-programmed by the factory. Some flashes might provide both.
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| /openbmc/u-boot/include/linux/mtd/ |
| H A D | spi-nor.h | 68 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
91 /* Used for SST flashes only. */
99 /* Used for S3AN flashes only */
107 /* Used for Macronix and Winbond flashes. */
114 /* Used for Spansion flashes only. */
127 /* Used for Micron flashes only. */
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| H A D | ubi.h | 167 * Instead, CFI NOR flashes have a write-buffer of, e.g., 64 bytes, and when
176 * E.g., some NOR flashes may have (@min_io_size = 1, @max_write_size = 64). In
177 * contrast, NAND flashes usually have @min_io_size = @max_write_size = NAND
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| /openbmc/linux/include/linux/mtd/ |
| H A D | spi-nor.h | 53 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
80 /* Used for SST flashes only. */
84 /* Used for Macronix and Winbond flashes. */
88 /* Used for Spansion flashes only. */
91 /* Used for Micron flashes only. */
95 /* Used for GigaDevices and Winbond flashes. */
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| H A D | ubi.h | 164 * Instead, CFI NOR flashes have a write-buffer of, e.g., 64 bytes, and when
173 * E.g., some NOR flashes may have (@min_io_size = 1, @max_write_size = 64). In
174 * contrast, NAND flashes usually have @min_io_size = @max_write_size = NAND
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| H A D | spear_smi.h | 55 * num_flashes: number of flashes present on board
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| /openbmc/linux/Documentation/filesystems/ |
| H A D | ubifs.rst | 31 typically 100K-1G for SLC NAND and NOR flashes, and 1K-10K for MLC
32 NAND flashes. Blocks do not have the wear-out property.
33 5 Eraseblocks may become bad (only on NAND flashes) and software should
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| /openbmc/u-boot/drivers/mtd/spi/ |
| H A D | Kconfig | 78 bool "SFDP table parsing support for SPI NOR flashes"
82 SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
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| /openbmc/u-boot/board/xes/xpedite517x/ |
| H A D | law.c | 22 /* NAND LAW covers 2 NAND flashes */
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| /openbmc/linux/Documentation/userspace-api/media/v4l/ |
| H A D | ext-ctrls-flash.rst | 185 Is the flash ready to strobe? Xenon flashes require their capacitors
186 charged before strobing. LED flashes often require a cooldown period
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| /openbmc/u-boot/board/xes/common/ |
| H A D | fsl_8xxx_misc.c | 12 * Determine if a board's flashes are write protected
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| /openbmc/linux/include/linux/ssb/ |
| H A D | ssb_driver_chipcommon.h | 9 * gpio interface, extbus, and support for serial and parallel flashes.
497 /* flashcontrol opcodes for ST flashes */
511 /* Status register bits for ST flashes */
518 /* flashcontrol opcodes for Atmel flashes */
541 /* Status register bits for Atmel flashes */
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| /openbmc/u-boot/doc/SPI/ |
| H A D | status.txt | 11 - Bank Address Register (Accessing flashes > 16Mbytes in 3-byte addressing)
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-spi-devices-spi-nor | 10 non-JEDEC compliant flashes.
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| /openbmc/linux/arch/powerpc/boot/dts/fsl/ |
| H A D | p1020rdb.dts | 20 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
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| H A D | p1020rdb_36b.dts | 20 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | fsl-ls1043a-rdb.dts | 67 /* NOR, NAND Flashes and FPGA on board */
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| /openbmc/u-boot/board/xes/xpedite520x/ |
| H A D | tlb.c | 31 /* W**G* - NOR flashes */
|